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Add build hooks for x86. --HG-- extra : convert_revision : 438eb74f14e6ea60bab5012110f3946c9213786e
2007-03-03 17:01:48 +01:00
# -*- mode:python -*-
copyright: Change HP copyright on x86 code to be more friendly
2010-05-24 07:44:15 +02:00
# Copyright (c) 2007-2008 The Hewlett-Packard Development Company
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
# not be construed as granting a license to any other intellectual
# property including but not limited to intellectual property relating
# to a hardware implementation of the functionality of the software
# licensed hereunder. You may use the software subject to the license
# terms below provided that you ensure that this notice is replicated
# unmodified and in its entirety in all distributions of the software,
# modified or unmodified, in source code or in binary form.
#
Add build hooks for x86. --HG-- extra : convert_revision : 438eb74f14e6ea60bab5012110f3946c9213786e
2007-03-03 17:01:48 +01:00
# Copyright (c) 2005-2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Gabe Black
Rework the way SCons recurses into subdirectories, making it automatic. The point is that now a subdirectory can be added to the build process just by creating a SConscript file in it. The process has two passes. On the first pass, all subdirs of the root of the tree are searched for SConsopts files. These files contain any command line options that ought to be added for a particular subdirectory. On the second pass, all subdirs of the src directory are searched for SConscript files. These files describe how to build any given subdirectory. I have added a Source() function. Any file (relative to the directory in which the SConscript resides) passed to that function is added to the build. Clean up everything to take advantage of Source(). function is added to the list of files to be built. --HG-- extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
2007-03-11 08:00:54 +01:00
Import('*')
X86: Make the isa parser run if any of the microcode files change. --HG-- extra : convert_revision : 7f6d07de7e0d728a9333fb46c953dbe6cb04e600
2007-09-11 01:49:07 +02:00
Rework the way SCons recurses into subdirectories, making it automatic. The point is that now a subdirectory can be added to the build process just by creating a SConscript file in it. The process has two passes. On the first pass, all subdirs of the root of the tree are searched for SConsopts files. These files contain any command line options that ought to be added for a particular subdirectory. On the second pass, all subdirs of the src directory are searched for SConscript files. These files describe how to build any given subdirectory. I have added a Source() function. Any file (relative to the directory in which the SConscript resides) passed to that function is added to the build. Clean up everything to take advantage of Source(). function is added to the list of files to be built. --HG-- extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
2007-03-11 08:00:54 +01:00
if env['TARGET_ISA'] == 'x86':
X86: Implement CPUID with a magical function instead of microcode.
2008-10-13 00:31:28 +02:00
Source('cpuid.cc')
ISA: Make the decode function part of the ISA's decoder.
2012-05-25 09:55:24 +02:00
Source('decoder.cc')
CPU: Merge the predecoder and decoder. These classes are always used together, and merging them will give the ISAs more flexibility in how they cache things and manage the process. --HG-- rename : src/arch/x86/predecoder_tables.cc => src/arch/x86/decoder_tables.cc
2012-05-26 22:44:46 +02:00
Source('decoder_tables.cc')
Make memory instructions work better, add more macroop implementations, add an lea microop, move EmulEnv into it's own .cc and .hh. --HG-- extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
2007-06-20 17:02:50 +02:00
Source('emulenv.cc')
X86: Start implementing the x86 tlb which will handle segmentation permission and limit checks and paging. --HG-- extra : convert_revision : 6072f7d9eecbaa066d39d6da7f0180ea4a2615af
2007-10-03 08:00:37 +02:00
Source('faults.cc')
X86: On a bad microopc, return a microop that returns a fault that panics. This way a bad micropc will have to get all the way to commit before killing the simulation. This accounts for misspeculated branches.
2011-02-14 02:42:56 +01:00
Source('insts/badmicroop.cc')
X86: Move the fp microops to their own file with their own base classes in C++ and python. --HG-- extra : convert_revision : 9cd223f2005adb36fea2bb56fa39793a58ec958c
2007-09-20 03:27:55 +02:00
Source('insts/microfpop.cc')
Pull some hard coded base classes out of the isa description. --HG-- rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
2007-07-15 02:14:19 +02:00
Source('insts/microldstop.cc')
X86: Create base classes for use with media/SIMD microops.
2009-08-18 03:15:16 +02:00
Source('insts/micromediaop.cc')
X86: Move the fp microops to their own file with their own base classes in C++ and python. --HG-- extra : convert_revision : 9cd223f2005adb36fea2bb56fa39793a58ec958c
2007-09-20 03:27:55 +02:00
Source('insts/microop.cc')
Pull some hard coded base classes out of the isa description. --HG-- rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
2007-07-15 02:14:19 +02:00
Source('insts/microregop.cc')
Source('insts/static_inst.cc')
SE/FS: Build the Interrupt objects in SE mode.
2011-10-09 09:15:50 +02:00
Source('interrupts.cc')
Registers: Add an ISA object which replaces the MiscRegFile. This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU.
2009-07-09 08:02:20 +02:00
Source('isa.cc')
X86: Build the same files in SE and FS.
2011-10-30 11:06:40 +01:00
Source('linux/linux.cc')
Source('linux/process.cc')
Source('linux/syscalls.cc')
Source('linux/system.cc')
CPU: Separate out native trace into ISA (in)dependent code and SimObjects. --HG-- rename : src/cpu/nativetrace.cc => src/arch/sparc/nativetrace.cc rename : src/cpu/nativetrace.hh => src/arch/sparc/nativetrace.hh rename : src/cpu/NativeTrace.py => src/arch/x86/X86NativeTrace.py
2009-07-20 08:54:56 +02:00
Source('nativetrace.cc')
X86: Start implementing the x86 tlb which will handle segmentation permission and limit checks and paging. --HG-- extra : convert_revision : 6072f7d9eecbaa066d39d6da7f0180ea4a2615af
2007-10-03 08:00:37 +02:00
Source('pagetable.cc')
X86: Turn on the page table walker in SE mode.
2011-10-13 11:22:23 +02:00
Source('pagetable_walker.cc')
X86: Build the same files in SE and FS.
2011-10-30 11:06:40 +01:00
Source('process.cc')
Rework the way SCons recurses into subdirectories, making it automatic. The point is that now a subdirectory can be added to the build process just by creating a SConscript file in it. The process has two passes. On the first pass, all subdirs of the root of the tree are searched for SConsopts files. These files contain any command line options that ought to be added for a particular subdirectory. On the second pass, all subdirs of the src directory are searched for SConscript files. These files describe how to build any given subdirectory. I have added a Source() function. Any file (relative to the directory in which the SConscript resides) passed to that function is added to the build. Clean up everything to take advantage of Source(). function is added to the list of files to be built. --HG-- extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
2007-03-11 08:00:54 +01:00
Source('remote_gdb.cc')
X86: Build the same files in SE and FS.
2011-10-30 11:06:40 +01:00
Source('stacktrace.cc')
Source('system.cc')
Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. --HG-- extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
2007-08-27 05:24:18 +02:00
Source('tlb.cc')
X86: Make the x86 ExtMachInst serializable with (UN)SERIALIZE_SCALAR. --HG-- rename : src/arch/x86/types.hh => src/arch/x86/types.cc
2010-08-23 18:44:19 +02:00
Source('types.cc')
X86: Make initCPU and startupCPU do something basic. --HG-- extra : convert_revision : 1a04f4402f4f31e4e5cd482c7983d853fe117df5
2007-10-08 03:10:42 +02:00
Source('utility.cc')
X86: Build vtophys in SE mode.
2011-10-13 11:26:21 +02:00
Source('vtophys.cc')
Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. --HG-- extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
2007-08-27 05:24:18 +02:00
arch: Make the ISA class inherit from SimObject The ISA class on stores the contents of ID registers on many architectures. In order to make reset values of such registers configurable, we make the class inherit from SimObject, which allows us to use the normal generated parameter headers. This patch introduces a Python helper method, BaseCPU.createThreads(), which creates a set of ISAs for each of the threads in an SMT system. Although it is currently only needed when creating multi-threaded CPUs, it should always be called before instantiating the system as this is an obvious place to configure ID registers identifying a thread/CPU.
2013-01-07 19:05:35 +01:00
SimObject('X86ISA.py')
SE/FS: Build the Interrupt objects in SE mode.
2011-10-09 09:15:50 +02:00
SimObject('X86LocalApic.py')
CPU: Separate out native trace into ISA (in)dependent code and SimObjects. --HG-- rename : src/cpu/nativetrace.cc => src/arch/sparc/nativetrace.cc rename : src/cpu/nativetrace.hh => src/arch/sparc/nativetrace.hh rename : src/cpu/NativeTrace.py => src/arch/x86/X86NativeTrace.py
2009-07-20 08:54:56 +02:00
SimObject('X86NativeTrace.py')
X86: Build the same files in SE and FS.
2011-10-30 11:06:40 +01:00
SimObject('X86System.py')
Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. --HG-- extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
2007-08-27 05:24:18 +02:00
SimObject('X86TLB.py')
X86: Remove FULL_SYSTEM from the x86 faults.
2011-09-30 09:28:40 +02:00
DebugFlag('Faults', "Trace all faults/exceptions/traps")
SE/FS: Build the Interrupt objects in SE mode.
2011-10-09 09:15:50 +02:00
DebugFlag('LocalApic', "Local APIC debugging")
X86: Turn on the page table walker in SE mode.
2011-10-13 11:22:23 +02:00
DebugFlag('PageTableWalker', \
"Page table walker state machine debugging")
CPU: Merge the predecoder and decoder. These classes are always used together, and merging them will give the ISAs more flexibility in how they cache things and manage the process. --HG-- rename : src/arch/x86/predecoder_tables.cc => src/arch/x86/decoder_tables.cc
2012-05-26 22:44:46 +02:00
DebugFlag('Decoder', "Decoder debug output")
scons: rename TraceFlags to DebugFlags
2011-06-03 02:36:21 +02:00
DebugFlag('X86', "Generic X86 ISA debugging")
Add build hooks for x86. --HG-- extra : convert_revision : 438eb74f14e6ea60bab5012110f3946c9213786e
2007-03-03 17:01:48 +01:00
X86: Make the isa parser run if any of the microcode files change. --HG-- extra : convert_revision : 7f6d07de7e0d728a9333fb46c953dbe6cb04e600
2007-09-11 01:49:07 +02:00
python_files = (
X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode. --HG-- rename : src/arch/x86/isa/insts/sse/__init__.py => src/arch/x86/isa/insts/simd128/__init__.py extra : convert_revision : efb4405aebaa4a04f33572e7d078ceca45872d9c
2007-09-20 03:25:17 +02:00
'__init__.py',
'general_purpose/__init__.py',
'general_purpose/arithmetic/__init__.py',
'general_purpose/arithmetic/add_and_subtract.py',
'general_purpose/arithmetic/increment_and_decrement.py',
'general_purpose/arithmetic/multiply_and_divide.py',
'general_purpose/cache_and_memory_management.py',
'general_purpose/compare_and_test/__init__.py',
'general_purpose/compare_and_test/bit_scan.py',
'general_purpose/compare_and_test/bit_test.py',
'general_purpose/compare_and_test/bounds.py',
'general_purpose/compare_and_test/compare.py',
'general_purpose/compare_and_test/set_byte_on_condition.py',
'general_purpose/compare_and_test/test.py',
'general_purpose/control_transfer/__init__.py',
'general_purpose/control_transfer/call.py',
'general_purpose/control_transfer/conditional_jump.py',
'general_purpose/control_transfer/interrupts_and_exceptions.py',
'general_purpose/control_transfer/jump.py',
'general_purpose/control_transfer/loop.py',
'general_purpose/control_transfer/xreturn.py',
'general_purpose/data_conversion/__init__.py',
'general_purpose/data_conversion/ascii_adjust.py',
'general_purpose/data_conversion/bcd_adjust.py',
'general_purpose/data_conversion/endian_conversion.py',
'general_purpose/data_conversion/extract_sign_mask.py',
'general_purpose/data_conversion/sign_extension.py',
'general_purpose/data_conversion/translate.py',
'general_purpose/data_transfer/__init__.py',
'general_purpose/data_transfer/conditional_move.py',
'general_purpose/data_transfer/move.py',
'general_purpose/data_transfer/stack_operations.py',
'general_purpose/data_transfer/xchg.py',
'general_purpose/flags/__init__.py',
'general_purpose/flags/load_and_store.py',
'general_purpose/flags/push_and_pop.py',
'general_purpose/flags/set_and_clear.py',
'general_purpose/input_output/__init__.py',
'general_purpose/input_output/general_io.py',
'general_purpose/input_output/string_io.py',
'general_purpose/load_effective_address.py',
'general_purpose/load_segment_registers.py',
'general_purpose/logical.py',
'general_purpose/no_operation.py',
'general_purpose/rotate_and_shift/__init__.py',
'general_purpose/rotate_and_shift/rotate.py',
'general_purpose/rotate_and_shift/shift.py',
'general_purpose/semaphores.py',
'general_purpose/string/__init__.py',
'general_purpose/string/compare_strings.py',
'general_purpose/string/load_string.py',
'general_purpose/string/move_string.py',
'general_purpose/string/scan_string.py',
'general_purpose/string/store_string.py',
'general_purpose/system_calls.py',
X86: Implement entering an interrupt in microcode.
2008-10-13 07:42:03 +02:00
'romutil.py',
X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode. --HG-- rename : src/arch/x86/isa/insts/sse/__init__.py => src/arch/x86/isa/insts/simd128/__init__.py extra : convert_revision : efb4405aebaa4a04f33572e7d078ceca45872d9c
2007-09-20 03:25:17 +02:00
'system/__init__.py',
X86: Implement CLTS.
2009-02-25 19:21:02 +01:00
'system/control_registers.py',
X86: Impelement the HLT instruction and fix the "halt" microop. --HG-- extra : convert_revision : 932e5bb5bf3644f8468dba92177fb87cc54b891a
2007-10-20 00:11:15 +02:00
'system/halt.py',
X86: Implement the INVLPG instruction and the TIA microop. --HG-- extra : convert_revision : 31db1ee082f6c3ca5443cba1eb335e408661ead2
2008-02-27 05:39:22 +01:00
'system/invlpg.py',
X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode. --HG-- rename : src/arch/x86/isa/insts/sse/__init__.py => src/arch/x86/isa/insts/simd128/__init__.py extra : convert_revision : efb4405aebaa4a04f33572e7d078ceca45872d9c
2007-09-20 03:25:17 +02:00
'system/undefined_operation.py',
X86: Implement MSR reads and writes and the wrsmr and rdmsr instructions. There are no priviledge checks, so these instructions will all work in all modes. --HG-- extra : convert_revision : ff893eb569313d8aecbfffb47bcbd1c2d65cd393
2007-10-13 01:37:55 +02:00
'system/msrs.py',
X86: Add a missing microcode file to the sconscript. --HG-- extra : convert_revision : 6da8a67e07bada169abf7f10aded8a90d4e63eae
2007-12-02 08:07:41 +01:00
'system/segmentation.py',
X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode. --HG-- rename : src/arch/x86/isa/insts/sse/__init__.py => src/arch/x86/isa/insts/simd128/__init__.py extra : convert_revision : efb4405aebaa4a04f33572e7d078ceca45872d9c
2007-09-20 03:25:17 +02:00
'simd128/__init__.py',
'simd128/integer/__init__.py',
'simd128/integer/data_transfer/__init__.py',
'simd128/integer/data_transfer/move.py',
'simd128/integer/data_transfer/move_non_temporal.py',
'simd128/integer/data_transfer/move_mask.py',
'simd128/integer/data_conversion/__init__.py',
'simd128/integer/data_conversion/convert_mmx_integer_to_floating_point.py',
'simd128/integer/data_conversion/convert_integer_to_floating_point.py',
'simd128/integer/data_conversion/convert_gpr_integer_to_floating_point.py',
'simd128/integer/data_reordering/__init__.py',
'simd128/integer/data_reordering/unpack_and_interleave.py',
'simd128/integer/data_reordering/pack_with_saturation.py',
'simd128/integer/data_reordering/extract_and_insert.py',
'simd128/integer/data_reordering/shuffle.py',
'simd128/integer/arithmetic/__init__.py',
'simd128/integer/arithmetic/subtraction.py',
'simd128/integer/arithmetic/addition.py',
'simd128/integer/arithmetic/multiplication.py',
'simd128/integer/arithmetic/multiply_add.py',
'simd128/integer/arithmetic/average.py',
'simd128/integer/arithmetic/sum_of_absolute_differences.py',
'simd128/integer/shift/__init__.py',
'simd128/integer/shift/right_arithmetic_shift.py',
'simd128/integer/shift/left_logical_shift.py',
'simd128/integer/shift/right_logical_shift.py',
'simd128/integer/compare/__init__.py',
'simd128/integer/compare/compare_and_write_mask.py',
'simd128/integer/compare/compare_and_write_minimum_or_maximum.py',
'simd128/integer/logical/__init__.py',
'simd128/integer/logical/pand.py',
'simd128/integer/logical/por.py',
'simd128/integer/logical/exclusive_or.py',
'simd128/integer/save_and_restore_state/__init__.py',
'simd128/integer/save_and_restore_state/save_and_restore_state.py',
'simd128/integer/save_and_restore_state/save_and_restore_control_and_status.py',
'simd128/floating_point/__init__.py',
'simd128/floating_point/data_transfer/__init__.py',
'simd128/floating_point/data_transfer/move_mask.py',
'simd128/floating_point/data_transfer/move.py',
'simd128/floating_point/data_transfer/move_with_duplication.py',
'simd128/floating_point/data_transfer/move_non_temporal.py',
'simd128/floating_point/data_conversion/__init__.py',
'simd128/floating_point/data_conversion/convert_floating_point_to_floating_point.py',
'simd128/floating_point/data_conversion/convert_floating_point_to_xmm_integer.py',
'simd128/floating_point/data_conversion/convert_floating_point_to_mmx_integer.py',
'simd128/floating_point/data_conversion/convert_floating_point_to_gpr_integer.py',
'simd128/floating_point/data_reordering/__init__.py',
'simd128/floating_point/data_reordering/unpack_and_interleave.py',
'simd128/floating_point/data_reordering/shuffle.py',
'simd128/floating_point/arithmetic/__init__.py',
'simd128/floating_point/arithmetic/subtraction.py',
'simd128/floating_point/arithmetic/addition.py',
'simd128/floating_point/arithmetic/horizontal_subtraction.py',
'simd128/floating_point/arithmetic/horizontal_addition.py',
'simd128/floating_point/arithmetic/square_root.py',
'simd128/floating_point/arithmetic/simultaneous_addition_and_subtraction.py',
'simd128/floating_point/arithmetic/multiplication.py',
'simd128/floating_point/arithmetic/division.py',
'simd128/floating_point/arithmetic/reciprocal_square_root.py',
'simd128/floating_point/arithmetic/reciprocal_estimation.py',
'simd128/floating_point/compare/__init__.py',
'simd128/floating_point/compare/compare_and_write_mask.py',
'simd128/floating_point/compare/compare_and_write_rflags.py',
'simd128/floating_point/compare/compare_and_write_minimum_or_maximum.py',
'simd128/floating_point/logical/__init__.py',
'simd128/floating_point/logical/andp.py',
'simd128/floating_point/logical/orp.py',
'simd128/floating_point/logical/exclusive_or.py',
'simd64/__init__.py',
'simd64/integer/__init__.py',
'simd64/integer/data_transfer/__init__.py',
'simd64/integer/data_transfer/move_mask.py',
'simd64/integer/data_transfer/move.py',
'simd64/integer/data_transfer/move_non_temporal.py',
'simd64/integer/exit_media_state.py',
'simd64/integer/data_reordering/__init__.py',
'simd64/integer/data_reordering/unpack_and_interleave.py',
'simd64/integer/data_reordering/pack_with_saturation.py',
'simd64/integer/data_reordering/extract_and_insert.py',
'simd64/integer/data_reordering/shuffle_and_swap.py',
'simd64/integer/data_conversion.py',
'simd64/integer/arithmetic/__init__.py',
'simd64/integer/arithmetic/subtraction.py',
'simd64/integer/arithmetic/addition.py',
'simd64/integer/arithmetic/multiplication.py',
'simd64/integer/arithmetic/multiply_add.py',
'simd64/integer/arithmetic/average.py',
'simd64/integer/arithmetic/sum_of_absolute_differences.py',
'simd64/integer/shift/__init__.py',
'simd64/integer/shift/right_arithmetic_shift.py',
'simd64/integer/shift/left_logical_shift.py',
'simd64/integer/shift/right_logical_shift.py',
'simd64/integer/compare/__init__.py',
'simd64/integer/compare/compare_and_write_mask.py',
'simd64/integer/compare/compare_and_write_minimum_or_maximum.py',
'simd64/integer/logical/__init__.py',
'simd64/integer/logical/pand.py',
'simd64/integer/logical/por.py',
'simd64/integer/logical/exclusive_or.py',
'simd64/integer/save_and_restore_state.py',
'simd64/floating_point/__init__.py',
'simd64/floating_point/arithmetic/__init__.py',
'simd64/floating_point/arithmetic/subtraction.py',
'simd64/floating_point/arithmetic/addition.py',
'simd64/floating_point/arithmetic/reciprocal_estimation.py',
'simd64/floating_point/arithmetic/multiplication.py',
'simd64/floating_point/arithmetic/accumulation.py',
'simd64/floating_point/arithmetic/reciprocal_square_root.py',
'simd64/floating_point/data_conversion.py',
'simd64/floating_point/compare/__init__.py',
'simd64/floating_point/compare/compare_and_write_mask.py',
'simd64/floating_point/compare/compare_and_write_minimum_or_maximum.py',
'x87/__init__.py',
'x87/data_transfer_and_conversion/__init__.py',
'x87/data_transfer_and_conversion/convert_and_load_or_store_integer.py',
'x87/data_transfer_and_conversion/load_or_store_floating_point.py',
'x87/data_transfer_and_conversion/exchange.py',
'x87/data_transfer_and_conversion/convert_and_load_or_store_bcd.py',
'x87/data_transfer_and_conversion/conditional_move.py',
'x87/data_transfer_and_conversion/extract.py',
'x87/load_constants/__init__.py',
'x87/load_constants/load_0_1_or_pi.py',
'x87/load_constants/load_logarithm.py',
'x87/arithmetic/__init__.py',
'x87/arithmetic/subtraction.py',
'x87/arithmetic/addition.py',
'x87/arithmetic/partial_remainder.py',
'x87/arithmetic/multiplication.py',
'x87/arithmetic/division.py',
'x87/arithmetic/change_sign.py',
'x87/arithmetic/round.py',
'x87/arithmetic/square_root.py',
'x87/transcendental_functions/__init__.py',
'x87/transcendental_functions/trigonometric_functions.py',
'x87/transcendental_functions/logarithmic_functions.py',
'x87/compare_and_test/__init__.py',
'x87/compare_and_test/classify.py',
'x87/compare_and_test/test.py',
'x87/compare_and_test/floating_point_ordered_compare.py',
'x87/compare_and_test/floating_point_unordered_compare.py',
'x87/compare_and_test/integer_compare.py',
'x87/stack_management/__init__.py',
'x87/stack_management/stack_control.py',
'x87/stack_management/clear_state.py',
'x87/control/__init__.py',
'x87/control/clear_exceptions.py',
'x87/control/initialize.py',
'x87/control/wait_for_exceptions.py',
'x87/control/save_x87_status_word.py',
'x87/control/save_and_restore_x87_control_word.py',
'x87/control/save_and_restore_x87_environment.py',
'x87/no_operation.py'
)
X86: Make the isa parser run if any of the microcode files change. --HG-- extra : convert_revision : 7f6d07de7e0d728a9333fb46c953dbe6cb04e600
2007-09-11 01:49:07 +02:00
Rework the way SCons recurses into subdirectories, making it automatic. The point is that now a subdirectory can be added to the build process just by creating a SConscript file in it. The process has two passes. On the first pass, all subdirs of the root of the tree are searched for SConsopts files. These files contain any command line options that ought to be added for a particular subdirectory. On the second pass, all subdirs of the src directory are searched for SConscript files. These files describe how to build any given subdirectory. I have added a Source() function. Any file (relative to the directory in which the SConscript resides) passed to that function is added to the build. Clean up everything to take advantage of Source(). function is added to the list of files to be built. --HG-- extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
2007-03-11 08:00:54 +01:00
# Add in files generated by the ISA description.
isa_desc_files = env.ISADesc('isa/main.isa')
for f in isa_desc_files:
X86: Make the isa parser run if any of the microcode files change. --HG-- extra : convert_revision : 7f6d07de7e0d728a9333fb46c953dbe6cb04e600
2007-09-11 01:49:07 +02:00
# Add in python file dependencies that won't be caught otherwise
for pyfile in python_files:
env.Depends(f, "isa/insts/%s" % pyfile)
# Only non-header files need to be compiled.
Rework the way SCons recurses into subdirectories, making it automatic. The point is that now a subdirectory can be added to the build process just by creating a SConscript file in it. The process has two passes. On the first pass, all subdirs of the root of the tree are searched for SConsopts files. These files contain any command line options that ought to be added for a particular subdirectory. On the second pass, all subdirs of the src directory are searched for SConscript files. These files describe how to build any given subdirectory. I have added a Source() function. Any file (relative to the directory in which the SConscript resides) passed to that function is added to the build. Clean up everything to take advantage of Source(). function is added to the list of files to be built. --HG-- extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
2007-03-11 08:00:54 +01:00
if not f.path.endswith('.hh'):
Source(f)
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