X86: Make the x86 ExtMachInst serializable with (UN)SERIALIZE_SCALAR.
--HG-- rename : src/arch/x86/types.hh => src/arch/x86/types.cc
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Gabe Black
parent
249549f9c3
commit
172e45fc97
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@ -59,6 +59,7 @@ if env['TARGET_ISA'] == 'x86':
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Source('predecoder_tables.cc')
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Source('remote_gdb.cc')
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Source('tlb.cc')
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Source('types.cc')
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Source('utility.cc')
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SimObject('X86NativeTrace.py')
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107
src/arch/x86/types.cc
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107
src/arch/x86/types.cc
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@ -0,0 +1,107 @@
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/*
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* Copyright (c) 2010 Gabe Black
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#include "arch/x86/types.hh"
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#include "sim/serialize.hh"
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using namespace X86ISA;
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using namespace std;
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template <>
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void
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paramOut(ostream &os, const string &name, ExtMachInst const &machInst)
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{
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// Prefixes
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paramOut(os, name + ".legacy", (uint8_t)machInst.legacy);
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paramOut(os, name + ".rex", (uint8_t)machInst.rex);
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// Opcode
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paramOut(os, name + ".opcode.num", machInst.opcode.num);
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paramOut(os, name + ".opcode.prefixA", machInst.opcode.prefixA);
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paramOut(os, name + ".opcode.prefixB", machInst.opcode.prefixB);
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paramOut(os, name + ".opcode.op", (uint8_t)machInst.opcode.op);
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// Modifier bytes
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paramOut(os, name + ".modRM", (uint8_t)machInst.modRM);
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paramOut(os, name + ".sib", (uint8_t)machInst.sib);
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// Immediate fields
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paramOut(os, name + ".immediate", machInst.immediate);
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paramOut(os, name + ".displacement", machInst.displacement);
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// Sizes
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paramOut(os, name + ".opSize", machInst.opSize);
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paramOut(os, name + ".addrSize", machInst.addrSize);
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paramOut(os, name + ".stackSize", machInst.stackSize);
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paramOut(os, name + ".dispSize", machInst.dispSize);
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// Mode
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paramOut(os, name + ".mode", (uint8_t)machInst.mode);
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}
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template <>
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void
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paramIn(Checkpoint *cp, const string §ion,
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const string &name, ExtMachInst &machInst)
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{
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uint8_t temp8;
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// Prefixes
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paramIn(cp, section, name + ".legacy", temp8);
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machInst.legacy = temp8;
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paramIn(cp, section, name + ".rex", temp8);
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machInst.rex = temp8;
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// Opcode
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paramIn(cp, section, name + ".opcode.num", machInst.opcode.num);
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paramIn(cp, section, name + ".opcode.prefixA", machInst.opcode.prefixA);
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paramIn(cp, section, name + ".opcode.prefixB", machInst.opcode.prefixB);
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paramIn(cp, section, name + ".opcode.op", temp8);
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machInst.opcode.op = temp8;
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// Modifier bytes
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paramIn(cp, section, name + ".modRM", temp8);
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machInst.modRM = temp8;
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paramIn(cp, section, name + ".sib", temp8);
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machInst.sib = temp8;;
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// Immediate fields
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paramIn(cp, section, name + ".immediate", machInst.immediate);
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paramIn(cp, section, name + ".displacement", machInst.displacement);
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// Sizes
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paramIn(cp, section, name + ".opSize", machInst.opSize);
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paramIn(cp, section, name + ".addrSize", machInst.addrSize);
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paramIn(cp, section, name + ".stackSize", machInst.stackSize);
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paramIn(cp, section, name + ".dispSize", machInst.dispSize);
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// Mode
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paramIn(cp, section, name + ".mode", temp8);
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machInst.mode = temp8;
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}
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@ -45,6 +45,7 @@
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#include "base/bitunion.hh"
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#include "base/cprintf.hh"
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#include "base/types.hh"
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#include "sim/serialize.hh"
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namespace X86ISA
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{
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@ -224,4 +225,15 @@ namespace X86ISA
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};
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};
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// These two functions allow ExtMachInst to be used with SERIALIZE_SCALAR
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// and UNSERIALIZE_SCALAR.
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template <>
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void
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paramOut(std::ostream &os, const std::string &name,
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const X86ISA::ExtMachInst &machInst);
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template <>
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void
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paramIn(Checkpoint *cp, const std::string §ion,
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const std::string &name, X86ISA::ExtMachInst &machInst);
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#endif // __ARCH_X86_TYPES_HH__
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