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gem5/src/cpu/minor
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Steve Reinhardt ee0b52404c mem: restructure Packet cmd initialization a bit more 
Refactor the way that specific MemCmd values are generated for packets.
The new approach is a little more elegant in that we assign the right
value up front, and it's also more amenable to non-heap-allocated
Packet objects.

Also replaced the code in the Minor model that was still doing it the
ad-hoc way.

This is basically a refinement of http://repo.gem5.org/gem5/rev/711eb0e64249.
2015-02-11 10:48:50 -08:00
..
activity.cc cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
activity.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
buffers.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
cpu.cc alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate 2014-09-20 17:18:35 -04:00
cpu.hh alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate 2014-09-20 17:18:35 -04:00
decode.cc arm: Fixes based on UBSan and static analysis 2014-11-14 03:53:51 -05:00
decode.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
dyn_inst.cc cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
dyn_inst.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
exec_context.hh arch: Make readMiscRegNoEffect const throughout 2015-02-16 03:33:28 -05:00
execute.cc cpu: Fix memoryIssueLimit checking in Minor 2014-12-02 06:08:13 -05:00
execute.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
fetch1.cc mem: Split port retry for all different packet classes 2015-03-02 04:00:35 -05:00
fetch1.hh mem: Split port retry for all different packet classes 2015-03-02 04:00:35 -05:00
fetch2.cc arm: Fixes based on UBSan and static analysis 2014-11-14 03:53:51 -05:00
fetch2.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
func_unit.cc arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
func_unit.hh arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
lsq.cc mem: restructure Packet cmd initialization a bit more 2015-02-11 10:48:50 -08:00
lsq.hh mem: Split port retry for all different packet classes 2015-03-02 04:00:35 -05:00
MinorCPU.py cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
pipe_data.cc cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
pipe_data.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
pipeline.cc cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
pipeline.hh cpu: Probe points for basic PMU stats 2014-10-16 05:49:41 -04:00
SConscript cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
SConsopts arch, cpu: Factor out the ExecContext into a proper base class 2014-09-03 07:42:22 -04:00
scoreboard.cc cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
scoreboard.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
stats.cc cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
stats.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
trace.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00