cpu: Probe points for basic PMU stats
This changeset adds probe points that can be used to implement PMU counters for CPU stats. The following probes are supported: * BaseCPU::ppCycles / Cycles * BaseCPU::ppRetiredInsts / RetiredInsts * BaseCPU::ppRetiredLoads / RetiredLoads * BaseCPU::ppRetiredStores / RetiredStores * BaseCPU::ppRetiredBranches RetiredBranches
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9d35d48e84
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10 changed files with 150 additions and 16 deletions
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@ -283,6 +283,42 @@ BaseCPU::startup()
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}
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}
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ProbePoints::PMUUPtr
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BaseCPU::pmuProbePoint(const char *name)
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{
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ProbePoints::PMUUPtr ptr;
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ptr.reset(new ProbePoints::PMU(getProbeManager(), name));
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return ptr;
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}
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void
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BaseCPU::regProbePoints()
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{
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ppCycles = pmuProbePoint("Cycles");
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ppRetiredInsts = pmuProbePoint("RetiredInsts");
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ppRetiredLoads = pmuProbePoint("RetiredLoads");
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ppRetiredStores = pmuProbePoint("RetiredStores");
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ppRetiredBranches = pmuProbePoint("RetiredBranches");
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}
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void
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BaseCPU::probeInstCommit(const StaticInstPtr &inst)
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{
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if (!inst->isMicroop() || inst->isLastMicroop())
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ppRetiredInsts->notify(1);
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if (inst->isLoad())
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ppRetiredLoads->notify(1);
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if (inst->isStore())
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ppRetiredLoads->notify(1);
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if (inst->isControl())
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ppRetiredBranches->notify(1);
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}
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void
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BaseCPU::regStats()
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@ -62,6 +62,7 @@
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#include "sim/eventq.hh"
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#include "sim/full_system.hh"
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#include "sim/insttracer.hh"
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#include "sim/probe/pmu.hh"
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#include "sim/system.hh"
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struct BaseCPUParams;
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@ -280,6 +281,8 @@ class BaseCPU : public MemObject
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virtual void startup();
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virtual void regStats();
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void regProbePoints() M5_ATTR_OVERRIDE;
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void registerThreadContexts();
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/**
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@ -437,6 +440,54 @@ class BaseCPU : public MemObject
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*/
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void scheduleLoadStop(ThreadID tid, Counter loads, const char *cause);
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public:
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/**
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* @{
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* @name PMU Probe points.
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*/
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/**
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* Helper method to trigger PMU probes for a committed
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* instruction.
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*
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* @param inst Instruction that just committed
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*/
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virtual void probeInstCommit(const StaticInstPtr &inst);
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/**
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* Helper method to instantiate probe points belonging to this
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* object.
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*
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* @param name Name of the probe point.
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* @return A unique_ptr to the new probe point.
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*/
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ProbePoints::PMUUPtr pmuProbePoint(const char *name);
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/** CPU cycle counter */
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ProbePoints::PMUUPtr ppCycles;
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/**
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* Instruction commit probe point.
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*
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* This probe point is triggered whenever one or more instructions
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* are committed. It is normally triggered once for every
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* instruction. However, CPU models committing bundles of
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* instructions may call notify once for the entire bundle.
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*/
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ProbePoints::PMUUPtr ppRetiredInsts;
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/** Retired load instructions */
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ProbePoints::PMUUPtr ppRetiredLoads;
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/** Retired store instructions */
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ProbePoints::PMUUPtr ppRetiredStores;
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/** Retired branches (any type) */
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ProbePoints::PMUUPtr ppRetiredBranches;
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/** @} */
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// Function tracing
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private:
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bool functionTracingEnabled;
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@ -853,6 +853,8 @@ Execute::doInstCommitAccounting(MinorDynInstPtr inst)
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/* Set the CP SeqNum to the numOps commit number */
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if (inst->traceData)
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inst->traceData->setCPSeq(thread->numOp);
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cpu.probeInstCommit(inst->staticInst);
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}
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bool
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@ -126,6 +126,11 @@ class Pipeline : public Ticked
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* stages and pipeline advance) */
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void evaluate();
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void countCycles(Cycles delta) M5_ATTR_OVERRIDE
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{
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cpu.ppCycles->notify(delta);
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}
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void minorTrace() const;
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/** Functions below here are BaseCPU operations passed on to pipeline
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@ -405,8 +405,11 @@ template <class Impl>
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void
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FullO3CPU<Impl>::regProbePoints()
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{
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BaseCPU::regProbePoints();
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ppInstAccessComplete = new ProbePointArg<PacketPtr>(getProbeManager(), "InstAccessComplete");
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ppDataAccessComplete = new ProbePointArg<std::pair<DynInstPtr, PacketPtr> >(getProbeManager(), "DataAccessComplete");
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fetch.regProbePoints();
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iew.regProbePoints();
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commit.regProbePoints();
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@ -534,6 +537,7 @@ FullO3CPU<Impl>::tick()
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assert(getDrainState() != Drainable::Drained);
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++numCycles;
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ppCycles->notify(1);
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// activity = false;
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@ -1444,6 +1448,8 @@ FullO3CPU<Impl>::instDone(ThreadID tid, DynInstPtr &inst)
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// Check for instruction-count-based events.
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comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst);
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system->instEventQueue.serviceEvents(system->totalNumInsts);
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probeInstCommit(inst->staticInst);
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}
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template <class Impl>
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@ -1622,10 +1628,12 @@ FullO3CPU<Impl>::wakeCPU()
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Cycles cycles(curCycle() - lastRunningCycle);
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// @todo: This is an oddity that is only here to match the stats
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if (cycles != 0)
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if (cycles > 1) {
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--cycles;
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idleCycles += cycles;
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numCycles += cycles;
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idleCycles += cycles;
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numCycles += cycles;
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ppCycles->notify(cycles);
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}
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schedule(tickEvent, clockEdge());
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}
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@ -233,7 +233,9 @@ AtomicSimpleCPU::activateContext(ThreadID thread_num)
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assert(!tickEvent.scheduled());
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notIdleFraction = 1;
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numCycles += ticksToCycles(thread->lastActivate - thread->lastSuspend);
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Cycles delta = ticksToCycles(thread->lastActivate - thread->lastSuspend);
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numCycles += delta;
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ppCycles->notify(delta);
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//Make sure ticks are still on multiples of cycles
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schedule(tickEvent, clockEdge(Cycles(0)));
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@ -501,6 +503,7 @@ AtomicSimpleCPU::tick()
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for (int i = 0; i < width || locked; ++i) {
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numCycles++;
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ppCycles->notify(1);
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if (!curStaticInst || !curStaticInst->isDelayedCommit())
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checkForInterrupts();
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@ -614,6 +617,8 @@ AtomicSimpleCPU::tick()
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void
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AtomicSimpleCPU::regProbePoints()
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{
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BaseCPU::regProbePoints();
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ppCommit = new ProbePointArg<pair<SimpleThread*, const StaticInstPtr>>
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(getProbeManager(), "Commit");
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}
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@ -544,6 +544,9 @@ BaseSimpleCPU::postExecute()
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delete traceData;
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traceData = NULL;
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}
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// Call CPU instruction commit probes
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probeInstCommit(curStaticInst);
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}
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void
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@ -178,7 +178,7 @@ TimingSimpleCPU::switchOut()
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assert(!stayAtPC);
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assert(microPC() == 0);
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numCycles += curCycle() - previousCycle;
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updateCycleCounts();
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}
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@ -332,8 +332,7 @@ TimingSimpleCPU::translationFault(const Fault &fault)
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{
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// fault may be NoFault in cases where a fault is suppressed,
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// for instance prefetches.
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numCycles += curCycle() - previousCycle;
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previousCycle = curCycle();
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updateCycleCounts();
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if (traceData) {
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// Since there was a fault, we shouldn't trace this instruction.
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@ -569,8 +568,7 @@ TimingSimpleCPU::fetch()
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_status = IcacheWaitResponse;
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completeIfetch(NULL);
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numCycles += curCycle() - previousCycle;
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previousCycle = curCycle();
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updateCycleCounts();
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}
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}
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@ -603,8 +601,7 @@ TimingSimpleCPU::sendFetch(const Fault &fault, RequestPtr req,
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advanceInst(fault);
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}
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numCycles += curCycle() - previousCycle;
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previousCycle = curCycle();
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updateCycleCounts();
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}
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@ -651,8 +648,7 @@ TimingSimpleCPU::completeIfetch(PacketPtr pkt)
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_status = BaseSimpleCPU::Running;
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numCycles += curCycle() - previousCycle;
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previousCycle = curCycle();
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updateCycleCounts();
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if (pkt)
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pkt->req->setAccessLatency();
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@ -753,8 +749,8 @@ TimingSimpleCPU::completeDataAccess(PacketPtr pkt)
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pkt->req->getFlags().isSet(Request::NO_ACCESS));
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pkt->req->setAccessLatency();
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numCycles += curCycle() - previousCycle;
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previousCycle = curCycle();
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updateCycleCounts();
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if (pkt->senderState) {
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SplitFragmentSenderState * send_state =
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advanceInst(fault);
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}
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void
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TimingSimpleCPU::updateCycleCounts()
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{
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const Cycles delta(curCycle() - previousCycle);
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numCycles += delta;
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ppCycles->notify(delta);
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previousCycle = curCycle();
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}
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void
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TimingSimpleCPU::DcachePort::recvTimingSnoopReq(PacketPtr pkt)
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{
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@ -245,13 +245,15 @@ class TimingSimpleCPU : public BaseSimpleCPU
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};
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void updateCycleCounts();
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IcachePort icachePort;
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DcachePort dcachePort;
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PacketPtr ifetch_pkt;
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PacketPtr dcache_pkt;
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Tick previousCycle;
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Cycles previousCycle;
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protected:
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@ -76,6 +76,7 @@ class Ticked
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{
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++owner.tickCycles;
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++owner.numCycles;
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owner.countCycles(Cycles(1));
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owner.evaluate();
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if (owner.running) {
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owner.object.schedule(this,
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object.schedule(event, object.clockEdge(Cycles(1)));
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running = true;
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numCycles += cyclesSinceLastStopped();
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countCycles(cyclesSinceLastStopped());
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}
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}
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/** Action to call on the clock tick */
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virtual void evaluate() = 0;
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/**
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* Callback to handle cycle statistics and probes.
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*
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* This callback is called at the beginning of a new cycle active
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* cycle and when restarting the ticked object. The delta
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* parameter indicates the number of cycles elapsed since the
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* previous call is normally '1' unless the object has been
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* stopped and restarted.
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*
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* @param delta Number of cycles since the previous call.
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*/
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virtual void countCycles(Cycles delta) {}
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};
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/** TickedObject attaches Ticked to ClockedObject and can be used as
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