gem5/src/arch/sparc
Gabe Black 17e83e7f83 SPARC: Make 64 bit SPARC process initialization check checkpointRestored too.
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extra : convert_revision : 8d48f705983f31db5947c6c4ae9f0df57f413d68
2007-11-07 15:03:49 -08:00
..
isa String constant const-ness changes to placate g++ 4.2. 2007-10-31 18:04:22 -07:00
linux Make the process objects use the Params structs in their constructors, and use a limit to check if access are on the stack. 2007-10-16 18:04:01 -07:00
solaris Make the process objects use the Params structs in their constructors, and use a limit to check if access are on the stack. 2007-10-16 18:04:01 -07:00
asi.cc Panic if any CMT registers are accessed 2007-03-08 21:49:13 -05:00
asi.hh Panic if any CMT registers are accessed 2007-03-08 21:49:13 -05:00
faults.cc TLB: Fix serialization issues with the tlb entries and make the page table store the process, not the system. 2007-10-25 19:04:44 -07:00
faults.hh Address translation: Make the page table more flexible. 2007-08-26 20:33:57 -07:00
floatregfile.cc fix mostly floating point related 2007-02-02 18:04:42 -05:00
floatregfile.hh Moved some constants from isa_traits.hh to the reg file headers. 2006-11-22 23:49:44 -05:00
handlers.hh SPARC: Make the spill and fill handlers use the correct ASI, and let No_Fault ASI accesses work. 2007-08-13 16:02:47 -07:00
interrupts.hh *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg 2007-03-07 15:04:31 -05:00
intregfile.cc Make SPARC checkpointing work 2007-01-30 18:25:39 -05:00
intregfile.hh Fixed an off-by-one error. 2007-03-08 00:55:16 -05:00
isa_traits.hh Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. 2007-08-26 20:24:18 -07:00
kernel_stats.hh Put kernel_stats back into arch. 2006-11-07 22:34:34 -05:00
locked_mem.hh Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing) 2006-10-08 10:53:24 -07:00
miscregfile.cc SPARC: Move tlb state into the tlb. 2007-08-13 16:06:50 -07:00
miscregfile.hh SPARC: Move tlb state into the tlb. 2007-08-13 16:06:50 -07:00
mmaped_ipr.hh reogranize code to split off FS only misc regs with effect into their own file (reducing the number of if FULL_SYSTEM defines and includes) 2006-12-04 19:39:57 -05:00
pagetable.cc Make SPARC checkpointing work 2007-01-30 18:25:39 -05:00
pagetable.hh TLB: Fix serialization issues with the tlb entries and make the page table store the process, not the system. 2007-10-25 19:04:44 -07:00
predecoder.hh Predecoder: Clear out predecoder state on an ITLB fault. 2007-10-02 22:21:38 -07:00
process.cc SPARC: Make 64 bit SPARC process initialization check checkpointRestored too. 2007-11-07 15:03:49 -08:00
process.hh Make the process objects use the Params structs in their constructors, and use a limit to check if access are on the stack. 2007-10-16 18:04:01 -07:00
regfile.cc SPARC: Move tlb state into the tlb. 2007-08-13 16:06:50 -07:00
regfile.hh SPARC: Fix linking error from new flattenFloatIndex function. 2007-09-19 19:08:42 -07:00
remote_gdb.cc SPARC,Remote GDB: Flesh out the acc function for SE mode. 2007-10-02 18:25:10 -07:00
remote_gdb.hh SPARC,Remote GDB: Fix an accounting bug in the remote gdb stuff. 2007-10-02 18:24:24 -07:00
SConscript Traceflags: Add SCons function to created a traceflag instead of having one file with them all. 2007-10-31 01:21:54 -04:00
SConsopts Rework the way SCons recurses into subdirectories, making it 2007-03-10 23:00:54 -08:00
sparc_traits.hh Make the GSR into a renamed control register. It should be split into a renamed part and a control part for the different bitfields, but the renamed part is all that's actually used. 2007-04-22 17:43:45 +00:00
SparcSystem.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
SparcTLB.py Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
stacktrace.cc *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg 2007-03-07 15:04:31 -05:00
stacktrace.hh Put the ProcessInfo and StackTrace objects into the ISA namespaces. 2006-11-08 00:52:04 -05:00
syscallreturn.hh *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg 2007-03-07 15:04:31 -05:00
system.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
system.hh Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
tlb.cc Rename cycles() function to ticks() 2007-09-28 13:21:52 -04:00
tlb.hh params: Deprecate old-style constructors; update most SimObject constructors. 2007-08-30 15:16:59 -04:00
tlb_map.hh fix smul and sdiv to sign extend, and handle overflow/underflow corretly 2007-01-25 13:43:46 -05:00
types.hh SPARC: Fixes to get SPARC to compile again. 2007-08-27 18:26:36 -07:00
ua2005.cc Rename cycles() function to ticks() 2007-09-28 13:21:52 -04:00
utility.cc Arguments: Get rid of duplicate code for the Arguments class in each architecture. 2007-08-01 16:59:14 -04:00
utility.hh Arguments: Get rid of duplicate code for the Arguments class in each architecture. 2007-08-01 16:59:14 -04:00
vtophys.cc *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg 2007-03-07 15:04:31 -05:00
vtophys.hh implement vtophys and 32bit gdb support 2007-02-18 19:57:46 -05:00