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cache
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Mem: Fix issue with prefetches originating at non-L1 caches getting stale data
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2011-07-15 11:53:35 -05:00 |
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config
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Fixes to get prefetching working again.
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2009-02-16 08:56:40 -08:00 |
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protocol
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BuildEnv: Eliminate RUBY as build environment variable
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2011-08-08 10:50:13 -05:00 |
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ruby
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Ruby: Initialize some variables.
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2011-08-15 12:56:47 -05:00 |
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slicc
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SLICC: Put functions of a controller in its .cc file
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2011-07-27 20:20:53 -05:00 |
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bridge.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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bridge.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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Bridge.py
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DMA: Add IOCache and fix bus bridge to optionally only send requests one
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2007-08-10 16:14:01 -04:00 |
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bus.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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bus.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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Bus.py
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bus: clean up default responder code.
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2010-08-17 05:06:21 -07:00 |
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dram.cc
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Replace curTick global variable with accessor functions.
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2011-01-07 21:50:29 -08:00 |
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dram.hh
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stats: Fix all stats usages to deal with template fixes
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2009-03-05 19:09:53 -08:00 |
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mem_object.cc
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params: Get rid of the remnants of the old style parameter configuration stuff.
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2008-08-11 12:22:17 -07:00 |
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mem_object.hh
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params: Get rid of the remnants of the old style parameter configuration stuff.
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2008-08-11 12:22:17 -07:00 |
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MemObject.py
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Major changes to how SimObjects are created and initialized. Almost all
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2007-07-23 21:51:38 -07:00 |
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mport.cc
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Replace curTick global variable with accessor functions.
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2011-01-07 21:50:29 -08:00 |
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mport.hh
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Create a message port for sending messages as apposed to reading/writing a memory range.
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2008-10-12 12:08:51 -07:00 |
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packet.cc
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Ruby: Add support for functional accesses
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2011-06-30 19:49:26 -05:00 |
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packet.hh
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Ruby: Add support for functional accesses
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2011-06-30 19:49:26 -05:00 |
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packet_access.hh
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arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
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2009-09-23 08:34:21 -07:00 |
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page_table.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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page_table.hh
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Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.
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2010-09-13 19:26:03 -07:00 |
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physical.cc
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Mem: Use sysconf to get the page size instead of the PAGE_SIZE macro.
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2011-06-08 00:57:50 -07:00 |
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physical.hh
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SE: Fix simulating more than 4GB of RAM in SE mode
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2010-11-19 18:01:01 -06:00 |
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PhysicalMemory.py
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Make default PhysicalMemory latency slightly more realistic.
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2008-08-03 18:13:29 -04:00 |
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port.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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port.hh
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types: clean up types, especially signed vs unsigned
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2009-06-04 23:21:12 -07:00 |
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port_impl.hh
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arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
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2009-09-23 08:34:21 -07:00 |
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request.hh
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Spelling: Fix the a spelling error by changing mmaped to mmapped.
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2011-03-01 23:18:47 -08:00 |
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SConscript
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scons: rename TraceFlags to DebugFlags
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2011-06-02 17:36:21 -07:00 |
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tport.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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tport.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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translating_port.cc
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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translating_port.hh
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fix the translating ports so it can add a page on a fault
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2007-05-09 15:37:46 -04:00 |
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vport.cc
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arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
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2009-09-23 08:34:21 -07:00 |
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vport.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
