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base_dyn_inst.cc
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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bpred_unit.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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bpred_unit.hh
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BPred: Fix RAS to handle predicated call/return instructions.
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2012-02-13 12:26:25 -06:00 |
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bpred_unit_impl.hh
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BPred: Fix RAS to handle predicated call/return instructions.
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2012-02-13 12:26:25 -06:00 |
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checker_builder.cc
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CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
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2012-03-09 09:59:27 -05:00 |
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comm.hh
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O3: When squashing, restore the macroop that should be used for fetching.
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2011-08-14 17:41:34 -07:00 |
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commit.cc
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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commit.hh
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cpu: add separate stats for insts/ops both globally and per cpu model
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2012-02-12 16:07:39 -06:00 |
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commit_impl.hh
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O3/Ozone: Eliminate dead code counting software prefetch insts
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2012-03-09 09:59:28 -05:00 |
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cpu.cc
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CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
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2012-03-09 09:59:27 -05:00 |
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cpu.hh
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CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
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2012-03-09 09:59:27 -05:00 |
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cpu_builder.cc
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CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
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2012-03-09 09:59:27 -05:00 |
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cpu_policy.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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decode.cc
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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decode.hh
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clang: Enable compiling gem5 using clang 2.9 and 3.0
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2012-01-31 12:05:52 -05:00 |
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decode_impl.hh
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BP: Fix several Branch Predictor issues.
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2012-02-13 12:26:24 -06:00 |
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dep_graph.hh
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ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
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2010-10-31 00:07:20 -07:00 |
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dyn_inst.cc
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O3: Generaize the O3 IMPL class so it isn't split out by ISA.
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2008-10-09 00:10:02 -07:00 |
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dyn_inst.hh
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SE/FS: Expose the same methods on the CPUs in SE and FS modes.
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2011-11-01 04:01:13 -07:00 |
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dyn_inst_impl.hh
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CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
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2012-03-09 09:59:27 -05:00 |
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fetch.cc
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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fetch.hh
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clang: Enable compiling gem5 using clang 2.9 and 3.0
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2012-01-31 12:05:52 -05:00 |
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fetch_impl.hh
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O3: Add fatal when fetchWidth > Impl::MaxWidth.
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2012-03-11 10:20:54 -04:00 |
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free_list.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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free_list.hh
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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fu_pool.cc
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clang: Enable compiling gem5 using clang 2.9 and 3.0
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2012-01-31 12:05:52 -05:00 |
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fu_pool.hh
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clang: Enable compiling gem5 using clang 2.9 and 3.0
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2012-01-31 12:05:52 -05:00 |
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FuncUnitConfig.py
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CPU/ARM: Add SIMD op classes to CPU models and ARM ISA.
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2010-11-15 14:04:04 -06:00 |
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FUPool.py
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CPU/ARM: Add SIMD op classes to CPU models and ARM ISA.
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2010-11-15 14:04:04 -06:00 |
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iew.cc
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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iew.hh
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Merge with head, hopefully the last time for this batch.
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2012-01-31 22:40:08 -08:00 |
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iew_impl.hh
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O3/Ozone: Eliminate dead code counting software prefetch insts
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2012-03-09 09:59:28 -05:00 |
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impl.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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inst_queue.cc
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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inst_queue.hh
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clang: Enable compiling gem5 using clang 2.9 and 3.0
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2012-01-31 12:05:52 -05:00 |
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inst_queue_impl.hh
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clang: Enable compiling gem5 using clang 2.9 and 3.0
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2012-01-31 12:05:52 -05:00 |
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isa_specific.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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lsq.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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lsq.hh
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Merge with head, hopefully the last time for this batch.
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2012-01-31 22:40:08 -08:00 |
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lsq_impl.hh
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CPU: Round-two unifying instr/data CPU ports across models
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2012-02-24 11:42:00 -05:00 |
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lsq_unit.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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lsq_unit.hh
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Faults: Turn off arch/faults.hh
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2012-02-07 04:43:21 -08:00 |
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lsq_unit_impl.hh
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CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
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2012-03-09 09:59:27 -05:00 |
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mem_dep_unit.cc
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clang: Enable compiling gem5 using clang 2.9 and 3.0
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2012-01-31 12:05:52 -05:00 |
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mem_dep_unit.hh
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clang: Enable compiling gem5 using clang 2.9 and 3.0
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2012-01-31 12:05:52 -05:00 |
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mem_dep_unit_impl.hh
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LSQ: Set store predictor to periodically clear itself as recommended in the storesets paper.
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2011-08-19 15:08:07 -05:00 |
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O3Checker.py
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CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5
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2012-01-31 07:46:03 -08:00 |
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O3CPU.py
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CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
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2012-03-09 09:59:27 -05:00 |
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regfile.hh
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SE/FS: Get rid of includes of config/full_system.hh.
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2011-11-18 02:20:22 -08:00 |
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rename.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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rename.hh
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clang: Enable compiling gem5 using clang 2.9 and 3.0
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2012-01-31 12:05:52 -05:00 |
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rename_impl.hh
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Merge yet again with the main repository.
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2012-01-16 04:27:10 -08:00 |
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rename_map.cc
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o3: missing newlines on some dprintfs
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2011-06-10 22:15:32 -04:00 |
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rename_map.hh
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arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
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2009-09-23 08:34:21 -07:00 |
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rob.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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rob.hh
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O3 CPU: Provide the squashing instruction
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2012-02-10 08:37:28 -06:00 |
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rob_impl.hh
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O3 CPU: Provide the squashing instruction
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2012-02-10 08:37:28 -06:00 |
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sat_counter.cc
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Merge ktlim@zizzer:/bk/newmem
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2006-06-02 18:19:50 -04:00 |
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sat_counter.hh
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clang: Enable compiling gem5 using clang 2.9 and 3.0
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2012-01-31 12:05:52 -05:00 |
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SConscript
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CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
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2012-03-09 09:59:27 -05:00 |
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SConsopts
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cpu_models: get rid of cpu_models.py and move the stuff into SCons
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2010-02-26 18:14:48 -08:00 |
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scoreboard.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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scoreboard.hh
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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store_set.cc
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LSQ: Set store predictor to periodically clear itself as recommended in the storesets paper.
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2011-08-19 15:08:07 -05:00 |
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store_set.hh
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LSQ: Set store predictor to periodically clear itself as recommended in the storesets paper.
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2011-08-19 15:08:07 -05:00 |
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thread_context.cc
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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thread_context.hh
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CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
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2012-03-09 09:59:27 -05:00 |
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thread_context_impl.hh
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CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
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2012-03-09 09:59:27 -05:00 |
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thread_state.hh
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Implement Ali's review feedback.
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2012-01-29 02:04:34 -08:00 |
