Andreas Sandberg 8d2c3735d9 arch: Include generated decoder header after normal headers ... The generated decoder header defines macros that represent bit fields within instructions. These fields typically have short names that conflict with names in other header files. Include the generated header after all normal header to avoid this issue. Change-Id: I53d149b75432c20abdbf651e32c3c785d897973b Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>		2017-02-27 12:06:00 +00:00
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freebsd	arch, base, dev, kern, sym: FreeBSD support	2015-04-29 22:35:23 -05:00
linux	ISA: generic Linux thread info support	2012-11-02 11:32:00 -05:00
BaseTLB.py	sim: Move the BaseTLB to src/arch/generic/	2015-02-11 10:23:27 -05:00
debugfaults.hh	arch: Use const StaticInstPtr references where possible	2014-09-27 09:08:36 -04:00
decode_cache.cc	style: [patch 1/22] use /r/3648/ to reorganize includes	2016-11-09 14:27:37 -06:00
decode_cache.hh	ISA,CPU: Generalize and split out the components of the decode cache.	2012-05-26 13:45:12 -07:00
memhelpers.hh	arch: Include generated decoder header after normal headers	2017-02-27 12:06:00 +00:00
mmapped_ipr.cc	style: [patch 1/22] use /r/3648/ to reorganize includes	2016-11-09 14:27:37 -06:00
mmapped_ipr.hh	mem: Use a flag instead of address bit 63 for generic IPRs	2013-10-15 13:24:35 +02:00
pseudo_inst.cc	style: [patch 1/22] use /r/3648/ to reorganize includes	2016-11-09 14:27:37 -06:00
pseudo_inst.hh	kvm, x86: Adding support for SE mode execution	2014-11-23 18:01:08 -08:00
SConscript	sim: Move the BaseTLB to src/arch/generic/	2015-02-11 10:23:27 -05:00
tlb.cc	style: fix missing spaces in control statements	2016-02-06 17:21:19 -08:00
tlb.hh	misc: Add explicit overrides and fix other clang >= 3.5 issues	2015-10-12 04:08:01 -04:00
types.hh	misc: Remove redundant compiler-specific defines	2015-10-12 04:07:59 -04:00