8106a80450
arch/SConscript: ev5 should now be contained within alpha specific code. arch/alpha/ev5.cc: arch/alpha/isa_traits.hh: Added getInstAsid and getDataAsid functions. These should be removed when the SimpleScalar cpu model is removed. arch/sparc/isa_traits.hh: Added getInstAsid and getDataAsid functions. These should be removed when the SimpleScalar cpu model is removed. Also made some small fixes. cpu/o3/alpha_cpu.hh: Added typedefs which are required now that there isn't a using namespace EV5. cpu/o3/alpha_cpu_impl.hh: Some small changes so that ev5.hh isn't needed directly. cpu/o3/cpu.hh: Removed including ev5.hh, and pushed retrieving the Asid into the MiscRegFile. cpu/o3/regfile.hh: Removed the include of ev5.hh, using namespace EV5, and the now redundant ipr array. --HG-- extra : convert_revision : 5ef8f69435a3a888a3f06d0095d89326dafb33fd |
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.. | ||
memtest | ||
o3 | ||
ozone | ||
simple | ||
trace | ||
base.cc | ||
base.hh | ||
base_dyn_inst.cc | ||
base_dyn_inst.hh | ||
cpu_models.py | ||
exec_context.cc | ||
exec_context.hh | ||
exetrace.cc | ||
exetrace.hh | ||
inst_seq.hh | ||
intr_control.cc | ||
intr_control.hh | ||
pc_event.cc | ||
pc_event.hh | ||
profile.cc | ||
profile.hh | ||
SConscript | ||
smt.hh | ||
static_inst.cc | ||
static_inst.hh |