gem5/src/cpu/o3
Gabe Black c7ab9f5bb2 Added an x86 dyninst
--HG--
extra : convert_revision : 2317e9bb0bcf8010ab5d02019f7a14eeb7b1459c
2007-03-05 14:55:45 +00:00
..
alpha Merge zizzer:/bk/newmem 2007-01-27 01:59:20 -05:00
mips Fixes to get MIPS_SE to compile. 2006-12-20 22:14:40 -05:00
sparc Fixed a warning about an unused variable. 2007-01-29 10:46:54 -05:00
2bit_local_pred.cc Merge ktlim@zamp:/z/ktlim2/clean/m5-o3 2006-06-04 16:07:54 -04:00
2bit_local_pred.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
base_dyn_inst.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
bpred_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
bpred_unit.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
bpred_unit_impl.hh Make sure the value of PC is actually updated now that the instruction target isn't set explicitly. 2006-12-28 14:29:17 -05:00
btb.cc Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
btb.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
checker_builder.cc Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register file functions to not take faults 2006-11-01 16:44:45 -05:00
comm.hh Made branch delay slots get squashed, and passed back an NPC and NNPC to start fetching from. 2006-12-16 07:32:06 -05:00
commit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
commit.hh More interrupt reworking. 2006-11-13 02:49:03 -05:00
commit_impl.hh Clean up tracing stuff more, get rid of the trace log since 2007-02-10 15:14:50 -08:00
cpu.cc Merge zizzer:/bk/newmem 2007-01-03 00:52:30 -05:00
cpu.hh Got rid of some typedefs, moved the tlbs to the base o3 cpu, and called the architecture defined setSyscallReturn function instead of a duplicate copy. 2006-12-06 11:36:40 -05:00
cpu_policy.hh Merge ktlim@zamp:/z/ktlim2/clean/m5-o3 2006-06-04 16:07:54 -04:00
decode.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
decode.hh This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds, runs, and gets very very close to completing the hello world 2006-07-23 13:39:42 -04:00
decode_impl.hh Merge zizzer:/bk/newmem 2007-01-03 00:52:30 -05:00
dep_graph.hh Miscellaneous minor fixes. 2006-06-16 17:15:18 -04:00
dyn_inst.hh Added an x86 dyninst 2007-03-05 14:55:45 +00:00
fetch.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
fetch.hh Phased out DelaySlotInfo. 2006-12-28 14:33:45 -05:00
fetch_impl.hh Make memory commands dense again to avoid cache stat table explosion. 2007-02-07 10:53:37 -08:00
free_list.cc Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
free_list.hh Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
fu_pool.cc Reorganization to move FuncUnit, FUDesc, and OpDesc out of the encumbered directory and into the normal cpu directory. 2006-06-16 17:52:15 -04:00
fu_pool.hh Update copyright. 2006-06-07 16:02:55 -04:00
iew.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
iew.hh Merge ktlim@zamp:./local/clean/o3-merge/m5 2006-09-30 23:43:23 -04:00
iew_impl.hh Merge zizzer:/bk/newmem 2007-01-03 00:52:30 -05:00
inst_queue.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
inst_queue.hh Merge ktlim@zamp:./local/clean/o3-merge/m5 2006-09-30 23:43:23 -04:00
inst_queue_impl.hh don't use (*activeThreads).begin(), use activeThreads->blah(). 2006-12-20 22:20:11 -08:00
isa_specific.hh Initial changes to get O3 working with SPARC 2006-11-24 22:06:33 -05:00
lsq.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq.hh little fixes i noticed while searching for reason for address range issues (but these weren't the cause of the problem). 2006-12-15 17:55:47 -05:00
lsq_impl.hh style 2006-12-21 22:34:19 -08:00
lsq_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq_unit.hh Make memory commands dense again to avoid cache stat table explosion. 2007-02-07 10:53:37 -08:00
lsq_unit_impl.hh Make memory commands dense again to avoid cache stat table explosion. 2007-02-07 10:53:37 -08:00
mem_dep_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
mem_dep_unit.hh Initialize mem dep unit properly. 2006-11-07 13:53:06 -05:00
mem_dep_unit_impl.hh Initialize mem dep unit properly. 2006-11-07 13:53:06 -05:00
params.hh Remove mem parameter. Now the translating port asks the CPU's dcache's peer for its MemObject instead of having to have a paramter for the MemObject. 2006-10-31 14:33:56 -05:00
ras.cc Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
ras.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
regfile.hh Put kernel_stats back into arch. 2006-11-07 22:34:34 -05:00
rename.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rename.hh Add in capability to return to unblocking after a squash. This is needed because if you don't squash -all- the instructions, you need to keep clearing out whatever is left in the skid buffer. 2006-12-16 07:35:56 -05:00
rename_impl.hh Merge zizzer:/bk/newmem 2007-01-03 00:52:30 -05:00
rename_map.cc don't use (*activeThreads).begin(), use activeThreads->blah(). 2006-12-20 22:20:11 -08:00
rename_map.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
rob.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rob.hh Minor fix for SMT Hello Worlds to finish correctly. 2006-07-07 15:58:03 -04:00
rob_impl.hh don't use (*activeThreads).begin(), use activeThreads->blah(). 2006-12-20 22:20:11 -08:00
sat_counter.cc Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
sat_counter.hh Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
SConscript Started to add support for O3 for sparc. 2006-08-11 20:29:15 -04:00
scoreboard.cc Update copyright. 2006-06-07 16:02:55 -04:00
scoreboard.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
store_set.cc Fixes to get new CPU model working for simple test case. The CPU does not yet support retrying accesses. 2006-06-05 18:14:39 -04:00
store_set.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
thread_context.hh Compilation fixes 2006-12-07 18:49:10 -05:00
thread_context_impl.hh Merge zizzer:/bk/newmem 2006-12-06 06:05:28 -05:00
thread_state.hh Remove mem parameter. Now the translating port asks the CPU's dcache's peer for its MemObject instead of having to have a paramter for the MemObject. 2006-10-31 14:33:56 -05:00
tournament_pred.cc Merge ktlim@zamp:./local/clean/o3-merge/m5 2006-09-30 23:43:23 -04:00
tournament_pred.hh Merge ktlim@zamp:./local/clean/o3-merge/m5 2006-09-30 23:43:23 -04:00