gem5/src
Nilay Vaish 4b32c9fb4d x86: Fix x86 TLB and Walker
This patch adds a function to X86 tlb that returns the
walker port. This port is required for correctly connecting
the walker ports for the cpu just switched in
2012-03-01 11:37:03 -06:00
..
arch x86: Fix x86 TLB and Walker 2012-03-01 11:37:03 -06:00
base MEM: Make port proxies use references rather than pointers 2012-02-24 11:45:30 -05:00
cpu x86: Fix switching of CPUs 2012-03-01 11:37:02 -06:00
dev MEM: Prepare mport for master/slave split 2012-02-24 11:50:15 -05:00
doxygen Fix up doxygen. 2006-08-14 19:25:07 -04:00
kern MEM: Make port proxies use references rather than pointers 2012-02-24 11:45:30 -05:00
mem MEM: Make all the port proxy members const 2012-02-29 04:47:51 -05:00
python SWIG: Ensure ptrdiff_t is a known type in gcc >= 4.6.1 2012-02-29 04:26:58 -05:00
sim MEM: Make port proxies use references rather than pointers 2012-02-24 11:45:30 -05:00
unittest Stats: Add a sparse histogram stat object. 2011-08-19 15:08:05 -05:00
Doxyfile Fix up doxygen. 2006-08-14 19:25:07 -04:00
SConscript clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00