gem5/src/cpu/o3
Min Kyu Jeong 43c938d23e O3: Handle loads when the destination is the PC.
For loads that PC is the destination, check if the load
was mispredicted again when the value being loaded returns from memory
2010-08-23 11:18:40 -05:00
..
base_dyn_inst.cc O3CPU: Make the instcount debugging stuff per-cpu. 2008-11-10 11:51:18 -08:00
bpred_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
bpred_unit.hh move: put predictor includes and cc files into the same place 2009-06-04 21:50:20 -07:00
bpred_unit_impl.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
checker_builder.cc CPU: Make the cpuid parameter get set in SE mode as well. 2007-10-02 18:33:57 -07:00
comm.hh includes: sort includes again 2009-05-17 14:34:52 -07:00
commit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
commit.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
commit_impl.hh O3: Add flag to control whether faulting instructions are traced. 2009-09-26 10:50:50 -07:00
cpu.cc O3CPU: O3's tick event gets squashed when it is switched out. When repeatedly 2010-07-22 18:47:43 +01:00
cpu.hh CPU: Add readBytes and writeBytes functions to the exec contexts. 2010-08-13 06:16:02 -07:00
cpu_builder.cc o3-smt: enforce numThreads parameter for SMT SE mode 2009-07-25 00:50:27 -04:00
cpu_policy.hh gcc: Version 4.3 is pretty anal about shadowing types, placate it. 2008-09-22 08:25:57 -07:00
decode.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
decode.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
decode_impl.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
dep_graph.hh Miscellaneous minor fixes. 2006-06-16 17:15:18 -04:00
dyn_inst.cc O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
dyn_inst.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
dyn_inst_impl.hh CPA: Add code to automatically record function symbols as CPU executes. 2009-02-26 19:29:17 -05:00
fetch.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
fetch.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
fetch_impl.hh O3: Mark fetch stage as active if it faults. 2009-09-26 10:50:50 -07:00
free_list.cc types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
free_list.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
fu_pool.cc params: Deprecate old-style constructors; update most SimObject constructors. 2007-08-30 15:16:59 -04:00
fu_pool.hh params: Deprecate old-style constructors; update most SimObject constructors. 2007-08-30 15:16:59 -04:00
FuncUnitConfig.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
FUPool.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
iew.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
iew.hh O3: Handle loads when the destination is the PC. 2010-08-23 11:18:40 -05:00
iew_impl.hh O3: Handle loads when the destination is the PC. 2010-08-23 11:18:40 -05:00
impl.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
inst_queue.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
inst_queue.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
inst_queue_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
isa_specific.hh O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
lsq.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq.hh CPU: Add readBytes and writeBytes functions to the exec contexts. 2010-08-13 06:16:02 -07:00
lsq_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
lsq_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq_unit.hh O3: Handle loads when the destination is the PC. 2010-08-23 11:18:40 -05:00
lsq_unit_impl.hh O3: Handle loads when the destination is the PC. 2010-08-23 11:18:40 -05:00
mem_dep_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
mem_dep_unit.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
mem_dep_unit_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
O3Checker.py python: Move more code into m5.util allow SCons to use that code. 2009-09-22 15:24:16 -07:00
O3CPU.py python: Move more code into m5.util allow SCons to use that code. 2009-09-22 15:24:16 -07:00
regfile.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
rename.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rename.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
rename_impl.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
rename_map.cc Make the floating point zero register special handling only apply for ALPHA. 2007-04-22 17:50:43 +00:00
rename_map.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
rob.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rob.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
rob_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
sat_counter.cc Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
sat_counter.hh types: Move stuff for global types into src/base/types.hh 2009-05-17 14:34:50 -07:00
SConscript inorder-o3: allow both to compile together 2009-05-12 15:01:14 -04:00
SConsopts cpu_models: get rid of cpu_models.py and move the stuff into SCons 2010-02-26 18:14:48 -08:00
scoreboard.cc arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
scoreboard.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
store_set.cc types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
store_set.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
thread_context.cc O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
thread_context.hh o3: get rid of unused physmem pointer 2009-11-04 14:23:25 -08:00
thread_context_impl.hh O3ThreadContext: When taking over from a previous context, only assert that 2010-06-23 00:53:17 +01:00
thread_state.hh Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions. 2009-07-08 23:02:22 -07:00