gem5/src/arch/arm
Gabe Black 3b93015304 ARM: Define the store instructions from outside the decoder.
--HG--
rename : src/arch/arm/isa/insts/ldr.isa => src/arch/arm/isa/insts/str.isa
2010-06-02 12:58:01 -05:00
..
insts ARM: Implement a new set of base classes for non macro memory instructions. 2010-06-02 12:58:01 -05:00
isa ARM: Define the store instructions from outside the decoder. 2010-06-02 12:58:01 -05:00
linux ARM: Allow ARM processes to start in Thumb mode. 2010-06-02 12:58:00 -05:00
ArmInterrupts.py ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
ArmNativeTrace.py ARM: Make the ARM native tracer stop M5 if control diverges. 2009-07-29 00:17:11 -07:00
ArmSystem.py ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
ArmTLB.py arm: Unify the ARM tlb. We forgot about this when we did the rest. 2009-04-21 15:40:25 -07:00
faults.cc ARM: Track the current ISA mode using the PC. 2010-06-02 12:57:59 -05:00
faults.hh ARM: Implement fault classes. 2009-11-10 20:34:38 -08:00
interrupts.cc ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
interrupts.hh ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
intregs.hh ARM: Fix the integer register indexes. 2009-11-10 20:19:55 -08:00
isa.hh ARM: Track the current ISA mode using the PC. 2010-06-02 12:57:59 -05:00
isa_traits.hh O3PCU: Split loads and stores that cross cache line boundaries. 2010-02-12 19:53:20 +00:00
kernel_stats.hh ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
locked_mem.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
microcode_rom.hh arm: include missing file for arm 2009-04-21 15:40:26 -07:00
miscregs.hh ARM: Replace the "never" condition with the "unconditional" condition. 2010-06-02 12:58:00 -05:00
mmaped_ipr.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
nativetrace.cc ARM: Split the condition codes out of the CPSR. 2009-11-08 02:08:40 -08:00
nativetrace.hh ARM: Make the ARM native tracer stop M5 if control diverges. 2009-07-29 00:17:11 -07:00
pagetable.cc arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
pagetable.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
predecoder.hh ARM: Make the predecoder handle Thumb instructions. 2010-06-02 12:58:00 -05:00
process.cc ARM: Allow ARM processes to start in Thumb mode. 2010-06-02 12:58:00 -05:00
process.hh ARM: Allow ARM processes to start in Thumb mode. 2010-06-02 12:58:00 -05:00
registers.hh ARM: Get rid of NumInternalProcRegs. 2009-11-08 02:00:55 -08:00
remote_gdb.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
SConscript ARM: Make the predecoder handle Thumb instructions. 2010-06-02 12:58:00 -05:00
SConsopts arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
stacktrace.cc ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
stacktrace.hh ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
system.cc ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
system.hh ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
tlb.cc ARM: Track the current ISA mode using the PC. 2010-06-02 12:57:59 -05:00
tlb.hh arm: Unify the ARM tlb. We forgot about this when we did the rest. 2009-04-21 15:40:25 -07:00
types.hh ARM: Flesh out the 32 bit thumb store single instructions. 2010-06-02 12:58:01 -05:00
utility.cc ARM: Replace the "never" condition with the "unconditional" condition. 2010-06-02 12:58:00 -05:00
utility.hh ARM: Replace the "never" condition with the "unconditional" condition. 2010-06-02 12:58:00 -05:00
vtophys.cc arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
vtophys.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00