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freebsd
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X86: Fix argument register indexing.
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2007-07-26 22:13:14 -07:00 |
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isa
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Add a flag to indicate an instruction triggers a syscall in SE mode.
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2007-07-31 17:34:08 -07:00 |
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linux
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Syscall Emulation: Add stat64 syscall.
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2007-09-13 12:30:12 -04:00 |
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tru64
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Major changes to how SimObjects are created and initialized. Almost all
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2007-07-23 21:51:38 -07:00 |
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AlphaSystem.py
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Move SimObject python files alongside the C++ and fix
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2007-05-27 19:21:17 -07:00 |
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AlphaTLB.py
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Major changes to how SimObjects are created and initialized. Almost all
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2007-07-23 21:51:38 -07:00 |
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aout_machdep.h
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Updated Authors from bk prs info
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2006-05-31 19:26:56 -04:00 |
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ecoff_machdep.h
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New directory structure:
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2006-05-22 14:29:33 -04:00 |
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ev5.cc
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Address translation: Make the page table more flexible.
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2007-08-26 20:33:57 -07:00 |
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ev5.hh
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Updated Authors from bk prs info
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2006-05-31 19:26:56 -04:00 |
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faults.cc
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Address translation: Make the page table more flexible.
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2007-08-26 20:33:57 -07:00 |
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faults.hh
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Address translation: Make the page table more flexible.
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2007-08-26 20:33:57 -07:00 |
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floatregfile.cc
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Moved the Alpha float regfile into it's own regfile and got rid of constants.hh and isa_traits.cc
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2006-11-10 05:29:05 -05:00 |
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floatregfile.hh
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fixes for solaris compile
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2007-04-21 19:11:38 -04:00 |
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idle_event.cc
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*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
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2007-03-07 15:04:31 -05:00 |
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idle_event.hh
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Put kernel_stats back into arch.
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2006-11-07 22:34:34 -05:00 |
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interrupts.hh
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*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
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2007-03-07 15:04:31 -05:00 |
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intregfile.cc
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Split out alpha integer register file into it's own files.
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2006-11-10 04:54:25 -05:00 |
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intregfile.hh
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fixes for solaris compile
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2007-04-21 19:11:38 -04:00 |
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ipr.cc
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Made the old name refer to the miscreg index to prevent having to change code all over the place.
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2006-10-31 16:36:45 -05:00 |
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ipr.hh
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Fix stupid typo
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2006-10-31 18:01:31 -05:00 |
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isa_traits.hh
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Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
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2007-08-26 20:24:18 -07:00 |
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kernel_stats.cc
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*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
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2007-03-07 15:04:31 -05:00 |
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kernel_stats.hh
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Put kernel_stats back into arch.
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2006-11-07 22:34:34 -05:00 |
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kgdb.h
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Force remote gdb code to use signal numbers and not ISA specific trap numbers.
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2006-11-07 23:40:54 -05:00 |
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locked_mem.hh
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*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
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2007-03-07 15:04:31 -05:00 |
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miscregfile.cc
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Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
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2007-08-26 20:24:18 -07:00 |
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miscregfile.hh
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Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
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2007-08-26 20:24:18 -07:00 |
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mmaped_ipr.hh
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Add support for mmapped iprs to atomic cpu
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2006-11-29 17:11:10 -05:00 |
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osfpal.cc
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Updated Authors from bk prs info
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2006-05-31 19:26:56 -04:00 |
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osfpal.hh
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Updated Authors from bk prs info
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2006-05-31 19:26:56 -04:00 |
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pagetable.cc
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Address translation: Make the page table more flexible.
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2007-08-26 20:33:57 -07:00 |
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pagetable.hh
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Alpha: Fixes to get alpha to compile again.
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2007-08-27 18:30:02 -07:00 |
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predecoder.hh
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Make branches work by repopulating the predecoder every time through. This is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though.
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2007-06-19 18:17:34 +00:00 |
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process.cc
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Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
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2007-08-26 20:24:18 -07:00 |
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process.hh
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Implement current working directory for LiveProcesses
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2006-11-16 12:43:11 -08:00 |
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regfile.cc
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Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
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2007-08-26 20:24:18 -07:00 |
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regfile.hh
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X86: Put in the foundation for x87 stack based fp registers.
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2007-09-19 18:26:42 -07:00 |
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remote_gdb.cc
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Modified instruction decode method.
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2007-06-14 16:52:19 -04:00 |
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remote_gdb.hh
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Broke remote_gdb into a base class and architecture specific derived classes.
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2006-11-07 05:39:40 -05:00 |
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SConscript
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Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
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2007-08-26 20:24:18 -07:00 |
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SConsopts
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Rework the way SCons recurses into subdirectories, making it
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2007-03-10 23:00:54 -08:00 |
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stacktrace.cc
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*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
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2007-03-07 15:04:31 -05:00 |
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stacktrace.hh
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Put the ProcessInfo and StackTrace objects into the ISA namespaces.
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2006-11-08 00:52:04 -05:00 |
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syscallreturn.hh
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Made the alpha setSyscallReturn take a ThreadContext pointer instead of a RegFile *.
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2006-12-06 11:33:37 -05:00 |
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system.cc
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Major changes to how SimObjects are created and initialized. Almost all
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2007-07-23 21:51:38 -07:00 |
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system.hh
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Major changes to how SimObjects are created and initialized. Almost all
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2007-07-23 21:51:38 -07:00 |
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tlb.cc
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params: Deprecate old-style constructors; update most SimObject constructors.
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2007-08-30 15:16:59 -04:00 |
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tlb.hh
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params: Deprecate old-style constructors; update most SimObject constructors.
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2007-08-30 15:16:59 -04:00 |
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types.hh
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rename store conditional stuff as extra data so it can be used for conditional swaps as well
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2007-02-12 13:06:30 -05:00 |
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utility.cc
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Arguments: Get rid of duplicate code for the Arguments class in each architecture.
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2007-08-01 16:59:14 -04:00 |
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utility.hh
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Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
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2007-08-26 20:24:18 -07:00 |
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vtophys.cc
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*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
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2007-03-07 15:04:31 -05:00 |
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vtophys.hh
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implement vtophys and 32bit gdb support
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2007-02-18 19:57:46 -05:00 |
