dev/ns_gige.cc:
make tx/rx fifo sizes a param. the default is 128K for each. also, make the state machine not move onto txFragRead if there is no room in the txfifo for data.
dev/ns_gige.hh:
make tx/rx fifo size a param
--HG--
extra : convert_revision : ed91eb31c2b21d4cdc6de87d8641df6197be5209
base/traceflags.py:
added some more traceflags for ethernet to break it up better
dev/etherpkt.hh:
since we are not network host order, must reverse bytes for these typechecks.
also, overload isTcp/UdpPkt to take an argument so you don't have to reget the ip header if you've already got one.
dev/ns_gige.cc:
1) add some functions that reverse Endianness so we can generate adn evaluate checksum adn dprintf data accurately/more understandably
2) forget about the implementation of fifo fill/drain thresholds, it's not used by the driver much, nor does it matter with use sending/receiving in whole packets anyway.
get rid of teh associated variables.
3) get rid of txFifoCnt the variable, it's redundant and unnecessary, just use txFifoAvail.
4) change io_enable to ioEnable, just to be picky.
5) modify some DPRINTF's to be clearer, also added a lot, and spread them into better traceflag categories
6) fix the device bug! it's the intrTick = 0 at teh beginning of cpuInterrupt().
7) clear some bools in regsReset() so they don't holdover wrong state
8) fix pseudo header generation for Tcp checksumming to account for network order
dev/ns_gige.hh:
change io_enable to ioEnable, get rid of fill/drain thresh related variables and txFifoCnt, which is redundant
--HG--
extra : convert_revision : c538b75731f3c9e04354f57e6df9a40aeca5096d
dev/ide_ctrl.cc:
generalize these #defs
dev/ide_ctrl.hh:
put these in pcireg.h
dev/ns_gige.cc:
do i need io_enable? and assert will fail if i actually need to implement it, which may give clue as to wehtehr i need to implmeent the mem_enable and bm_enable stuff.
dev/ns_gige.hh:
implement this in case it's needed
dev/pcireg.h:
put these defs in pcireg instead
--HG--
extra : convert_revision : 5e3581b5da17410f943907139bd479f15d2231e8
dev/ns_gige.cc:
fix serialization and move regsReset into the cc file
dev/ns_gige.hh:
put regsReset into cc instead of here in hh
--HG--
extra : convert_revision : 3a8796fa583e0765503104a9dbe28cc69f1a8fa9
dev/ide_ctrl.cc:
Properly serialize/unserialize the PciDev base class to get it to remap
the MMU
dev/ns_gige.cc:
dev/ns_gige.hh:
Remove the "addr" paramter from the constructor and change the device
to use PCI based MMU mappings only
dev/pciconfigall.cc:
Change comments
dev/pcidev.cc:
Properly setup the MMU after a serialize
--HG--
extra : convert_revision : 4b2e7ba58e3c24fac1ff6f80635e704d6ecc0eff
doesn't conflict with the old ethernet driver name.
Added config file to try to boot Tru64 with Tsunami
Cleaned up kern/linux a bit more and fixed bug where we were using
Tru64 system calls
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/tsunami.hh:
Changed name of lisa's device to NSgigE instead of Etherdev so it
doesn't conflict with the old ethernet driver name.
kern/linux/linux_syscalls.hh:
the Syscalls still used the Tru64 calls, oops.. fixed.
--HG--
extra : convert_revision : dedd20686cc367ed37f31920f753566afbc69045
base/range.hh:
andrew thought this might be a bug.
dev/etherpkt.cc:
don't need std:: since there is a using directive
dev/ns_gige.cc:
update to new PIO and PCI system
dev/ns_gige.hh:
update to deal with new PIO and PCI setup
dev/ns_gige_reg.h:
Add some new #defines that I ended up needing
dev/pcidev.cc:
some changes to the debugging printfs of pci device
--HG--
extra : convert_revision : 955ba8e8e1c418cfe1c6549dc3451ea091541556
