cpu/simple/cpu.cc:
Sampler fixes. The status may be switched out when calling activate or suspend if there is a switchover during a quiesce.
--HG--
extra : convert_revision : da026e75dfb86289484cf01c5b1ecd9b03a72bd3
cpu/ozone/cpu.hh:
Add quiesce stat (not clear how it should be used yet).
cpu/ozone/cpu_impl.hh:
Fix for quiesce.
--HG--
extra : convert_revision : a1998818e241374ae3f4c3cabbef885dda55c884
cpu/o3/alpha_cpu.hh:
Store conditionals should not write their data to memory if they failed.
cpu/o3/lsq_unit.hh:
Setup request parameters when they're needed.
--HG--
extra : convert_revision : d75cd7deda03584b7e25cb567e4d79032cac7118
cpu/static_inst.hh:
Updates for new CPU, also include a classification of quiesce instructions.
--HG--
extra : convert_revision : a34cd56da88fe57d7de24674fbb375bbf13f887f
cpu/exec_context.hh:
Remove functions that shouldn't be accessible to anything outside of the CPU.
--HG--
extra : convert_revision : 9793c3ceb6d5404484bafc7a75d75ed71815d9eb
build/SConstruct:
Include Ozone CPU models.
cpu/cpu_models.py:
Include OzoneCPU models.
--HG--
extra : convert_revision : 51a016c216cacd2cc613eed79653026c2edda4b3
arch/alpha/isa/decoder.isa:
Make IPR accessing instructions serializing so they are not issued incorrectly in the O3 model.
arch/alpha/isa/pal.isa:
Allow IPR instructions to have flags.
base/traceflags.py:
Include new trace flags from the two new CPU models.
cpu/SConscript:
Create the templates for the split mem accessor methods. Also include the new files from the new models (the Ozone model will be checked in next).
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
Update to the BaseDynInst for the new models.
--HG--
extra : convert_revision : cc82db9c72ec3e29cea4c3fdff74a3843e287a35
To run it use
-ETEST=POVRAY_BENCH to run the built in povray benchmark program (more CPU intensive, small fileset ~11MB)
-ETEST=POVRAY_AUTUMN to run the first part of a rendering of a autumn leaves/tree scene, less cpu intensive ~500MB working set.
For now I have been running with -ESYSTEM=Simple in order to drop checkpoints (built into binary at the point the render begins) and create memory traces.
I will check in a SYSTEM=3D_DRAM and SYSTEM=3D_CACHE configuration as soon as those are ready.
--HG--
extra : convert_revision : fb55834a02317d5e9961a5145c932965c8bc6a0e
Add some forward declerations.
Fix ordering problem of variables in constructor (see sourceforge)
Factor out code from header into _impl file to speed building process (keep cache_builder smaller in size)
--HG--
extra : convert_revision : 20087f88f95628af716094e09c2287e09580149e
an obsolete function that doesn't exist.
arch/alpha/tru64/process.cc:
sim/process.cc:
Don't include useless header.
--HG--
extra : convert_revision : 1dd5edeb0703e2190b89ea5ff563df4c95b7cf59
arch/alpha/isa_traits.hh:
arch/sparc/linux/process.cc:
fix merging problem
sim/syscall_emul.cc:
use setIntReg
--HG--
extra : convert_revision : e88d72e415493cd17d7b88c22c7e995f3199e396
check abi-tag note section of elf binary for OS
add pseudo functions (moved from alpha and made to be generic)
move setsyscallreturn into isa traits
arch/alpha/SConscript:
no more common syscall emulation, now common for everyone
arch/alpha/isa_traits.hh:
move setsyscallreturn into isa description
arch/alpha/linux/process.cc:
arch/alpha/tru64/process.cc:
use generic functions rather than alpha specific ones
arch/sparc/isa_traits.hh:
have consts for generic pseudo syscalls
arch/sparc/linux/process.cc:
use generic functions
base/loader/elf_object.cc:
check abi-tag note section of elf binary for OS
cpu/exec_context.hh:
move syssyscallreturn into isa traits
sim/process.cc:
find call num with a more generic
sim/syscall_emul.cc:
sim/syscall_emul.hh:
add pseudo functions (moved from alpha and made to be generic)
--HG--
extra : convert_revision : 5a31024ecde7e39b830365ddd84593ea501a34d2
cpu/exec_context.hh:
Include readNextNPC function.
cpu/simple/cpu.cc:
Use functions to set and access nextPC, nextNPC.
--HG--
extra : convert_revision : 22622b9c110e1d99cc9106a2a27c479579d7e1ad
arch/alpha/isa_traits.hh:
arch/sparc/isa_traits.hh:
add nnpc for compiling purposes in exec_context setNextNPC function
cpu/exec_context.hh:
set NNPC function
cpu/simple/cpu.cc:
use NNPC in determining what PC we are using
--HG--
extra : convert_revision : e810cfbc5dc31879b20d2cc40bf9871613203532
arch/alpha/ev5.cc:
Include function for the MiscRegFile to copy all of the Iprs from an ExecContext.
arch/alpha/isa_traits.hh:
Include functions to copy MiscRegs from an ExecContext.
cpu/cpu_exec_context.cc:
Be sure to copy all of the misc regs when copying all architectural state.
--HG--
extra : convert_revision : cb948b5ff141ea0f739a1016f98236bd2a512f76
My change to exec_context.hh probably affected these files to no longer have MemoryController forward declared through a long chain of includes. MemoryController should be forward declared where it is used anyways.
dev/alpha_console.hh:
dev/uart.hh:
dev/uart8250.hh:
Forward declaration of MemoryController.
--HG--
extra : convert_revision : afaac4014e0eb3b6d5d385cd4444b77511e03b51
arch/alpha/isa_traits.hh:
Changed the enums to const ints, and got rid of a few unnecessary constants.
arch/sparc/isa_traits.hh:
Got rid of the enums, and added in some missing constants.
--HG--
extra : convert_revision : ee47890af9d8c67300b31d8e0dda1d580bd21479
which I need to update the misc. regfile accesses
arch/mips/faults.cc:
arch/mips/faults.hh:
alpha to mips
arch/mips/isa/base.isa:
add includes
arch/mips/isa/bitfields.isa:
more bitfields
arch/mips/isa/decoder.isa:
lots o' lots o' lots o' changes!!!!
arch/mips/isa/formats.isa:
include cop0.isa
arch/mips/isa/formats/basic.isa:
fix faults
arch/mips/isa/formats/branch.isa:
arch/mips/isa/formats/fp.isa:
arch/mips/isa/formats/int.isa:
arch/mips/isa/formats/mem.isa:
arch/mips/isa/formats/noop.isa:
arch/mips/isa/formats/trap.isa:
arch/mips/isa/formats/unimp.isa:
arch/mips/isa/formats/unknown.isa:
arch/mips/isa/formats/util.isa:
arch/mips/isa/operands.isa:
arch/mips/isa_traits.cc:
arch/mips/linux_process.cc:
merge MIPS-specific comilable/buidable files code into multiarch
arch/mips/isa_traits.hh:
merge MIPS-specific comilable/buidable files code into multiarch... the miscRegs file accesses i have
need to be recoded and everything should build then ...
arch/mips/stacktrace.hh:
file copied over
--HG--
extra : convert_revision : 4a72e14fc5fb0a0d1f8b205dadbbf69636b7fb1f
