Commit graph

7666 commits

Author SHA1 Message Date
Steve Reinhardt
f24ae2ec2a cache: fail store conditionals when upgrade loses race
Requires new "SCUpgradeReq" message that marks upgrades
for store conditionals, so downstream caches can fail
these when they run into invalidations.
See http://www.m5sim.org/flyspray/task/197
2010-06-16 15:25:57 -07:00
Steve Reinhardt
57f2b7db11 cache: fix dirty bit setting
Only set the dirty bit when we actually write to a block
(not if we thought we might but didn't, as in a failed
SC or CAS).  This requires makeing sure the dirty bit
stays set when we get an exclusive (writable) copy
in a cache-to-cache transfer from another owner, which
n turn requires copying the mem-inhibit flag from
timing-mode requests to their associated responses.
2010-06-16 15:25:57 -07:00
Nathan Binkert
f90319d3b8 stats: rename print to display in the mysql code too...sorry 2010-06-15 14:00:41 -07:00
Nathan Binkert
e54b673315 stats: rename print to display so it work in python 2010-06-15 08:34:19 -07:00
Nathan Binkert
86a93fe7b9 stats: only consider a formula initialized if there is a formula 2010-06-15 01:18:36 -07:00
Nathan Binkert
54d813adca stats: get rid of the never-really-used event stuff 2010-06-14 23:24:46 -07:00
Nathan Binkert
420402c0a3 util: clean up attrdict and import multiattrdict into m5.util 2010-06-14 23:24:46 -07:00
Nathan Binkert
5fc7adcba0 python: use ipython in --interactive if it is available 2010-06-14 23:24:46 -07:00
Nathan Binkert
70497d6a18 build: grab the right library if we're using a debug version of python 2010-06-14 23:24:45 -07:00
Nathan Binkert
dd133c7b24 ruby: get rid of PrioHeap and use STL
One big difference is that PrioHeap puts the smallest element at the
top of the heap, whereas stl puts the largest element on top, so I
changed all comparisons so they did the right thing.

Some usage of PrioHeap was simply changed to a std::vector, using sort
at the right time, other usage had me just use the various heap functions
in the stl.
2010-06-10 23:17:07 -07:00
Nathan Binkert
3df84fd8a0 ruby: get rid of the Map class 2010-06-10 23:17:07 -07:00
Nathan Binkert
006818aeea ruby: get rid of Vector and use STL
add a couple of helper functions to base for deleteing all pointers in
a container and outputting containers to a stream
2010-06-10 23:17:07 -07:00
Nathan Binkert
bc87fa30d7 ruby: get rid of RefCnt and Allocator stuff use base/refcnt.hh
This was somewhat tricky because the RefCnt API was somewhat odd.  The
biggest confusion was that the the RefCnt object's constructor that
took a TYPE& cloned the object.  I created an explicit virtual clone()
function for things that took advantage of this version of the
constructor.  I was conservative and used clone() when I was in doubt
of whether or not it was necessary.  I still think that there are
probably too many instances of clone(), but hopefully not too many.

I converted several instances of const MsgPtr & to a simple MsgPtr.
If the function wants to avoid the overhead of creating another
reference, then it should just use a regular pointer instead of a ref
counting ptr.

There were a couple of instances where refcounted objects were created
on the stack.  This seems pretty dangerous since if you ever
accidentally make a reference to that object with a ref counting
pointer, bad things are bound to happen.
2010-06-10 23:17:06 -07:00
Lisa Hsu
aa78887970 flags: add comment to avoid future deletions since code appears redundant. 2010-06-09 10:47:37 -07:00
Lisa Hsu
d28572499f flags: Unserializing old checkpoints before the introduction
of the Initialized flag would break, set Initialized for events upon
unserialization.
2010-06-08 17:16:36 -07:00
Steve Reinhardt
4977d8b58f scons: make RUBY a regular (non-global) sticky var
and force it to True for builds that imply Ruby protocols
(else unexpected things happen when testing these builds
with RUBY=False).
2010-06-07 12:19:59 -04:00
m5test
744b59d6de tests: Update O3 ref outputs to reflect Lisa's dist format change. 2010-06-06 18:39:10 -04:00
Steve Reinhardt
30deac9050 stats: fix stats diff script
Previously the return value ignored missing/added stats,
making the regressions not tell you when you needed to
update the reference stats because of these changes.
Also stop filtering distributions when reporting these;
not sure why we did that in the first place.
Also get rid of obsolete hacks for the "fetch-loss" stats
that have been gone for a long time.
2010-06-06 01:22:14 -04:00
Steve Reinhardt
d0af5e9df6 More minor gdb-related cleanup.
Found several more stale includes and forward decls.
2010-06-03 19:41:34 -07:00
Steve Reinhardt
a529dbfe65 Act like enabling CPUs is no big deal,
rather than a scary thing that might not work.
2010-06-03 16:54:28 -07:00
Steve Reinhardt
f92e91e853 Minor remote GDB cleanup.
Expand the help text on the --remote-gdb-port option so
people know you can use it to disable remote gdb without
reading the source code, and thus don't waste any time
trying to add a separate option to do that.
Clean up some gdb-related cruft I found while looking
for where one would add a gdb disable option, before
I found the comment that told me that I didn't need
to do that.
2010-06-03 16:54:26 -07:00
Lisa Hsu
4a3ce94386 Stats: fix dist stat and enable VectorDistStat 2010-06-03 11:06:12 -07:00
Lisa Hsu
aeb6e2e3ec utils: checkpoint aggregator: some physmem files are too big to read at once,
break it up into reading one page at a time. Also, avoid redoing a aggregating a checkpoint that's
already done.

--HG--
rename : util/checkpoint-aggregator.py => util/checkpoint_aggregator.py
2010-06-03 10:34:40 -07:00
Ali Saidi
d2186857b1 ARM: Fix issue with m5.fast and ARM 2010-06-03 12:20:49 -04:00
Ali Saidi
5268067f14 ARM: Fix SPEC2000 benchmarks in SE mode. With this patch all
Spec2k benchmarks seem to run with atomic or timing mode simple
CPUs. Fixed up some constants, handling of 64 bit arguments,
and marked a few more syscalls ignoreFunc.
2010-06-02 12:58:18 -05:00
Min Kyu Jeong
5d5bf8cbc7 ARM: Fix IT state not updating when an instruction memory instruction faults. 2010-06-02 12:58:18 -05:00
Dam Sunwoo
4325519fc5 ARM: Allow multiple outstanding TLB walks to queue. 2010-06-02 12:58:18 -05:00
Ali Saidi
2bad5138e4 ARM TLB: Fix bug in memAttrs getting a bogus thread context 2010-06-02 12:58:18 -05:00
Dam Sunwoo
6b00c7fa22 ARM: Support table walks in timing mode. 2010-06-02 12:58:18 -05:00
Dam Sunwoo
6c8dd32fa4 ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, V2PCWUR, V2PCWUW,...) 2010-06-02 12:58:18 -05:00
Gabe Black
85ba2a3243 ARM: Decode the neon instruction space. 2010-06-02 12:58:18 -05:00
Gabe Black
e50e6a260f ARM: Add a comment to vfp.cc that explains the asm statements. 2010-06-02 12:58:18 -05:00
Gabe Black
10031a0327 ARM: Move some case values out of ##included files.
This will help keep the high level decode together and not have it spread into
the subordinate decode stuff. The ##include lines still need to be on a line
by themselves, though.
2010-06-02 12:58:18 -05:00
Gabe Black
22f15ab94e ARM: Combine some redundant cases in one of the data decode functions. 2010-06-02 12:58:18 -05:00
Gabe Black
fcee2b3f31 ARM: Add comments to the classes in macromem.hh. 2010-06-02 12:58:18 -05:00
Gabe Black
362b747fdc ARM: Move code from vfp.hh to vfp.cc. 2010-06-02 12:58:18 -05:00
Ali Saidi
35e35fc825 ARM: Make some of the trace code more compact 2010-06-02 12:58:18 -05:00
Gabe Black
0abec53564 ARM: Move the longer MemoryReg::printoffset function in mem.hh into the cc file. 2010-06-02 12:58:18 -05:00
Gabe Black
9223725973 ARM: Move the ISA "clear" function into isa.cc. 2010-06-02 12:58:17 -05:00
Gabe Black
b6c2548a27 ARM: Get rid of the binary dumping function in utility.hh. 2010-06-02 12:58:17 -05:00
Gabe Black
f8d2ed708b ARM: Get rid of the empty branch.cc. 2010-06-02 12:58:17 -05:00
Gabe Black
0c574987c8 ARM: Mark some ARM static inst functions as inline. 2010-06-02 12:58:17 -05:00
Gabe Black
ba7a7b0394 ARM: Move some predecoder stuff into a .cc file.
--HG--
rename : src/arch/arm/predecoder.hh => src/arch/arm/predecoder.cc
2010-06-02 12:58:17 -05:00
Gabe Black
358fdc2a40 ARM: Decode to specialized conditional/unconditional versions of instructions.
This is to avoid condition code based dependences from effectively serializing
instructions when the instruction doesn't actually use them.
2010-06-02 12:58:17 -05:00
Gabe Black
596cbe19d4 ARM: Make sure undefined unconditional ARM instructions decode as such. 2010-06-02 12:58:17 -05:00
Gabe Black
6101e1b062 ARM: Implement a version of mcr and mrc that works in user mode. 2010-06-02 12:58:17 -05:00
Gabe Black
e91e6ff9a4 ARM: Hook the misc instructions into the thumb decoder. 2010-06-02 12:58:17 -05:00
Gabe Black
22d1a84509 ARM: Move some miscellaneous instructions out of the decoder to share with thumb. 2010-06-02 12:58:17 -05:00
Gabe Black
0e556e9dfb ARM: Treat LDRD in ARM with an odd index as an undefined instruction. 2010-06-02 12:58:17 -05:00
Ali Saidi
3dc6a8070e ARM: fix sizes of structs for ARM Linux 2010-06-02 12:58:17 -05:00