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9230 commits

Author SHA1 Message Date
Andreas Hansson
d2b57a7473 Stats: Update stats to reflect SimpleMemory bandwidth
This patch simply bumps the stats to reflect the introduction of a
bandwidth limit of 12.8GB/s for SimpleMemory.
2012-09-18 10:30:04 -04:00
Andreas Hansson
7c55464aac Mem: Add a maximum bandwidth to SimpleMemory
This patch makes a minor addition to the SimpleMemory by enforcing a
maximum data rate. The bandwidth is configurable, and a reasonable
value (12.8GB/s) has been choosen as the default.

The changes do add some complexity to the SimpleMemory, but they
should definitely be justifiable as this enables a far more realistic
setup using even this simple memory controller.

The rate regulation is done for reads and writes combined to reflect
the bidirectional data busses used by most (if not all) relevant
memories. Moreover, the regulation is done per packet as opposed to
long term, as it is the short term data rate (data bus width times
frequency) that is the limiting factor.

A follow-up patch bumps the stats for the regressions.
2012-09-18 10:30:02 -04:00
Andreas Hansson
d1f3a3b91a gcc: Enable Link-Time Optimization for gcc >= 4.6
This patch adds Link-Time Optimization when building the fast target
using gcc >= 4.6, and adds a scons flag to disable it (-no-lto). No
check is performed to guarantee that the linker supports LTO and use
of the linker plugin, so the user has to ensure that binutils GNU ld
>= 2.21 or the gold linker is available. Typically, if gcc >= 4.6 is
available, the latter should not be a problem. Currently the LTO
option is only useful for gcc >= 4.6, due to the limited support on
clang and earlier versions of gcc. The intention is to also add
support for clang once the LTO integration matures.

The same number of jobs is used for the parallel phase of LTO as the
jobs specified on the scons command line, using the -flto=n flag that
was introduced with gcc 4.6. The gold linker also supports concurrent
and incremental linking, but this is not used at this point.

The compilation and linking time is increased by almost 50% on
average, although ARM seems to be particularly demanding with an
increase of almost 100%. Also beware when using this as gcc uses a
tremendous amount of memory and temp space in the process. You have
been warned.

After some careful consideration, and plenty discussions, the flag is
only added to the fast target, and the warning that was issued in an
earlier version of this patch is now removed. Similarly, the flag used
to enable LTO, now the default is to use it, and the flag has been
modified to disable LTO. The rationale behind this decision is that
opt is used for development, whereas fast is only used for long runs,
e.g. regressions or more elaborate experiments where the additional
compile and link time is amortized by a much larger run time.

When it comes to the return on investment, the regression seems to be
roughly 15% faster with LTO. For a bit more detail, I ran twolf on
ARM.fast, with three repeated runs, and they all finish within 42
minutes (+- 25 seconds) without LTO and 31 minutes (+- 25 seconds)
with LTO, i.e. LTO gives an impressive >25% speed-up for this case.

Without LTO (ARM.fast twolf)

real	42m37.632s
user	42m34.448s
sys	0m0.390s

real	41m51.793s
user	41m50.384s
sys	0m0.131s

real	41m45.491s
user	41m39.791s
sys	0m0.139s

With LTO (ARM.fast twolf)

real	30m33.588s
user	30m5.701s
sys	0m0.141s

real	31m27.791s
user	31m24.674s
sys	0m0.111s

real	31m25.500s
user	31m16.731s
sys	0m0.106s
2012-09-14 12:13:22 -04:00
Andreas Hansson
a57eda0843 scons: Add a target for google-perftools profiling
This patch adds a new target called 'perf' that facilitates profiling
using google perftools rather than gprof. The perftools CPU profiler
offers plenty useful information in addition to gprof, and the latter
is kept mostly to offer profiling also on non-Linux hosts.
2012-09-14 12:13:21 -04:00
Andreas Hansson
224ea5fba6 scons: Restructure ccflags and ldflags
This patch restructures the ccflags such that the common parts are
defined in a single location, also capturing all the target types in a
single place.

The patch also adds a corresponding ldflags in preparation for
google-perf profiling support and the addition of Link-Time
Optimization.
2012-09-14 12:13:20 -04:00
Andreas Hansson
806a1144ce scons: Use c++0x with gcc >= 4.4 instead of 4.6
This patch shifts the version of gcc for which we enable c++0x from
4.6 to 4.4 The more long term plan is to see what the c++0x features
can bring and what level of support would be enabled simply by bumping
the required version of gcc from 4.3 to 4.4.

A few minor things had to be fixed in the code base, most notably the
choice of a hashmap implementation. In the Ruby Sequencer there were
also a few minor issues that gcc 4.4 was not too happy about.
2012-09-14 12:13:18 -04:00
Andreas Hansson
ae1652b813 Stats: Remove the reference stats that are no longer present
This patch simply removes the commitCommittedInsts and
commitCommittedOps from the reference statistics, following their
removal from the CPU.
2012-09-13 08:02:55 -04:00
Joel Hestness
90dd745ff6 se.py Ruby: Connect TLB walker ports
In order to ensure correct functionality of switch CPUs, the TLB walker ports
must be connected to the Ruby system in x86 simulation.

This fixes x86 assertion failures that the TLB walker ports are not connected
during the CPU switch process.
2012-09-12 21:42:57 -05:00
Joel Hestness
234fa4cf7e Standard Switch: Drain the system before switching CPUs
When switching from an atomic CPU to any of the timing CPUs, a drain is
unnecessary since no events are scheduled in atomic mode. However, when
trying to switch CPUs starting with a timing CPU, there may be events
scheduled. This change ensures that all events are drained from the system
by calling m5.drain before switching CPUs.
2012-09-12 21:41:37 -05:00
Joel Hestness
16dcb723c1 Base CPU: Initialize profileEvent to NULL
The profileEvent pointer is tested against NULL in various places, but
it is not initialized unless running in full-system mode. In SE mode, this
can result in segmentation faults when profileEvent default intializes to
something other than NULL.
2012-09-12 21:40:28 -05:00
Jason Power
aa8bcd15ec Ruby: Modify Scons so that we can put .sm files in extras
Also allows for header files which are required in slicc generated
code to be in a directory other than src/mem/ruby/slicc_interface.
2012-09-12 14:52:04 -05:00
Anthony Gutierrez
c6927ed138 stats: remove duplicate instruction stats from the commit stage
these stats are duplicates of insts/opsCommitted, cause
confusion, and are poorly named.
2012-09-12 11:35:52 -04:00
Nilay Vaish
89a5ba1ef8 se.py: removes error in passing options to a binary 2012-09-11 17:47:21 -05:00
Andreas Hansson
292d8252a4 clang: Fix issues identified by the clang static analyzer
This patch addresses a few minor issues reported by the clang static
analyzer.

The analysis was run with:

scan-build -disable-checker deadcode \
           -enable-checker experimental.core \
           -disable-checker experimental.core.CastToStruct \
           -enable-checker experimental.cpluscplus
2012-09-11 14:15:47 -04:00
Andreas Hansson
9ad7e23e9e Checkpoint: Pass maxtick to avoid undefined variable
This patch fixes a bug in scriptCheckpoints, where maxtick was used
undefined. The bug caused checkpointing by means of --take-checkpoints
to fail.
2012-09-11 14:14:51 -04:00
Lena Olson
584eba3ab6 Cache: Split invalidateBlk up to seperate block vs. tags
This seperates the functionality to clear the state in a block into
blk.hh and the functionality to udpate the tag information into the
tags.  This gets rid of the case where calling invalidateBlk on an
already-invalid block does something different than calling it on a
valid block, which was confusing.
2012-09-11 14:14:49 -04:00
Nilay Vaish
fe5deb4a22 x86 Regressions: Update stats due to register predication 2012-09-11 09:34:40 -05:00
Nilay Vaish
f47c2f6415 X86: make use of register predication
The patch introduces two predicates for condition code registers -- one
tests if a register needs to be read, the other tests whether a register
needs to be written to. These predicates are evaluated twice -- during
construction of the microop and during its execution. Register reads
and writes are elided depending on how the predicates evaluate.
2012-09-11 09:33:42 -05:00
Nilay Vaish
6369df59c8 x86: Add a separate register for D flag bit
The D flag bit is part of the cc flag bit register currently. But since it
is not being used any where in the implementation, it creates an unnecessary
dependency. Hence, it is being moved to a separate register.
2012-09-11 09:25:43 -05:00
Nilay Vaish
3700e5448a ISA Parser: Allow predication of source and destination registers
This patch is meant for allowing predicated reads and writes. Note that this
predication is different from the ISA provided predication. They way we
currently provide the ISA description for X86, we read/write registers that
do not need to be actually read/written. This is likely to be true for other
ISAs as well. This patch allows for read and write predicates to be associated
with operands. It allows for the register indices for source and destination
registers to be decided at the time when the microop is constructed. The
run time indicies come in to play only when the at least one of the
predicates has been provided. This patch will not affect any of the ISAs that
do not provide these predicates. Also the patch assumes that the order in
which operands appear in any function of the microop is same across all the
functions of the microops. A subsequent patch will enable predication for the
x86 ISA.
2012-06-03 10:59:04 -05:00
Nilay Vaish
637c6c7e32 Ruby: Use uint32_t instead of uint32 everywhere 2012-09-11 09:24:45 -05:00
Nilay Vaish
f00347a20f Ruby: Use uint8_t instead of uint8 everywhere 2012-09-11 09:23:56 -05:00
Nilay Vaish
5cdf221d8c Regression: Updates due to changes to Ruby memory controller 2012-09-10 12:44:03 -05:00
Nilay Vaish
c5bf1390aa Ruby System: Convert to Clocked Object
This patch moves Ruby System from being a SimObject to recently introduced
ClockedObject.
2012-09-10 12:21:01 -05:00
Nilay Vaish
4e6f048ef0 Ruby Slicc: remove the call to cin.get() function
If I understand correctly, this was put in place so that a debugger can be
attached when the protocol aborts. While this sounds useful, it is a problem
when the simulation is not being actively monitored. I think it is better to
remove this.
2012-09-10 12:20:34 -05:00
Andreas Hansson
0b1108c7a3 Ruby: Bump the stats after recent memory controller changes
This patch simply bumps the stats to avoid having failing
regressions. Someone with more insight in the changes should verify
that these differences all make sense.
2012-09-10 11:57:47 -04:00
Marco Elver
9e0edbcea8 Mem: Allow serializing of more than INT_MAX bytes
Despite gzwrite taking an unsigned for length, it returns an int for
bytes written; gzwrite fails if (int)len < 0.  Because of this, call
gzwrite with len no larger than INT_MAX: write in blocks of INT_MAX if
data to be written is larger than INT_MAX.
2012-09-10 11:57:43 -04:00
Palle Lyckegaard
21d4d50ba1 NetBSD: Build on NetBSD
Minor patch against so building on NetBSD is possible.
2012-09-10 11:57:42 -04:00
Andreas Hansson
3215ed9754 AddrRange: Remove the unused range_ops header
This patch prunes the range_ops header that is no longer used. The
bridge used it to do filtering of address ranges, but this is changed
since quite some time.

Ultimately this patch aims to simplify the handling of ranges before
specialising the AddrRange to an AddrRegion that also allows striping
bits to be selected.
2012-09-10 11:57:40 -04:00
Andreas Hansson
1f9c3bcb46 Inet: Remove the SackRange and its use
This patch aims to simplify the use of the Range class before
introducing a more elaborate AddrRegion to replace the AddrRange. The
SackRange is the only use of the range class besides address ranges,
and the removal of this use makes for an easier modification of the
range class.

The functionlity that is removed with this patch is not used anywhere
throughout the code base.
2012-09-10 11:57:39 -04:00
Andreas Hansson
d628344574 Device: Update stats for PIO and PCI latency change
This patch merely updates the regression stats to reflect the change
in PIO and PCI latency.
2012-09-10 11:57:37 -04:00
Andreas Hansson
cf5935445f Device: Bump PIO and PCI latencies to more reasonable values
This patch addresses a previously highlighted issue with the default
latencies used for PIO and PCI devices. The values are merely educated
guesses and might not represent the particular system you want to
model. However, the values in this patch are definitely far more
realistic than the previous ones.

In i8254xGBe, the writeConfig method is updated to use configDelay
instead of pioDelay.

A follow-up patch will update the regression stats.
2012-09-10 11:57:36 -04:00
Nilay Vaish
0b45ae5df3 se.py: support specifying multiple programs via command line
This patch allows for specifying multiple programs via command line. It also
adds an option for specifying whether to use of SMT. But SMT does not work for
the o3 cpu as of now.
2012-09-09 09:33:45 -05:00
Andreas Sandberg
d4a6d9846a sim: Update the SimObject documentation
Includes a small change in sim_object.cc that adds the name space to
the output stream parameter in serializeAll. Leaving out the name
space unfortunately confuses Doxygen.
2012-09-07 14:20:53 -05:00
Andreas Sandberg
2f397f314b sim: Remove the unused SimObject::regFormulas method
Simulation objects normally register derived statistics, presumably
what regFormulas originally was meant for, in regStats(). This patch
removes regRegformulas since there is no need to have a separate
method call to register formulas.
2012-09-07 14:20:53 -05:00
Ali Saidi
03ff612054 O3: Get rid of incorrect assert in RAS. 2012-09-07 14:20:53 -05:00
Ali Saidi
2059c01673 dev: Fix bifield definition in timer_cpulocal.hh
Bitfield definition in the local timer model for ARM had the bitfield
range numbers reversed which could lead to buggy behavior.
2012-09-07 14:20:53 -05:00
Ali Saidi
98e1ce638f ARM: Fix the compiler and platform identification for building on ARM. 2012-09-07 14:20:53 -05:00
Ali Saidi
0ecb351c51 ARM: fix m5 op binary to properly convert 64bit operands 2012-09-07 14:20:53 -05:00
Matt Evans
25c1933ffe ARM: Fix issue with with way MPIDR is read to include affinity levels.
The simple_bootloader checks for CPU0 in a manner incompatible with systems
actually using affinity levels -- just looking at MPIDR[7:0].  However, in
future we may wish to use real affinity levels and this method will be in danger
of matching several CPUs with affinity0 = 0.

Match affinity2 == affinity1 == affinity0 == 0 instead.
2012-09-07 14:20:53 -05:00
Ali Saidi
5217d5a451 Igbe: Newer kernels seem to allow TSO headers and packet data to be in one desc
Implement some code we used to panic on as it actually does happen with the
e1000 driver in Linux 3.3+. We used to assume that a TSO header would never
be part of a larger payload, however it appears as though it now can be.
2012-09-07 14:20:53 -05:00
Djordje Kovacevic
124aac72b4 CPU: O3-PipeView.py doesn't display the end of timelines.
Insts' timeline that stretches over multiple lines doesn't always get printed.
2012-09-07 14:20:53 -05:00
Krishnendra Nathella
3f5ee1cf8c sim: add validation to make sure there is memory where we're loading the kernel 2012-09-07 14:20:53 -05:00
Ali Saidi
3742b19b36 loader: initialize all memory in the ObjectFile objects.
Some bare metal build flows seem to build binaries that we aren't necessarily
expecting. Initialize everything to 0, so we don't make any assumptions about
what is or isn't in the binary.
2012-09-07 14:20:52 -05:00
Ali Saidi
8fc0cef611 ARM: Fix one of the timers used in the VExpress EMM platform. 2012-09-07 14:20:52 -05:00
Andreas Hansson
287ea1a081 Param: Transition to Cycles for relevant parameters
This patch is a first step to using Cycles as a parameter type. The
main affected modules are the CPUs and the Ruby caches. There are
definitely plenty more places that are affected, but this patch serves
as a starting point to making the transition.

An important part of this patch is to actually enable parameters to be
specified as Param.Cycles which involves some changes to params.py.
2012-09-07 12:34:38 -04:00
Joel Hestness
4124ea09f8 stats: Update Ruby regressions for memory controller fix 2012-09-05 20:53:34 -05:00
Joel Hestness
6924e10978 Ruby Memory Controller: Fix clocking 2012-09-05 20:51:41 -05:00
Jason Power
494f6a858e Ruby: Correct DataBlock =operator
The =operator for the DataBlock class was incorrectly interpreting the class
member m_alloc. This variable stands for whether the assigned memory for the
data block needs to be freed or not by the class itself. It seems that the
=operator interpreted the variable as whether the memory is assigned to the
data block. This wrong interpretation was causing values not to propagate
to RubySystem::m_mem_vec_ptr. This caused major issues with restoring from
checkpoints when using a protocol which verified that the cache data was
consistent with the backing store (i.e. MOESI-hammer).
2012-08-28 17:57:51 -05:00
Andreas Hansson
0cacf7e817 Clock: Add a Cycles wrapper class and use where applicable
This patch addresses the comments and feedback on the preceding patch
that reworks the clocks and now more clearly shows where cycles
(relative cycle counts) are used to express time.

Instead of bumping the existing patch I chose to make this a separate
patch, merely to try and focus the discussion around a smaller set of
changes. The two patches will be pushed together though.

This changes done as part of this patch are mostly following directly
from the introduction of the wrapper class, and change enough code to
make things compile and run again. There are definitely more places
where int/uint/Tick is still used to represent cycles, and it will
take some time to chase them all down. Similarly, a lot of parameters
should be changed from Param.Tick and Param.Unsigned to
Param.Cycles.

In addition, the use of curTick is questionable as there should not be
an absolute cycle. Potential solutions can be built on top of this
patch. There is a similar situation in the o3 CPU where
lastRunningCycle is currently counting in Cycles, and is still an
absolute time. More discussion to be had in other words.

An additional change that would be appropriate in the future is to
perform a similar wrapping of Tick and probably also introduce a
Ticks class along with suitable operators for all these classes.
2012-08-28 14:30:33 -04:00