Commit graph

225 commits

Author SHA1 Message Date
Steve Reinhardt
e981a97dec Move SimObject creation and Port connection loops
into Python.
Add Port and VectorPort objects and support for
specifying port connections via assignment.
The whole C++ ConfigNode hierarchy is gone now, as are
C++ Connector objects.

configs/test/fs.py:
configs/test/test.py:
    Rewrite for new port connector syntax.
src/SConscript:
    Remove unneeded files:
    - mem/connector.*
    - sim/config*
src/dev/io_device.hh:
src/mem/bridge.cc:
src/mem/bridge.hh:
src/mem/bus.cc:
src/mem/bus.hh:
src/mem/mem_object.hh:
src/mem/physical.cc:
src/mem/physical.hh:
    Allow getPort() to take an optional index to
    support vector ports (eventually).
src/python/m5/__init__.py:
    Move SimObject construction and port connection
    operations into Python (with C++ calls).
src/python/m5/config.py:
    Move SimObject construction and port connection
    operations into Python (with C++ calls).
    Add support for declaring and connecting MemObject
    ports in Python.
src/python/m5/objects/Bus.py:
src/python/m5/objects/PhysicalMemory.py:
    Add port declaration.
src/sim/builder.cc:
src/sim/builder.hh:
src/sim/serialize.cc:
src/sim/serialize.hh:
    ConfigNodes are gone; builder just gets the
    name of a .ini file section now.
src/sim/main.cc:
    Move SimObject construction and port connection
    operations into Python (with C++ calls).
    Split remaining initialization operations into two parts,
    loadIniFile() and finalInit().
src/sim/param.cc:
src/sim/param.hh:
    SimObject resolution done globally in Python now
    (not via ConfigNode hierarchy).
src/sim/sim_object.cc:
    Remove unneeded #include.

--HG--
extra : convert_revision : 2fa4001eaaec0c9a4231ef6e854f8e156d930dfe
2006-06-13 23:19:28 -04:00
Kevin Lim
72e4b98b8d Add in DetailedCPU to test.
--HG--
extra : convert_revision : 98c67b45af239e1cf5bad6888da6577a4c3bb45d
2006-06-13 14:15:24 -04:00
Steve Reinhardt
e0140202bd Move LiveProcess::create() from arch-specific files
bcak to main LiveProcess, then automatically select
ISA based on object file type.  Now simulation scripts
no longer need to care about the ISA, as they can just
call LiveProcess().

configs/test/test.py:
    Script no longer cares about ISA.
src/arch/alpha/process.cc:
src/arch/alpha/process.hh:
src/arch/mips/process.cc:
src/arch/mips/process.hh:
src/arch/sparc/process.cc:
src/arch/sparc/process.hh:
src/sim/process.cc:
src/sim/process.hh:
    Move create() from arch-specific files back to
    main LiveProcess, then automatically select ISA
    based on object file type.

--HG--
extra : convert_revision : ef33ffdc79623b77000f5d68edd2026760b76ab6
2006-06-11 21:49:46 -04:00
Steve Reinhardt
bb58e4b851 Don't allow SimObject-valued class params to be set
after the class has been instantiated or subclassed.
This is one of the main situations that leads to
confusing results.

configs/test/fs.py:
    Clean up to avoid modifying BaseCPU after it's been subclassed.

--HG--
extra : convert_revision : 335cb87bc3b211ecc8969cfb99ffc28f62f1f877
2006-06-10 21:13:36 -04:00
Steve Reinhardt
cd65504739 Update scripts for testing ALPHA_FS and MIPS_SE.
Minor fixes to ALPHA_FS and SPARC_SE.
SPARC_SE still does not compile... looks like there
are unresolved issues with ExecContext -> ThreadContext
rename/reorg.

configs/test/fs.py:
    Port to new script interface/model.
configs/test/test.py:
    Add support for running MIPS test(s) too via
    command-line option.
src/arch/alpha/ev5.cc:
    Fix include file.
src/arch/sparc/regfile.hh:
    Make Bit64 a ULL constant to avoid compiler error.

--HG--
extra : convert_revision : c46c179758271c4f00171faaa579915846bf4624
2006-06-10 00:22:42 -04:00
Steve Reinhardt
29e34a739b Move main control from C++ into Python.
User script now invokes initialization and
simulation loop after building configuration.
These functions are exported from C++ to Python
using SWIG.

SConstruct:
    Set up SWIG builder & scanner.
    Set up symlinking of source files into build directory
    (by not disabling the default behavior).
configs/test/test.py:
    Rewrite to use new script-driven interface.
    Include a sample option.
src/SConscript:
    Set up symlinking of source files into build directory
    (by not disabling the default behavior).
    Add SWIG-generated main_wrap.cc to source list.
src/arch/SConscript:
    Set up symlinking of source files into build directory
    (by not disabling the default behavior).
src/arch/alpha/ev5.cc:
src/arch/alpha/isa/decoder.isa:
src/cpu/o3/alpha_cpu_impl.hh:
src/cpu/trace/opt_cpu.cc:
src/cpu/trace/trace_cpu.cc:
src/sim/pseudo_inst.cc:
src/sim/root.cc:
src/sim/serialize.cc:
src/sim/syscall_emul.cc:
    SimExit() is now exitSimLoop().
src/cpu/base.cc:
    SimExitEvent is now SimLoopExitEvent
src/python/SConscript:
    Add SWIG build command for main.i.
    Use python/m5 in build dir as source for zip archive...
    easy now with file duplication enabled.
src/python/m5/__init__.py:
    - Move copyright notice back to C++ so we can print
    it right away, even for interactive sessions.
    - Get rid of argument parsing code; just provide default
    option descriptors for user script to call optparse with.
    - Don't clutter m5 namespace by sucking in all of m5.config
    and m5.objects.
    - Move instantiate() function here from config.py.
src/python/m5/config.py:
    - Move instantiate() function to __init__.py.
    - Param.Foo deferred type lookups must use m5.objects
    namespace now (not m5).
src/python/m5/objects/AlphaConsole.py:
src/python/m5/objects/AlphaFullCPU.py:
src/python/m5/objects/AlphaTLB.py:
src/python/m5/objects/BadDevice.py:
src/python/m5/objects/BaseCPU.py:
src/python/m5/objects/BaseCache.py:
src/python/m5/objects/Bridge.py:
src/python/m5/objects/Bus.py:
src/python/m5/objects/CoherenceProtocol.py:
src/python/m5/objects/Device.py:
src/python/m5/objects/DiskImage.py:
src/python/m5/objects/Ethernet.py:
src/python/m5/objects/Ide.py:
src/python/m5/objects/IntrControl.py:
src/python/m5/objects/MemObject.py:
src/python/m5/objects/MemTest.py:
src/python/m5/objects/Pci.py:
src/python/m5/objects/PhysicalMemory.py:
src/python/m5/objects/Platform.py:
src/python/m5/objects/Process.py:
src/python/m5/objects/Repl.py:
src/python/m5/objects/Root.py:
src/python/m5/objects/SimConsole.py:
src/python/m5/objects/SimpleDisk.py:
src/python/m5/objects/System.py:
src/python/m5/objects/Tsunami.py:
src/python/m5/objects/Uart.py:
    Fix up imports (m5 namespace no longer includes m5.config).
src/sim/eventq.cc:
src/sim/eventq.hh:
    Support for Python-called simulate() function:
    - Use IsExitEvent flag to signal events that want
    to exit the simulation loop gracefully (instead of
    calling exit() to terminate the process).
    - Modify interface to hand exit event object back to
    caller so it can be inspected for cause.
src/sim/host.hh:
    Add MaxTick constant.
src/sim/main.cc:
    Move copyright notice back to C++ so we can print
    it right away, even for interactive sessions.
    Use PYTHONPATH environment var to set module path
    (instead of clunky code injection method).
    Move main control from here into Python:
    - Separate initialization code and simulation loop
    into separate functions callable from Python.
    - Make Python interpreter invocation more pure (more
    like directly invoking interpreter).
    Add -i and -p flags (only options on binary itself;
    other options processed by Python).
    Import readline package when using interactive mode.
src/sim/sim_events.cc:
    SimExitEvent is now SimLoopExitEvent, and uses
    IsSimExit flag to terminate loop (instead of
    exiting simulator process).
src/sim/sim_events.hh:
    SimExitEvent is now SimLoopExitEvent, and uses
    IsSimExit flag to terminate loop (instead of
    exiting simulator process).
    Get rid of a few unused constructors.
src/sim/sim_exit.hh:
    SimExit() is now exitSimLoop().
    Get rid of unused functions.
    Add comments.

--HG--
extra : convert_revision : 280b0d671516b25545a6f24cefa64a68319ff3d4
2006-06-09 23:01:31 -04:00
Steve Reinhardt
935ba67b4f Get basic full-system working with AtomicSimpleCPU.
SConscript:
    Comment out sinic for now... needs to be fixed to compile under newmem.
configs/test/SysPaths.py:
    Fix paths.
configs/test/fs.py:
    SimpleCPU -> AtomicSimpleCPU
    Fix vmlinux path
cpu/simple/atomic.cc:
    Fix suspendContext() so quiesce works.
    Don't forget to checkForInterrupts().
cpu/simple/base.cc:
    Minor fix to interrupt check code.
dev/ide_disk.hh:
    Don't declare regStats() in header since it's not in
    .cc file anymore (will need to add it back in when
    stats are added back).
dev/io_device.cc:
    Set packet dest to Packet::Broadcast.
dev/pciconfigall.cc:
    Set PCI config packet result to Success.
python/m5/objects/Root.py:
    Add debug object to Root so things like break_cycles
    can be set from command line.

--HG--
extra : convert_revision : aa1c652fe589784e753e13ad9acb0cd5f3b6eafb
2006-05-17 22:08:44 -04:00
Steve Reinhardt
309e1d8193 Split SimpleCPU into two different models, AtomicSimpleCPU and
TimingSimpleCPU, which use atomic and timing memory accesses
respectively.  Common code is factored into the BaseSimpleCPU class.
AtomicSimpleCPU includes an option (simulate_stalls) to add delays
based on the estimated latency reported by the atomic accesses.
Plain old "SimpleCPU" is gone; I have not updated all the config
files (just test/test.py).
Also fixes to get timing accesses working in new memory model and
to get split-phase memory instruction definitions working with
new memory model as well.

arch/alpha/isa/main.isa:
    Need to include packet_impl.h for functions that use Packet objects.
arch/alpha/isa/mem.isa:
    Change completeAcc() methods to take Packet object pointers.
    Also split out StoreCond template for completeAcc(), since
    that's the only one that needs write_result and we get an
    unused variable warning if we always have it in there.
build/SConstruct:
    Update list of recognized CPU model names.
configs/test/test.py:
    Change SimpleCPU to AtomicSimpleCPU.
cpu/SConscript:
    Define sources for new CPU models.
    Add split memory access methods to CPU model signatures.
cpu/cpu_models.py:
cpu/static_inst.hh:
    Define new CPU models.
cpu/simple/base.cc:
cpu/simple/base.hh:
    Factor out pieces specific to Atomic or Timing models.
mem/bus.cc:
    Bus needs to be able to route timing packets based on explicit dest
    so responses can get back to requester.  Set dest to Packet::Broadcast
    to indicate that dest should be derived from address.
    Also set packet src field based on port from which packet is sent.
mem/bus.hh:
    Set packet src field based on port from which packet is sent.
mem/packet.hh:
    Define Broadcast destination address to indicate that
    packet should be routed based on address.
mem/physical.cc:
    Set packet dest on response so packet is routed
    back to requester properly.
mem/port.cc:
    Flag blob packets as Broadcast.
python/m5/objects/PhysicalMemory.py:
    Change default latency to be 1 cycle.

--HG--
rename : cpu/simple/cpu.cc => cpu/simple/base.cc
rename : cpu/simple/cpu.hh => cpu/simple/base.hh
extra : convert_revision : e9646af6406a20c8c605087936dc4683375c2132
2006-05-16 17:36:50 -04:00
Korey Sewell
0930024b88 Minor changes for FP ... MIPS now works for floating-point programs...
Now we are to the point where more benchmarks and instruction-coverage
is necessary to totally verify/validate correct operation across
all MIPS instructions

arch/mips/isa_traits.hh:
    fix for reading double values ... must rearrange bits before using void* to read double.
configs/test/hello_mips:
    real hello world MIPS binary

--HG--
extra : convert_revision : 153de1f8a830882c6972bd0bdb56da818f614def
2006-05-07 14:09:19 -04:00
Korey Sewell
de8eba6891 Merge zizzer:/bk/newmem
into  zizzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem

--HG--
extra : convert_revision : c48a8857f5a520ff8061eb3d8f08dcd43661e68c
2006-05-04 21:10:51 -04:00
Korey Sewell
97429d8eee Redo the FloatRegFile using unsigned integers
Edit the convert_and_round function which access FloatRegFile

arch/isa_parser.py:
    recognize when we are writing a 'uint64_t' FloatReg and set the width appropriately
arch/mips/isa/decoder.isa:
    Send a 'float' to the convert function instead of a unsigned word. Do this so we dont have to worry about the
    bit manipulation ourselves. We can just concern ourselves with values.

    Use unsigned double to get movd...
arch/mips/isa/formats/fp.isa:
    float debug statement
arch/mips/isa_traits.cc:
    add different versions of convert_and_round functions
arch/mips/isa_traits.hh:
    Use an array of uint32_t unsigned integers to represent the Floating Point Regfile
configs/test/hello_mips:
    basic FP program
cpu/simple/cpu.hh:
    spacing

--HG--
extra : convert_revision : a6fca91ad6365c83025f1131d71fa1b8ee76d7bc
2006-05-02 20:05:16 -04:00
Ali Saidi
ca8a659394 Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : d6f7c4dd146613eeba39249f2d916a77108bc8c1
2006-04-28 15:41:22 -04:00
Ali Saidi
79170b1be5 random mix of tidbits
configs/test/fs.py:
    update fs.py to use a bus bridge
cpu/simple/cpu.hh:
    cpu should just return that it doesn't snoop any address ranges
python/m5/objects/System.py:
    move boot_osflags to system

--HG--
extra : convert_revision : b4256df7eada7e65b69513361de8bffc3fdd680b
2006-04-28 15:40:45 -04:00
Gabe Black
20c8553787 Merge m5.eecs.umich.edu:/bk/newmem
into  ewok.(none):/home/gblack/m5/newmem

cpu/simple/cpu.cc:
    Hand merged

--HG--
extra : convert_revision : 68414730c23d41c30cfb7bcfa604029a5fc8622c
2006-04-28 14:03:42 -04:00
Gabe Black
25bf3125da Changed the hello_sparc executable back to the cross compiled one
--HG--
extra : convert_revision : 565f75f76dd26ca0e25de4c89d1597a9f39483fd
2006-04-28 13:11:32 -04:00
Ali Saidi
8f8d09538f Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working
after merge from head. Checkpointing may need some work now. Endian-happiness still not complete.

SConscript:
    add all devices back into make file
base/inet.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/pktfifo.cc:
dev/pktfifo.hh:
    rename PacketPtr EthPacketPtr so it doesn't conflict with the PacketPtr type in the memory system
configs/test/fs.py:
    add nics to fs.py
cpu/cpu_exec_context.cc:
    remove this check, as it's not valid. We may want to add something else back in to make sure that no one can delete the
    static virtual ports in the exec context
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
dev/alpha_console.cc:
dev/ide_ctrl.cc:
    use new methods for accessing packet data
dev/ide_disk.cc:
    add some more dprintfs
dev/io_device.cc:
    delete packets when we are done with them. Update for new packet methods to access data
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart8250.cc:
dev/uart8250.hh:
mem/physical.cc:
mem/port.cc:
    dUpdate for new packet methods to access data
dev/ns_gige.cc:
    Update for new memory system
dev/ns_gige.hh:
python/m5/objects/Ethernet.py:
    update for new memory system
dev/sinic.cc:
dev/sinic.hh:
    Update for new memory system. Untested as need to merge in head because of kernel driver differences between versions
mem/packet.hh:
    Add methods to access data instead of accessing it directly.

--HG--
extra : convert_revision : 223f43876afd404e68337270cd9a5e44d0bf553e
2006-04-24 19:31:50 -04:00
Ali Saidi
6dc3b2fa39 make ide disk work for newmem
SConscript:
    compile ide devices
base/chunk_generator.hh:
    add another parameter to the chuck generator called complete() which
    returns the number of bytes transfered so far. Very useful for
    adding to a pointer.
configs/test/fs.py:
    Add ide disk to fs test configuration
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
    update for new memory system
mem/bus.cc:
    support devices that return multiple ranges
    remove old ranges before using new info
mem/packet.hh:
    make senderstate void* per steve's request that we use every
    construct possible in C++
mem/physical.cc:
    have memory stamp the packet with the time.
mem/physical.hh:
    actually set the memory latency variable
python/m5/objects/Device.py:
    Add DmaDevice
python/m5/objects/Ide.py:
    Ide disk no longer has a physmem pointer
python/m5/objects/Pci.py:
    update pci device for newmem
python/m5/objects/PhysicalMemory.py:
    add latency parameter for physical memory
sim/byteswap.hh:
    use fast architecture dependent byteswap calls if they exist

--HG--
extra : convert_revision : e3cf2e8f61064ad302d94bc22010a00c59f3f793
2006-04-20 17:14:30 -04:00
Korey Sewell
200205aa85 update Hello World binary for mips... the old one did not have a newline
--HG--
extra : convert_revision : f015cac39e42e11b1a56bbd1c5cf07403eb8f2da
2006-04-13 17:40:16 -04:00
Ali Saidi
81a735a716 fs now gets to the point where it would really like a filesystem.
Time to make the ide device work

arch/alpha/system.cc:
    write the machine type and rev in the correct place
cpu/simple/cpu.cc:
    reset the packet structure every time it's reused... wow the
    simple cpu code  for talking to memory is getting horrible.
dev/alpha_console.cc:
    move the setAlphaAccess to startup() to make sure that the console
    binary is loaded
dev/tsunami_cchip.cc:
dev/tsunami_pchip.cc:
dev/uart8250.cc:
    fix a couple of bugs injected in the newmem fixes
mem/bus.cc:
    More verbose bus tracing
mem/packet.hh:
    Add a constructor to packet to set the result to unknown and a reset
    method in the case it's being reused
mem/vport.hh:
    don't need are own read/write methods since the base functional port
    ones call writeBlob readBlob which do the translation for us

--HG--
extra : convert_revision : 8d0e2b782bfbf13dc5c59dab1a79a084d2a7da0a
2006-04-12 17:46:25 -04:00
Ali Saidi
6a7108897b a sparc binary that can be debugged
--HG--
extra : convert_revision : cb021c1e704b5771e0f86e794b7e59f8a4b96856
2006-04-06 18:32:10 -04:00
Gabe Black
6d8d6d15cd Fixed up the isa description. Also added some capability to the isa_parser in the InstObjParams constructor.
arch/isa_parser.py:
    Expanded the capability of the InstObjParams constructor to allow adding in extra keys for use in templates. These are added as key, value tuples as optional arguements.
arch/sparc/isa/base.isa:
arch/sparc/isa/formats/mem.isa:
arch/sparc/isa/formats/priv.isa:
    The genCompositeIop function is no longer needed, as this functionality is now in the InstObjParams constructor.
arch/sparc/isa/decoder.isa:
    Fixed up alot of instructions, and fixed indentation.
arch/sparc/isa/formats/integerop.isa:
    The genCompositeIop function is no longer needed, as this functionality is now in the InstObjParams constructor. Also changed the immediate values to be signed.
base/traceflags.py:
    Added SPARC traceflag
configs/test/hello_sparc:
    Recompiled without -mflat
cpu/cpu_exec_context.cc:
    Used the regfile clear function rather than memsetting to 0.

--HG--
extra : convert_revision : b9da6f264f3ebc4ce1815008dfff7f476b247ee9
2006-04-06 14:52:44 -04:00
Gabe Black
5c79eb0410 Fixes to SPARC for syscall emulation mode.
arch/sparc/isa/base.isa:
arch/sparc/isa/decoder.isa:
arch/sparc/isa/formats.isa:
arch/sparc/isa/formats/branch.isa:
arch/sparc/isa/formats/integerop.isa:
arch/sparc/isa/formats/mem.isa:
arch/sparc/isa/formats/nop.isa:
arch/sparc/isa/formats/trap.isa:
arch/sparc/isa/formats/unknown.isa:
arch/sparc/isa/includes.isa:
arch/sparc/isa/operands.isa:
    Fixes towards running in syscall emulation mode.
arch/sparc/linux/process.cc:
    Fixed the assert and comment to check that the Num_Syscall_Descs is less than or equal to 284. Why does this assert need to exist anyway?
base/loader/elf_object.cc:
    Cleared out comments about resolved issues.
cpu/simple/cpu.cc:
    Use NNPC for both SPARC and MIPS, instead of just MIPS
configs/test/hello_sparc:
    A test program for SPARC which prints "Hello World!"

--HG--
rename : arch/sparc/isa/formats/noop.isa => arch/sparc/isa/formats/nop.isa
extra : convert_revision : 10b3e3b9f21c215d809cffa930448007102ba698
2006-03-31 20:31:53 -05:00
Ali Saidi
3dcb589ea4 update for connector magic
--HG--
extra : convert_revision : 111af292373edebcd106938e76610f9ac4a6ce58
2006-03-29 17:39:20 -05:00
Ali Saidi
4973a16b34 update for objects having a bus
--HG--
extra : convert_revision : 96b5494b7d0b5ca702ac69cfa0bf8c4d44e1cc3b
2006-03-25 18:34:50 -05:00
Korey Sewell
77a2f97c35 Merge zizzer:/bk/newmem
into  zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-mips

--HG--
extra : convert_revision : 9bdde9b5bd3049744451eda1134f080b7c4b1b59
2006-03-15 23:38:55 -05:00
Ali Saidi
97e424982a add translations for new sections that are mmapped or when the brk
is changed
Add a default machine width parameter
Arch based live processes

arch/alpha/linux/process.cc:
arch/alpha/linux/process.hh:
arch/alpha/process.cc:
arch/alpha/process.hh:
arch/alpha/tru64/process.cc:
arch/alpha/tru64/process.hh:
arch/mips/linux_process.cc:
arch/mips/process.cc:
arch/mips/process.hh:
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
arch/sparc/process.cc:
arch/sparc/process.hh:
configs/test/test.py:
python/m5/objects/Process.py:
sim/process.cc:
sim/process.hh:
    Architecture based live processes
arch/mips/isa_traits.hh:
arch/sparc/isa_traits.hh:
    Add a default machine width parameter
mem/port.hh:
    gcc 4 really wants  a virtual destructor
sim/byteswap.hh:
    remove the comment around long and unsigned long even though uint32_t
    and int32_t are defined. Seems to work with gcc 4 and 3.4.3.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    add translations for new sections that are mmapped or when the brk
    is changed

--HG--
extra : convert_revision : e2f9f228113c7127c87ef2358209a399c30ed5c6
2006-03-15 17:04:50 -05:00
Korey Sewell
e2b558112b add mips simple test in config directory
configs/test/hello_mips:
    hello world mips binary

--HG--
extra : convert_revision : 5a495e1bfb1cbddc0879f8e80c02bd7435a02acb
2006-03-15 16:29:18 -05:00
Steve Reinhardt
e3d96aa889 Compiles now (with CPU_MODELS=SimpleCPU), but hangs
on execution.

configs/test/test.py:
    Move test binary out of m5-test, don't depend on
    m5-test/Benchmarks.
python/m5/objects/System.py:
    Split out full-system-only parameters (lost in merge).
sim/system.cc:
    Need to be able to instantiate System directly in SE mode
    (lost in merge).
sim/system.hh:
    A few more functions here are FS-only.
configs/test/hello:
    Add in binary.

--HG--
rename : configs/test.py => configs/test/test.py
extra : convert_revision : 4051b18772e0a0dcb97eb591d4373683be9f4395
2006-03-10 10:01:29 -05:00
Steve Reinhardt
22504f8b48 More progress toward actually running a program.
See configs/test.py for test config (using simple
binary in my home directory on zizzer).

base/chunk_generator.hh:
    Fix assertion for chunkSize == 0 (not a power of 2)
base/intmath.hh:
    Fix roundDown to take integer alignments.
cpu/base.cc:
    Register exec contexts regardless of state (not sure why
    this check was in here in the first place).
mem/physical.cc:
    Add breaks to switch.
python/m5/objects/BaseCPU.py:
    Default mem to Parent.any (e.g. get from System).
python/m5/objects/Ethernet.py:
python/m5/objects/Root.py:
    HierParams is gone.
python/m5/objects/PhysicalMemory.py:
    mmu param is full-system only.
sim/process.cc:
    Stack mapping request must be page-aligned and page-sized.
    Don't delete objFile object in create since we are counting
    on it being around for startup().

--HG--
extra : convert_revision : 90c43ee927e7d82a045d6e10302d965797d006f7
2006-03-01 18:45:50 -05:00
Ali Saidi
481219caf6 Add support for multiple streams being configured with the INITPARAM
variable

--HG--
extra : convert_revision : 2cb20845cb7f32589882850156bdd42d9024db7a
2005-11-29 18:06:15 -05:00
Nathan Binkert
61f59f639c Clean up the newly updated iscsi-client script
configs/boot/iscsi-client.rcS:
    Clean up the newly updated iscsi-client script.
    Reduce the writeback period so writes occur more frequently.

--HG--
extra : convert_revision : 21c84f781c6537b28c753291561d23c2d0144627
2005-11-22 13:33:28 -05:00
Lisa Hsu
b018a01f0c new rcS file for open-iscsi rather than the old linux-iscsi
--HG--
extra : convert_revision : 0c12033b38e32f8b2ea69b52813dfed294ec5de4
2005-11-09 16:40:27 -05:00
Nathan Binkert
c7b211e71f various changes to the boot scripts
configs/boot/iscsi-client.rcS:
configs/boot/nfs-client-dbench.rcS:
    don't use the /proc/m5 stuff, use the m5 binary
configs/boot/nfs-client-nhfsstone.rcS:
    set up checkpoints
    change nhfsstone configuration
configs/boot/nfs-client.rcS:
    use more memory
configs/boot/nfs-server.rcS:
    change the writeback frequency
    load a larger simulated disk image.
    create more nfsd threads

--HG--
extra : convert_revision : 242dfd261d62782c06847d64b9f6aa06664a1ec9
2005-09-16 22:54:01 -04:00
Nathan Binkert
02f9ea609a Add NFS-dbench, and iscsi dbench benchmarks
--HG--
extra : convert_revision : 71e416668f4bbcf9785ea2363ec406135a217e32
2005-06-13 11:54:23 -04:00
Steve Reinhardt
ed743cb3b0 Clean up to work with recent python config changes.
configs/splash2/run.py:
    parent is now Parent.
    Need to explicitly instantiate classes.

--HG--
extra : convert_revision : c260fad00ca82cb1032e73af2e5caa2ad013067d
2005-06-04 23:08:26 -04:00
Steve Reinhardt
3e7f660401 A few more config updates. Works with regression now.
configs/splash2/run.py:
    Update file for new config changes.
python/m5/config.py:
    - isParamContext() not defined any more
    - fix bug with re-assigning vectors over scalars
    and vice versa

--HG--
rename : configs/splash2/run.mpy => configs/splash2/run.py
extra : convert_revision : 2eb28a92f8de327f6dfddd01467c61e759275f6b
2005-06-01 17:08:45 -04:00
Nathan Binkert
849c954adf Cleanup rcS files. Make sure there are enough tracked connections.
Delay before singalling peer to make sure that the peer is ready

configs/boot/nat-netperf-server.rcS:
    delay before singalling to make sure that the natbox is ready
configs/boot/nat-netperf-stream-client.rcS:
    increase the number of tracked connections
configs/boot/nat-spec-surge-client.rcS:
configs/boot/nfs-client-nhfsstone.rcS:
configs/boot/nfs-client-smallb.rcS:
configs/boot/nfs-client-tcp-smallb.rcS:
configs/boot/nfs-client-tcp.rcS:
configs/boot/nfs-client.rcS:
configs/boot/nfs-server.rcS:
configs/boot/spec-surge-client.rcS:
configs/boot/spec-surge-server.rcS:
configs/boot/surge-client.rcS:
configs/boot/surge-server.rcS:
    increase the number of tracked connections
    cleanup
configs/boot/nat-spec-surge-server.rcS:
configs/boot/natbox-netperf.rcS:
configs/boot/nfs-server-nhfsstone.rcS:
    delay before singalling to make sure that the natbox is ready
    increase the number of tracked connections
    cleanup
configs/boot/natbox-spec-surge.rcS:
    delay before singalling to make sure that the natbox is ready
    increase the number of tracked connections

--HG--
extra : convert_revision : 9faa5ec11c9c02fed3d1cff922ca42c41d364204
2005-04-30 11:00:43 -04:00
Ron Dreslinski
2bb9126a7a Make ip_conntrack table size larger
--HG--
extra : convert_revision : bda54b29cb15144907b186f06517477dea13ba06
2005-04-28 16:13:30 -04:00
Ali Saidi
97064c5216 Add some new config files
--HG--
extra : convert_revision : b454144b3c00c101e970269c6c084d601cee971f
2005-03-23 15:57:38 -05:00
Ron Dreslinski
14c461c93c Fixed the super/parent change fpr splash2 benchmarks
configs/splash2/run.mpy:
    Change super to parent

--HG--
extra : convert_revision : 61d45880b5e334200ebebc24d757c97cbeb048f6
2005-03-16 15:55:44 -05:00
Ron Dreslinski
1eb5e618de Added config files for splash2 benchmarks. Parameters:
ROOTDIR = root directory of the splash2 code
NP = number of proccessors
BENCHMARK = name of the splash2 benchmark (Cholesky, FFT, LUContig, LUNoncontig, Radix, Barnes, FMM, OceanContig, OceanNoncontig, Raytrace, WaterNSquared, or WaterSpatial)
SYSTEM = Type of system to simulate detailed or simple

Note:  They use MOESI protocol and do_events is enabled (Multiple L1's and a shared L2)

--HG--
extra : convert_revision : c39aa73825ea8108b6c32abd4a4fa4c23391ab09
2005-03-11 18:07:07 -05:00
Ali Saidi
2897665685 Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : a61ddd67647fc6a6e8e12d918cc71ae9da69f869
2005-03-09 15:56:29 -05:00
Lisa Hsu
550e6a5010 Merge zizzer:/bk/m5 into zed.eecs.umich.edu:/z/hsul/work/m5/pact05
--HG--
extra : convert_revision : bfaaeebd7ec4ee8ee182909e928581f95ac2af93
2005-03-08 17:38:08 -05:00
Lisa Hsu
91601f4494 make some changes to bonnie - now that the simulator uses more memory the old config didn't fit anymore in pools VM, this does fit.
--HG--
extra : convert_revision : b5fef2896276be675f79791b084ba97dd953d4ca
2005-03-08 17:25:32 -05:00
Nathan Binkert
47dec0f411 Fix the singalling from server to client so that the
benchmark begins properly.

configs/boot/nat-netperf-maerts-client.rcS:
    Fix the echo message
configs/boot/nat-netperf-server.rcS:
    Wait a second before signalling the natbox to make sure it's
    had time to boot.
    Fix echo message.

--HG--
extra : convert_revision : f9d32c98f24b9617ebf917790a4ca554b7b02bba
2005-03-08 12:37:08 -05:00
Lisa Hsu
0804a7530f the client and server aren't rate-matched anymore and the timing of the netcats are off - add a sleep 1 to make it actually work.
--HG--
extra : convert_revision : 3fa730a94d9270945d34061513ab9ce0ab60e7ba
2005-03-05 15:16:29 -05:00
Ali Saidi
8268426f30 Updated Monet Configuration and validations tests
--HG--
extra : convert_revision : d58aed18f8f809185ad2639eb92465a5fc6695de
2005-03-01 01:03:37 -05:00
Ali Saidi
a84159174a added two validation rcs files
--HG--
extra : convert_revision : 19e57e5192be3435d72652e3b36aac3b6e43d81c
2005-02-23 11:46:28 -05:00
Ali Saidi
7e559f6c50 Add Monet configuration, update p4 parameters, couple of typo fixes
dev/tsunami_cchip.cc:
    add a fake register to tsunami that we can do 32bit reads to.
    Warn on access.

--HG--
extra : convert_revision : d87860f3b527528151c23431556039bca6e12945
2005-02-03 23:50:57 -05:00
Lisa Hsu
c3aaf43c88 make nat runs used vegas congestion avoidance implementation.
--HG--
extra : convert_revision : 29d2c4b70c56f13642466bd88c82f36ba849ed9d
2005-01-28 15:57:40 -05:00
Nathan Binkert
ceec841980 add a no touch stream benchmark clean up a little
--HG--
extra : convert_revision : 41ff3dc85492e1d57fc30389f923d564156b4237
2004-11-18 16:23:28 -05:00
Nathan Binkert
91628e13a9 Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/latest

--HG--
extra : convert_revision : e1a178b33e9de6a6a04d4967b1abe9cc7fddcea3
2004-11-17 22:08:36 -05:00
Ali Saidi
72aea04d8d fixed swap disk, now it doesn't have a partition table
--HG--
extra : convert_revision : a2b6ddd25e179b830dd58a1940ca8e1f20684b2e
2004-11-17 22:05:29 -05:00
Nathan Binkert
69039fe101 Reduce the amount of time we delay when dumping a checkpoint for
netperf runs

configs/boot/nat-netperf-maerts-client.rcS:
configs/boot/nat-netperf-stream-client.rcS:
configs/boot/netperf-maerts-client.rcS:
configs/boot/netperf-rr.rcS:
configs/boot/netperf-stream-client.rcS:
    dont' delay for so long when dumping a checkpoint

--HG--
extra : convert_revision : 25f35957ceef3f55c6edb77fa07be0044de5ec36
2004-11-17 21:38:08 -05:00
Ali Saidi
77e0868099 Add the boot scripts for nfs tcp
--HG--
extra : convert_revision : 74625c44f2f7c9bcdc2718bbee891ea112f07583
2004-11-17 18:56:57 -05:00
Ali Saidi
95fdc9e47b added small block nfs script
--HG--
extra : convert_revision : 1fab69c3ccda27cab2cec1375bc1bd02b2b8f156
2004-11-17 02:08:27 -05:00
Lisa Hsu
1d25eb4cbf Merge zizzer:/bk/m5 into zed.eecs.umich.edu:/z/hsul/work/m5
--HG--
extra : convert_revision : 6c02cd3a846edcb915ba5d243bb938a9cc42f154
2004-11-16 22:43:23 -05:00
Lisa Hsu
182425da82 add support for NAT under netperf stream, maerts, and spec-surge.
configs/boot/spec-surge-client.rcS:
configs/boot/surge-client.rcS:
    fix this rcS - don't sleep, instead wait for the server to tell you it's done.
configs/boot/spec-surge-server.rcS:
configs/boot/surge-server.rcS:
    notify the client you're done starting the server.

--HG--
extra : convert_revision : b708bd0a9147e248eed7c27e7078668fbd98b95e
2004-11-16 22:43:12 -05:00
Ali Saidi
9f2df2d621 skip the nfs charecter by charecter and re-write stuff
configs/boot/nfs-client.rcS:
    skip the charecter and rewrite test

--HG--
extra : convert_revision : 2630e1f1a2a52a4e96a45e12769a94de28ad5c93
2004-11-16 21:59:12 -05:00
Ali Saidi
82235799d3 fixed for 768MB runs
--HG--
extra : convert_revision : c86b282788919d414470aaf551094fee1bebbbab
2004-11-16 00:34:45 -05:00
Nathan Binkert
eb7b873b05 Fix up the spec-surge benchmark
configs/boot/spec-surge-client.rcS:
    change the number of connections and add stuff for the
    file set size and checkpointing

--HG--
extra : convert_revision : 9e0fe74f44300893c6050e3eb1ae302f71c02767
2004-11-15 18:20:43 -05:00
Nathan Binkert
63dbaccdc4 more whitespace fixes
configs/boot/spec-surge-client.rcS:
configs/boot/spec-surge-server.rcS:
    whitespace fixes

--HG--
extra : convert_revision : 90eb2a325a3cf4436081c992d6f3e0f903980ff7
2004-11-15 16:07:28 -05:00
Nathan Binkert
abbbea57a7 more formatting
configs/boot/nfs-server.rcS:
    fix whitespace

--HG--
extra : convert_revision : d421d5fa1e041b041d7c47d36abe55a2dd3e7487
2004-11-15 15:45:55 -05:00
Nathan Binkert
2cc34a34df formatting
configs/boot/nfs-client.rcS:
    fix whitespace

--HG--
extra : convert_revision : dc384870de9431fe30b13a2c8c69d97b2d06dca9
2004-11-15 15:44:25 -05:00
Nathan Binkert
49d470a3b5 cleanup the nfs server script
configs/boot/nfs-server.rcS:
    don't need extra IP aliases

    re-order the nfs daemons so they happen in the right order
    and don't have the shell put them in the background since they
    will auto detach anyway.

--HG--
extra : convert_revision : a6b13ac91d1649878d346663f6ddff56d9a8a8ec
2004-11-15 15:42:15 -05:00
Ali Saidi
a89398e262 patched nfs boot scripts
configs/boot/nfs-server.rcS:
    made the partition size correct

--HG--
extra : convert_revision : 4e9bdbe3e465aea2a914fd928b47296031c2523b
2004-11-13 23:09:17 -05:00
Ali Saidi
f63dd31f4e fixed nfs scripts hopefully for the last time
configs/boot/nfs-client.rcS:
    lucky #3

--HG--
extra : convert_revision : a55f29e4c087e7ab95ea584316ad6fe4ebb5df9a
2004-11-13 23:08:08 -05:00
Ali Saidi
2282b0aa61 Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/tmp/m5
--HG--
extra : convert_revision : 7696b915099bc847bbb9bd9f97fd30b1825c68d5
2004-11-12 18:47:14 -05:00
Ali Saidi
8fc76693d2 slightly different parameters for nfs script
--HG--
extra : convert_revision : 1576f875646567cc661a8e3f07c00c4b282e9f64
2004-11-12 18:47:07 -05:00
Lisa Hsu
78118bffbb add surge and spec-surge readfiles. also make the naming system uniform, there were 3 different ways!!! i like ali's.
--HG--
rename : configs/boot/client.netperf.maerts => configs/boot/netperf-maerts-client.rcS
rename : configs/boot/client.netperf.rr => configs/boot/netperf-rr.rcS
rename : configs/boot/server.netperf => configs/boot/netperf-server.rcS
rename : configs/boot/client.netperf.stream => configs/boot/netperf-stream-client.rcS
extra : convert_revision : 8c841e18dac9634f0680b857f3d0676b100dd448
2004-11-12 15:03:28 -05:00
Ali Saidi
856fdbe5aa Added nfs-client.rcS and nfs-server.rcS
--HG--
extra : convert_revision : 48cf156ce397b68075c07ed072c95644affa3ef1
2004-11-12 14:21:52 -05:00
Nathan Binkert
e3d0e9cf76 commented script with various kernel parameter tweaks for better
network performance

--HG--
extra : convert_revision : 9fd2f18a0d2b79942661d764d90177a50754d9c0
2004-08-11 10:17:11 -04:00
Nathan Binkert
00270ba3a7 tweak a bunch of kernel parameters to get better performance
--HG--
extra : convert_revision : 57cca576fac4013027c2cb6c85cc73cbbcf772ae
2004-08-10 09:08:36 -04:00
Nathan Binkert
7739f32758 fix paths for changes in disk image layout
--HG--
extra : convert_revision : 506ff845efc8d786639c29931eb4abd3a5860fcf
2004-07-14 09:06:56 -04:00
Nathan Binkert
989eb88576 Scripts that can be used with server.readfile and client.readfile
to run the netperf benchmark

--HG--
extra : convert_revision : a2ce490e0c44996d0876a6839ad333643ec252c8
2004-07-08 16:01:13 -04:00