Ali Saidi
84e07f3a51
Merge zizzer:/bk/newmem
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into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : f77e5cf8cc5b99960d28e1cc109d140f1013cfca
2006-11-06 14:14:49 -05:00
Ali Saidi
0de8850136
small fixes for solaris
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--HG--
extra : convert_revision : 3546b2cecf7e7e8e62295abc1ed08b3b6d2b0a8b
2006-11-06 14:14:18 -05:00
Kevin Lim
2506c15620
Merge ktlim@zizzer:/bk/newmem
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into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem
--HG--
extra : convert_revision : d6bb87586cf7ee63ca32e36944c3755fae0b55d0
2006-11-06 13:27:57 -05:00
Kevin Lim
652281a61c
Clean up clock phase drift code a bit.
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src/cpu/base.cc:
Move clock phase drift code to the base CPU so that any CPU model can use it.
src/cpu/base.hh:
Added two functions to help get the next cycle the CPU should be scheduled.
src/cpu/simple/atomic.cc:
src/cpu/simple/timing.cc:
Use the function now in BaseCPU.
--HG--
extra : convert_revision : 444494b66ffc85fc473c23f57683c5f9458ad80c
2006-11-06 13:27:45 -05:00
Ali Saidi
430622c173
replace NULL with 0.... Why isn't NULL defined by default on Mac OS X I don't know
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--HG--
extra : convert_revision : b60403445bd4e855732fd4e6753068abd90ecc9d
2006-11-06 10:15:27 -05:00
Kevin Lim
257e09d626
Update refs.
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--HG--
extra : convert_revision : 61d298fb0d9a66a76209a6bfcdb7c14f2efca947
2006-11-05 20:42:05 -05:00
Kevin Lim
067c9c5531
Initialize pointer to NULL.
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src/cpu/o3/lsq_unit_impl.hh:
Be sure to initialize pointer to NULL.
--HG--
extra : convert_revision : 917d5119e4bd8eae10959ed07069d8c694315c7a
2006-11-05 20:29:38 -05:00
Ali Saidi
de90ae4825
Merge zizzer:/bk/newmem
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into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : d7133e32cfca9f15869ee9ab7a93e3470e7d9038
2006-11-04 21:41:10 -05:00
Ali Saidi
21cf4a46b9
fixes so that M5 will compile under solaris
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SConstruct:
Add check to see if we need to include libsocket
src/arch/sparc/floatregfile.cc:
src/arch/sparc/intregfile.cc:
use memset rather than bzero and include the appropriate headerfile
src/base/pollevent.cc:
If we're compling under solaris we need sys/file.h
src/base/random.cc:
src/base/random.hh:
solaris doesn't have random(), so use rint with the correct rounding mode
if we're compiling on solaris
src/base/stats/flags.hh:
u_int32_t??
src/base/time.hh:
grab the timersub() define from freebsd since it doesn't exist in solaris
src/cpu/inst_seq.hh:
we don't need to include stdint here
src/sim/byteswap.hh:
the method to detect endianness on Solaris is a little more complex...
--HG--
extra : convert_revision : 6b7db0e900e7bccfc250d65c125065f27280dda1
2006-11-04 21:41:01 -05:00
Gabe Black
601822c6b5
Make things compile in SE again.
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--HG--
extra : convert_revision : cf7faf5001b31d61c61ddce2386d61c919075800
2006-11-03 14:42:12 -05:00
Gabe Black
8778d85b2d
Use a PowerOnReset to initialize the cpu.
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--HG--
extra : convert_revision : 9e65af095c37c7c67db377424d2d4363fa8065f9
2006-11-03 14:41:27 -05:00
Gabe Black
6ad386f1a8
Calling syscalls from within the trap instruction's invoke method won't work because apparently you need an xc for that and not a tc. Cleaned up the TrapInstruction fault in light of this.
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--HG--
extra : convert_revision : 1805c9244cfd62d0ee7862d8fd7c9983e00c5747
2006-11-03 14:40:35 -05:00
Gabe Black
4a5cb3f425
The tc needs to be protected instead of private so that the CpuEventWrapper can access it.
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--HG--
extra : convert_revision : bd836d63ac3630b20dda552e7b289730f3c114ef
2006-11-03 11:05:56 -05:00
Gabe Black
29a79acb7c
Gutted out the old Alpha stuff.
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--HG--
extra : convert_revision : 6767dc1305a58e3e7eb0ee909d54768e51744927
2006-11-03 11:05:13 -05:00
Gabe Black
3f4b098985
Added a stub initCPU function. This would be a good place to force in a PowerOnReset fault to kick start the CPU.
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--HG--
extra : convert_revision : 79e1fa2ef40e326682069639e260db255fd29d93
2006-11-03 11:04:10 -05:00
Gabe Black
6b701a6d25
Compilation fixes.
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--HG--
extra : convert_revision : 44d67a3bb95f875f17586499aa4a04268aa2fd46
2006-11-03 11:03:03 -05:00
Gabe Black
70c0ba22c4
Added this constant to get compilation to work. The value is bogus since I don't know what it actually represents.
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--HG--
extra : convert_revision : ab579c1275bfcfb7ffe21633bd8c5b9bea24015e
2006-11-03 10:59:24 -05:00
Gabe Black
ab651344dd
Add the syscall number as the second parameter for the trap fault. This could be improved and syscalls could be called from the trap's invoke method.
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--HG--
extra : convert_revision : 127a3673a076110fb3605c0fbc93e8d7e9fec84b
2006-11-03 10:56:47 -05:00
Gabe Black
e6fed44625
Add an invoke function for PowerOnReset
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--HG--
extra : convert_revision : a1cdd35c74f6e85f42a04061b466ec7617da8ac2
2006-11-03 10:55:29 -05:00
Gabe Black
694323b7c4
Move around misc reg code
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src/arch/sparc/faults.cc:
Moved some code here from miscregfile.cc
src/arch/sparc/miscregfile.cc:
Moved code from here to faults.cc, and merged (read|set)MiscRegWithEffect and it's FS version from ua2005.cc
src/arch/sparc/miscregfile.hh:
readFSRegWithEffect is no longer a seperate function, and is instead done in the main readRegWith Effect.
--HG--
extra : convert_revision : 0b45f0f78e83929b32ddd2f443c8b1dbf9bc04fb
2006-11-03 10:54:34 -05:00
Gabe Black
7c5a859243
removed ua2005.cc since it's been obsorbed into the miscregfile, and added system.cc
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--HG--
extra : convert_revision : 2a124adcefe0d15860632a05e8788d3fd34008c2
2006-11-03 10:52:08 -05:00
Gabe Black
118b9dc1f9
Got rid of "inPalMode". Some places are still effectively checking if they are in PAL mode, however.
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--HG--
extra : convert_revision : b52d9642efc474eaf97437fa2df879efefa0062b
2006-11-03 04:25:33 -05:00
Gabe Black
c8fc116c76
Add a new file which describes an ISA's interrupt handling mechanism. It records when interrupts are requested, and returns an interrupt to execute if the
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--HG--
extra : convert_revision : c535000a6a170caefd441687b60f940513d29739
2006-11-03 02:25:39 -05:00
Gabe Black
fa91832900
Fixed a comment
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--HG--
extra : convert_revision : bebc701508e1d38ee74a07377c634d5e46e89abe
2006-11-03 01:15:31 -05:00
Kevin Lim
e71ccde663
Merge ktlim@zizzer:/bk/newmem
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into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix
--HG--
extra : convert_revision : a9a41e2c292bd95aa148e1cf4d9a77c0622a462b
2006-11-02 15:20:47 -05:00
Kevin Lim
45363ea658
Have bus use the BadAddress device to handle bad addresses. The O3 CPU should be able to boot into Linux with caches on after this change.
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src/mem/bus.cc:
src/mem/bus.hh:
Bus now will be setup with a default responder, unless the user overrides it. This default responder should return BadAddress if no matching port is found.
src/python/m5/objects/Bus.py:
Bus now has a default responder for FS mode if the user doesn't override it. It returns BadAddress if no matching port is found.
src/python/m5/objects/Tsunami.py:
Add bad address device. Also record when the user has specified their own default responder.
--HG--
extra : convert_revision : 59070477ae313ee711b2d59baa2369c9a91c5b85
2006-11-02 15:20:37 -05:00
Kevin Lim
c3485a6548
Implement device that will return BadAddress.
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--HG--
extra : convert_revision : d833c20f691e01c84a0678f19f7d83f3ee50c0c1
2006-11-02 15:18:35 -05:00
Kevin Lim
8d53f298a6
Caches return a new functional port whenever asked for one.
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src/mem/cache/base_cache.cc:
Have caches return a new functional port whenever asked for them. I'm pretty sure this is desired behavior. Ron can correct me if it's not.
--HG--
extra : convert_revision : e1fadf895a7d714968128ff900d10e86fde53387
2006-11-02 15:17:45 -05:00
Kevin Lim
dd5e2cd959
More proper handling of the ports.
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src/cpu/simple_thread.cc:
Fix up port handling to share code.
src/cpu/thread_state.cc:
Separate code off into a function.
src/cpu/thread_state.hh:
Make a separate function that will get the CPU's memory's functional port.
--HG--
extra : convert_revision : 96a9bb3c5e4b9ba5511678c0fd17f0017c8cd312
2006-11-02 14:58:31 -05:00
Kevin Lim
64f8cd12c6
Remove function that should have been deleted.
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src/cpu/simple_thread.cc:
This function should have been deleted from an earlier push.
src/cpu/simple_thread.hh:
Delete this function; it's now in thread_state.hh/.cc.
--HG--
extra : convert_revision : f78dcf9c2b388418030d48d0ea4911c8b8b1f5ff
2006-11-02 13:12:36 -05:00
Kevin Lim
ccaf80cc46
Use ISA specific makeExtMI.
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src/arch/alpha/utility.hh:
For now makeExtMI will be specific to the ISA.
--HG--
extra : convert_revision : 89959c6499efcc3df9301ad8ea039580764a1496
2006-11-02 13:11:38 -05:00
Lisa Hsu
683d8f0831
Merge zizzer:/bk/newmem
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into zed.eecs.umich.edu:/z/hsul/work/m5/newmem
--HG--
extra : convert_revision : a30e2da1f0a272b8c867c0e7a3491118be92bc5e
2006-11-01 19:25:20 -05:00
Lisa Hsu
74ff45d353
factor some more commone code and enable going from checkpoint into arbitrary CPU with or without caches.
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configs/common/Simulation.py:
enable going from checkpoint into arbitrary CPU with or without caches.
--HG--
extra : convert_revision : 02e7ff8982fdb3a08bc609f89bd58df5b3a581b2
2006-11-01 19:25:09 -05:00
Gabe Black
b565660c42
Merge zizzer.eecs.umich.edu:/bk/newmem/
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into zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops
--HG--
extra : convert_revision : c2f7398a0d14dd11108579bb243ada7420285a22
2006-11-01 19:00:59 -05:00
Gabe Black
8dbab9f701
Added code to handle draining.
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--HG--
extra : convert_revision : 3861f553bde5865cd21a8a58a4c410896726f0a3
2006-11-01 19:00:49 -05:00
Gabe Black
6f78d49410
Fix a range check on the ipr_index.
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--HG--
extra : convert_revision : 84e25abd4bb2de0c877c883804d39feb019c7030
2006-11-01 18:46:18 -05:00
Gabe Black
2b11b47357
Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register file functions to not take faults
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--HG--
extra : convert_revision : 1cef0734462ee2e4db12482462c2ab3c134d3675
2006-11-01 16:44:45 -05:00
Lisa Hsu
7665be4f70
make it so that you can do a standard switch without the caches option. this will have only the o3 cpu have a cache, rather than timing (warmup) + o3 have cache.
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--HG--
extra : convert_revision : d733de7ebb362bbd7376a0235ee7f117df2d6d37
2006-11-01 11:49:39 -05:00
Lisa Hsu
9ef8bf74c7
change name of 2nd switch_cpu so that ckpt recovery with multiple cpus doens't get confused.
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--HG--
extra : convert_revision : 16c710c4196c520d03c1993a26f38cf1f04ab637
2006-11-01 11:40:49 -05:00
Gabe Black
f3ba6d20f6
Arg!
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--HG--
extra : convert_revision : 8328d002780c0291e7eb264076a62084de88b7a5
2006-10-31 18:59:50 -05:00
Gabe Black
1543c3d0a1
More typos! I need to get nfs to work.
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--HG--
extra : convert_revision : f5693e96d376254f777fb0cce7b5be3d36efbea9
2006-10-31 18:51:26 -05:00
Gabe Black
1dd903e856
Fix another typo
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--HG--
extra : convert_revision : ad7058babf2a13bfe543e05f2662dc49a18a8b8b
2006-10-31 18:39:17 -05:00
Gabe Black
39de635fbf
Check for out of range IPR values as well.
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--HG--
extra : convert_revision : 9ca241bb71d8a1d022e54485383a88d2abece663
2006-10-31 18:19:45 -05:00
Gabe Black
45368c0300
Fix stupid typo
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--HG--
extra : convert_revision : fbfc82974e89b2c726b689674c9f5d957682b280
2006-10-31 18:01:31 -05:00
Gabe Black
fb5ba85abb
Make two simple utility functions to determine if a MiscReg index corresponding to an IPR is readable or writable.
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--HG--
extra : convert_revision : 89eebba5eec01e629213997d24c734a6acad0ecb
2006-10-31 17:50:57 -05:00
Gabe Black
312a4710d7
Forgot to add intr_flag in one place.
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--HG--
extra : convert_revision : 637256098e2283c18f98bdaabf21f3039d162a15
2006-10-31 17:14:46 -05:00
Gabe Black
ad201172c9
We don't include ipr.cc in SE builds, so don't call it.
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--HG--
extra : convert_revision : 45e52d7afbf74e0ddde11f58aeb084186389fc06
2006-10-31 16:59:41 -05:00
Gabe Black
ace4f0c188
Made the old name refer to the miscreg index to prevent having to change code all over the place.
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--HG--
extra : convert_revision : e890a3ce420336acdb220396dcbf66d4b9974c76
2006-10-31 16:36:45 -05:00
Gabe Black
44f2c05118
Forgot to change the index.
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--HG--
extra : convert_revision : 5a444e635d20bcca445a10e43592b6c10d25e879
2006-10-31 16:18:54 -05:00
Gabe Black
ece796ab8a
Make the IPRs use regular miscreg indexes, and make a table or two to find the miscreg index of a specific IPR.
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--HG--
extra : convert_revision : dd235261e7086d6667b1b2bdc4a81b2573e21d53
2006-10-31 16:02:28 -05:00