sanchayanmaity/gem5
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94 commits

Author SHA1 Message Date
Gabe Black
b066e717f4 ARM: Fix an instruction in the cmpxchg kernel provided routine. 
The instruction was encoded as a load instead of the intended store.
 2009-07-29 00:18:26 -07:00
Gabe Black
c2da5bae17 ARM: Get rid of a stray line in the set_tls handler. 2009-07-29 00:17:20 -07:00
Gabe Black
1e04b6281d ARM: Make the ARM native tracer stop M5 if control diverges. 
If the control flow of M5's executable and statetrace's target process get out
of sync even a little, there will be a LOT of output, very little of which
will be useful. There's also almost no hope for recovery. In those cases, we
might as well give up and not generate a huge, mostly worthless trace file.
 2009-07-29 00:17:11 -07:00
Gabe Black
873112ea99 ARM: Make sure the target process doesn't run away from statetrace. 2009-07-29 00:14:43 -07:00
Ali Saidi
0a9eb59e6f ARM: Ignore the "times" system call. 2009-07-29 00:09:46 -07:00
Ali Saidi
19a4fb0ff3 ARM: Fix an ioctl constant. 2009-07-29 00:09:44 -07:00
Ali Saidi
daf8718da9 ARM: Update some syscall constants and delete others that are Alpha only. 2009-07-27 00:54:55 -07:00
Gabe Black
d3f2992e39 ARM: Decode fstmx and fldmx instructions. We can ignore them for now. 2009-07-27 00:54:50 -07:00
Gabe Black
52b4a7c36f ARM: Only send information that changed between statetrace and M5. 2009-07-27 00:54:30 -07:00
Gabe Black
90d3d3535b imported patch nativetracestreamline.patch 2009-07-27 00:54:24 -07:00
Gabe Black
8ec235c7b1 ARM: Make native trace print out what instruction caused an error. 2009-07-27 00:54:09 -07:00
Gabe Black
c18d6cb1a7 ARM: Implement a basic version of the fmxr instruction. 2009-07-27 00:53:29 -07:00
Gabe Black
2828fa459d ARM: Implement a basic version of the fmrx instruction. 2009-07-27 00:53:24 -07:00
Gabe Black
4079792f2b ARM: Add in spots for the VFP control registers. 2009-07-27 00:53:10 -07:00
Gabe Black
b560acfe17 ARM: Fix the CLZ instruction. 2009-07-27 00:52:59 -07:00
Gabe Black
dc0df3f396 ARM: Initialize the CPSR so that we're in user mode. 2009-07-27 00:52:48 -07:00
Gabe Black
b8bf34be05 ARM: Set up the initial stack frame to match a recent Linux. 2009-07-27 00:52:31 -07:00
Gabe Black
a41e132007 ARM: Make native trace only print when registers are changing value. 
When registers have incorrect values but aren't actively changing, it's likely
they're not being modified at all. The fact that they're still wrong isn't
very important.
 2009-07-27 00:52:01 -07:00
Gabe Black
519ace4dfd ARM: Add a native tracer. 
--HG--
rename : src/arch/sparc/SparcNativeTrace.py => src/arch/arm/ArmNativeTrace.py
rename : src/arch/sparc/nativetrace.cc => src/arch/arm/nativetrace.cc
rename : src/arch/sparc/nativetrace.hh => src/arch/arm/nativetrace.hh
 2009-07-27 00:51:35 -07:00
Ali Saidi
e7640227ca ARM: Fix fstat/fstat64 structs to match EABI definitions. 2009-07-27 00:51:20 -07:00
Ali Saidi
99831ed938 ARM: Handle register indexed system calls. 2009-07-27 00:51:01 -07:00
Jack Whitham
fce4412d76 ARM: Fix the "open" flag constants. 2009-07-14 21:03:33 -07:00
Gabe Black
e14c408b62 ARM: Fold the MiscRegFile all the way into the ISA object. 2009-07-09 20:28:27 -07:00
Gabe Black
b398b8ff1b Registers: Add a registers.hh file as an ISA switched header. 
This file is for register indices, Num* constants, and register types.
copyRegs and copyMiscRegs were moved to utility.hh and utility.cc.

--HG--
rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh
rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh
rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh
rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh
rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
 2009-07-08 23:02:21 -07:00
Gabe Black
997f36c711 Registers: Collapse ARM and MIPS regfile directories. 
--HG--
rename : src/arch/arm/regfile/misc_regfile.hh => src/arch/arm/misc_regfile.hh
rename : src/arch/arm/regfile/regfile.cc => src/arch/arm/regfile.cc
rename : src/arch/mips/regfile/misc_regfile.cc => src/arch/mips/misc_regfile.cc
rename : src/arch/mips/regfile/misc_regfile.hh => src/arch/mips/misc_regfile.hh
 2009-07-08 23:02:21 -07:00
Gabe Black
5c37d10624 Registers: Eliminate the ISA defined RegFile class. 2009-07-08 23:02:21 -07:00
Gabe Black
43345bff6c Registers: Move the PCs out of the ISAs and into the CPUs. 2009-07-08 23:02:21 -07:00
Gabe Black
1b29f1621d ARM, Simple CPU: Fix an index and add assert checks. 2009-07-08 23:02:21 -07:00
Gabe Black
27b6148f47 ARM: Flush out the ARM's int_regfile.hh. 2009-07-08 23:02:20 -07:00
Gabe Black
a480ba00b9 Registers: Eliminate the ISA defined integer register file. 2009-07-08 23:02:20 -07:00
Gabe Black
0cb180ea0d Registers: Eliminate the ISA defined floating point register file. 2009-07-08 23:02:20 -07:00
Gabe Black
25884a8773 Registers: Get rid of the float register width parameter. 2009-07-08 23:02:20 -07:00
Gabe Black
32daf6fc3f Registers: Add an ISA object which replaces the MiscRegFile. 
This object encapsulates (or will eventually) the identity and characteristics
of the ISA in the CPU.
 2009-07-08 23:02:20 -07:00
Gabe Black
3e2cad8370 ARM: Use custom read/write code to alias R15 with the PC. 2009-07-08 23:02:20 -07:00
Gabe Black
95392d3fb8 ARM: Move the remaining microops out of the decoder and into the ISA desc. 2009-07-08 23:02:19 -07:00
Gabe Black
1d4f338b39 ARM: Move the memory microops out of the decoder and into the ISA desc. 2009-07-08 23:02:19 -07:00
Gabe Black
70a75ceb84 ARM: Move the integer microops out of the decoder and into the ISA desc. 2009-07-08 23:02:19 -07:00
Gabe Black
4eb18cc07a ARM: Improve memory instruction disassembly. 2009-07-08 23:02:19 -07:00
Gabe Black
2fb8d481ab ARM: Tune up predicated instruction decoding. 2009-07-08 23:02:19 -07:00
Gabe Black
ddcf084f16 ARM: Get rid of the MemAcc and EAComp static insts. 2009-07-08 23:02:19 -07:00
Gabe Black
cae870eded ARM: Get rid of end_addr in the ArmMacroStore constructor. 2009-07-08 23:02:19 -07:00
Gabe Black
311f77f33d ARM: Add an AddrMode2 format for memory instructions that use address mode 2. 2009-07-08 23:02:19 -07:00
Gabe Black
826a3582ea ARM: Don't always update CPSR. 2009-07-08 23:02:19 -07:00
Gabe Black
17f0943398 ARM: Add an AddrMode3 format for memory instructions that use address mode 3. 2009-07-08 23:02:19 -07:00
Gabe Black
dac0cb5c7e ARM: Add load/store double instructions. 2009-07-08 23:02:10 -07:00
Gabe Black
1ca0688c4c ARM: Add operands for the load/store double instructions. 2009-07-08 23:02:01 -07:00
Jack Whitham
a223a065e6 ARM: Fix how address mode bits are handled. 2009-07-02 23:23:06 -07:00
Jack Whitham
a738006397 ARM: Fix the code snippet for mla. 2009-07-02 23:22:58 -07:00
Gabe Black
26c70ce2cb ARM: Make DataOps select from a set of ways to set the c and v flags. 2009-07-01 22:17:06 -07:00
Gabe Black
148c265cf3 ARM: Get rid of some bitfields that aren't used. A few may need to be readded. 2009-07-01 22:16:51 -07:00