gem5/src/arch/arm
Gabe Black b066e717f4 ARM: Fix an instruction in the cmpxchg kernel provided routine.
The instruction was encoded as a load instead of the intended store.
2009-07-29 00:18:26 -07:00
..
insts ARM: Move the memory microops out of the decoder and into the ISA desc. 2009-07-08 23:02:19 -07:00
isa ARM: Decode fstmx and fldmx instructions. We can ignore them for now. 2009-07-27 00:54:50 -07:00
linux ARM: Fix an instruction in the cmpxchg kernel provided routine. 2009-07-29 00:18:26 -07:00
ArmNativeTrace.py ARM: Make the ARM native tracer stop M5 if control diverges. 2009-07-29 00:17:11 -07:00
ArmTLB.py arm: Unify the ARM tlb. We forgot about this when we did the rest. 2009-04-21 15:40:25 -07:00
faults.cc Registers: Eliminate the ISA defined RegFile class. 2009-07-08 23:02:21 -07:00
faults.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
isa.hh ARM: Initialize the CPSR so that we're in user mode. 2009-07-27 00:52:48 -07:00
isa_traits.hh Registers: Add a registers.hh file as an ISA switched header. 2009-07-08 23:02:21 -07:00
locked_mem.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
microcode_rom.hh arm: include missing file for arm 2009-04-21 15:40:26 -07:00
miscregs.hh ARM: Add in spots for the VFP control registers. 2009-07-27 00:53:10 -07:00
mmaped_ipr.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
nativetrace.cc ARM: Make the ARM native tracer stop M5 if control diverges. 2009-07-29 00:17:11 -07:00
nativetrace.hh ARM: Make the ARM native tracer stop M5 if control diverges. 2009-07-29 00:17:11 -07:00
pagetable.cc arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
pagetable.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
predecoder.hh ARM: Add in some new artificial fields that make decoding a little easier. 2009-07-01 22:11:27 -07:00
process.cc ARM: Set up the initial stack frame to match a recent Linux. 2009-07-27 00:52:31 -07:00
process.hh Merge ARM into the head. ARM will compile but may not actually work. 2009-04-06 10:19:36 -07:00
registers.hh Registers: Add a registers.hh file as an ISA switched header. 2009-07-08 23:02:21 -07:00
remote_gdb.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
SConscript ARM: Add a native tracer. 2009-07-27 00:51:35 -07:00
SConsopts arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
stacktrace.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
tlb.cc arm: Unify the ARM tlb. We forgot about this when we did the rest. 2009-04-21 15:40:25 -07:00
tlb.hh arm: Unify the ARM tlb. We forgot about this when we did the rest. 2009-04-21 15:40:25 -07:00
types.hh Registers: Add a registers.hh file as an ISA switched header. 2009-07-08 23:02:21 -07:00
utility.hh Registers: Add a registers.hh file as an ISA switched header. 2009-07-08 23:02:21 -07:00
vtophys.cc arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
vtophys.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00