SConscript:
The new faults.cc file in sim allocates the system wide faults. When these faults are generated through a function interface in the ISA, this file may go away.
arch/alpha/alpha_memory.cc:
Changed Fault to Fault * and took the underscores out of fault names.
arch/alpha/alpha_memory.hh:
Changed Fault to Fault *. Also, added an include for the alpha faults.
arch/alpha/ev5.cc:
Changed the fault_addr array into a fault_addr function. Once all of the faults can be expected to have the same type, fault_addr can go away completely and the info it provided will come from the fault itself. Also, Fault was changed to Fault *, and underscores were taken out of fault names.
arch/alpha/isa/decoder.isa:
Changed Fault to Fault * and took the underscores out fault names.
arch/alpha/isa/fp.isa:
Changed Fault to Fault *, and took the underscores out of fault names.
arch/alpha/isa/main.isa:
Changed Fault to Fault *, removed underscores from fault names, and made an include of the alpha faults show up in all the generated files.
arch/alpha/isa/mem.isa:
Changed Fault to Fault * and removed underscores from fault names.
arch/alpha/isa/unimp.isa:
arch/alpha/isa/unknown.isa:
cpu/exec_context.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
dev/alpha_console.cc:
dev/ide_ctrl.cc:
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
Changed Fault to Fault *, and removed underscores from fault names.
arch/alpha/isa_traits.hh:
Changed the include of arch/alpha/faults.hh to sim/faults.hh, since the alpha faults weren't needed.
cpu/base_dyn_inst.cc:
Changed Fault to Fault *, and removed underscores from fault names. This file probably shouldn't use the Unimplemented Opcode fault.
cpu/base_dyn_inst.hh:
Changed Fault to Fault * and took the underscores out of the fault names.
cpu/exec_context.cc:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/fetch.hh:
dev/alpha_console.hh:
dev/baddev.hh:
dev/ide_ctrl.hh:
dev/isa_fake.hh:
dev/ns_gige.hh:
dev/pciconfigall.hh:
dev/sinic.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
dev/uart.hh:
dev/uart8250.hh:
Changed Fault to Fault *.
cpu/o3/alpha_cpu.hh:
Changed Fault to Fault *, removed underscores from fault names.
cpu/o3/alpha_cpu_impl.hh:
Changed Fault to Fault *, removed underscores from fault names, and changed the fault_addr array to the fault_addr function. Once all faults are from the ISA, this function will probably go away.
cpu/o3/commit_impl.hh:
cpu/o3/fetch_impl.hh:
dev/baddev.cc:
Changed Fault to Fault *, and removed underscores from the fault names.
cpu/o3/regfile.hh:
Added an include for the alpha specific faults which will hopefully go away once the ipr stuff is moved, changed Fault to Fault *, and removed the underscores from fault names.
cpu/simple/cpu.hh:
Changed Fault to Fault *
dev/ns_gige.cc:
Changed Fault to Fault *, and removdd underscores from fault names.
dev/sinic.cc:
Changed Fault to Fault *, and removed the underscores from fault names.
dev/uart8250.cc:
Chanted Fault to Fault *, and removed underscores from fault names.
kern/kernel_stats.cc:
Removed underscores from fault names, and from NumFaults.
kern/kernel_stats.hh:
Changed the predeclaration of Fault from an enum to a class, and changd the "fault" function to work with the classes instead of the enum. Once there are no system wide faults anymore, this code will simplify back to something like it was originally.
sim/faults.cc:
This allocates the system wide faults.
sim/faults.hh:
This declares the system wide faults.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Removed the underscores from fault names.
--HG--
rename : arch/alpha/faults.cc => sim/faults.cc
rename : arch/alpha/faults.hh => sim/faults.hh
extra : convert_revision : 253d39258237333ae8ec4d8047367cb3ea68569d
makes it easier to implement PCI device models.
dev/pcidev.cc:
default implementations for read/write and readBarX/writeBarX functions
--HG--
extra : convert_revision : bbe2e2a2a506e2dd94d98f8e0feaefef96380be9
objects. The improper serialization of arrays was particularly
bad.
dev/alpha_console.cc:
dev/isa_fake.cc:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
the pio interface is a different simobject and should have a
different name.
dev/ethertap.cc:
fix serialization.
dev/ide_ctrl.cc:
- the pio interface is a different simobject and should have a
different name.
- properly initialize variables
- When serializing an array, the size is the number of elements,
not the number of bytes!
dev/pcidev.cc:
When serializing an array, the size is the number of elements,
not the number of bytes!
dev/tsunami_io.hh:
Don't make objects SimObjects if they're not exposed to python.
Don't add serialization functions to events, it's generally not
what you want.
allow the real time clock and interval timer to serialize themselves,
must pass a base name since it is not a SimObject and the values will
be going into the section of the parent.
--HG--
extra : convert_revision : 3fc5de9b858ed770c8f385cf38b53242cf859c33
README:
Clarify cygwin EIO error explanation.
build/SConstruct:
Cygwin header files cause uninitialized var warnings.
dev/ide_ctrl.cc:
Get rid of unnecessary byte-swap calls, some of which were
too ambiguous for cygwin (or gcc 3.4.4).
dev/pcidev.cc:
Disambiguate arg for overloaded byte swap operation
(and fix it to be the correct one).
--HG--
extra : convert_revision : be37c6315aacbec6332b1d09e726b39b4aa18dce
SConscript:
Added more files to compile: dev/pcifake.cc, dev/isa_fake.cc, kern/freebsd/freebsd_system.cc, kern/freebsd/freebsd_events.cc.
arch/alpha/isa_traits.hh:
Added constant for argument register 2 as it is needed by FreebsdSystem::doCalibrateClocks().
cpu/exec_context.hh:
cpu/o3/alpha_cpu.hh:
Replaced htoa()s with gtoh() and htog().
cpu/o3/fetch_impl.hh:
cpu/simple/cpu.cc:
Replaced htoa() with gtoh().
dev/disk_image.cc:
Replaced htoa()s with letoh()s.
dev/ide_ctrl.cc:
Got rid of magic numbers.
Added IdeChannel and IdeRegType type names where necessary.
dev/ide_ctrl.hh:
Got rid of unnecessary macros.
Changed RegType_t to IdeRegType.
Changed bmi_regs to allow accessing registers by name instead of just by array index.
Added IdeChannel enum type to use in place of bool variables which were used to specify IDE channel.
dev/ide_disk.cc:
Rewrote IdeDisk::read and IdeDisk::write functions to specify registers by name instead of indexing through an array.
dev/ide_disk.hh:
Updated command register struct.
dev/ns_gige.cc:
dev/ns_gige.hh:
Made ReadConfig and WriteConfig begin with a lower-case letter.
writeConfig() now takes a pointer to data as a parameter instead of a copy of data.
dev/pciconfigall.cc:
writeConfig() now takes a pointer to data as a parameter instead of a copy of data.
dev/pcidev.cc:
Cleaned up readConfig() and writeConfig() functions.
dev/pcidev.hh:
Added macros to make code that works with the BARs (base adress registers) more readable. writeConfig() now takes a pointer to data.
dev/pcireg.h:
Changed PCIConfig struct to make accessing elements more straight forward. Removed type 1 (for PCI-to-PCI bridges) PCI configuration space struct since it is not used.
dev/rtcreg.h:
Added macros for bit fields in RTC status registers A & B.
dev/sinic.cc:
Function name change: WriteConfig --> writeConfig.
writeConfig() now takes a pointer to data instead of a copy of data.
The accessing of elements of PCIConfig structure is updated.
dev/sinic.hh:
Function name change: WriteConfig --> writeConfig.
writeConfig() now takes a pointer to data instead of a copy of data.
dev/tsunami_io.cc:
Added implementation of new RTC and PIT classes.
dev/tsunami_io.hh:
Added classes for RTC and PIT modules.
dev/tsunamireg.h:
Added macros for DMA ports used by Tsunami-Tru64.
dev/uart8250.cc:
Got rid of a magic number.
Transmit (Tx) interrupts should clear upon a read of the Interrupt ID register.
dev/uart8250.hh:
Added comments and macros dealing with the UART Interrupt ID register.
kern/linux/linux_system.cc:
Replaced htoa() with htog().
python/m5/objects/Pci.py:
PciFake is a python class for Pci Devices that do nothing.
python/m5/objects/Tsunami.py:
TsunamiFake was renamed as IsaFake.
sim/system.cc:
Replaced htoa()s with htog()s.
dev/isa_fake.cc:
New BitKeeper file ``dev/isa_fake.cc''
TsunamiFake was renamed as IsaFake.
dev/isa_fake.hh:
New BitKeeper file ``dev/isa_fake.hh''
TsunmaiFake was renamed as IsaFake.
dev/pitreg.h:
New BitKeeper file ``dev/pitreg.h''
Useful macros for working with PIT (Periodic Interval Timer) registers.
--HG--
extra : convert_revision : 33f3a8a1034af4f6c71b32dd743e371c8613e780
Random some small config file stuff
dev/pcidev.cc:
objects/Pci.mpy:
remove addr since it's not used
--HG--
extra : convert_revision : aeb5993552d65a5e3b57f393bcb7d8aaadf6b5a2
wierd ini files. The ini files are still used as an intermediate step,
but a sophisticated python library exists to help build them more
easily.
SConscript:
add the new embedded file stuff
remove all of the old object description junk
base/inifile.cc:
base/inifile.hh:
get rid of findDefault and findAppend since they were the source
of much evil.
base/trace.cc:
For now, if we don't have the dprintf_stream set up, dump
to standard out. We probably want a command line option
for this.
dev/alpha_console.cc:
PioDevice now takes a platform parameter.
All PioDevices must have a pio_latency parameter. We stick
a dummy parameter in here for now until we get rid of the
builder stuff.
dev/alpha_console.hh:
don't need Platform anymore
dev/baddev.cc:
PioDevice now takes a platform parameter.
All PioDevices must have a pio_latency parameter. We stick
a dummy parameter in here for now until we get rid of the
builder stuff. Same for the platform parameter, though we just
pass the PioDevice a null parameter since it isn't used by
this device and it's quicker.
dev/baddev.hh:
fix #include guards
dev/etherlink.cc:
rename parameters.
dev/ethertap.cc:
rename parameters
dev/ide_ctrl.cc:
All devices need an address even if it will get overwritten later.
dev/ide_disk.cc:
use an enum for the drive ID stuff.
rename disk_delay -> delay
Actually, I think that we should implement "cable select" and
have the controller tell the drive what it is.
dev/io_device.cc:
dev/io_device.hh:
All IO devices take a Platform *
dev/ns_gige.cc:
all devices need an io_bus. rename header_bus to io_bus
We don't need stuff for the interrupt controller since
it's all in the platform now.
dev/ns_gige.hh:
We don't need stuff for the interrupt controller now since
it's all in the platform.
dev/pciconfigall.cc:
Pass a dummy NULL to the PioDevice for the platform since
we don't need one.
dev/pcidev.cc:
Move a bunch of common functionality into the PciDev
dev/platform.hh:
remove unneeded code
dev/tsunami.cc:
remove unused param
dev/tsunami_cchip.cc:
pass platform pointer
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
pass platform variable
dev/uart.hh:
don't need to keep a platform pointer. it's in the base class
kern/linux/linux_system.cc:
kern/tru64/tru64_system.cc:
rename some parameters
sim/builder.cc:
clean up builder code. use more parameters from the
config node. all sections with a type= are now created,
the old mechanisms no longer work
sim/builder.hh:
remove some extra variables since they are found in the ConfigNode
sim/main.cc:
add a quick hack command line argument -X to dump out the
embedded files. (probably should be fixed up a little.)
accept .mpy files
printing to the streams has to happen after the hierarchy
is built since we're moving away from param contexts
sim/param.cc:
add parsing support for ranges
sim/process.cc:
isValid isn't very useful anymore. interpret the names
stdout, stderr, cout, cerr for the file descriptors
sim/pyconfig/SConscript:
Add Action handlers for creating an embedded python file
and for creating an embedded C file.
use these action handlers to embed all objects found in the objects
tree into the binary along with the importer and the m5config stuff
sim/pyconfig/m5config.py:
Major changes to the original configuration file generator. These
changes largely involve implementing copy-on-write like semantics
for all of the SimObjects. Real documentation must be written.
sim/universe.cc:
Universe becomes a SimObject since we don't really have the notion of
param contexts in the python code.
--HG--
rename : sim/pyconfig/m5configbase.py => sim/pyconfig/m5config.py
extra : convert_revision : c353453e5beb91c37f15755998fc0d8858c6829a
to add new devices. Abstract the Platform more so that
it is unnecessary to know know platform specifics for
interrupting or translating PCI DMA addresses.
dev/ide_ctrl.cc:
convert to parameter struct for initialization
use the interrupt functions in the PciDev base class
convert from tsunami to using platform
We don't need an interrupt controller here.
dev/ide_ctrl.hh:
don't use Tsunami, use Platform
make the IdeDisk a friend so that it can access my plaform
convert to parameter struct for construction
dev/ide_disk.cc:
don't use tsunami references, but platform references
dev/ns_gige.cc:
Convert to parameter struct for initialzation. Use code in
base class for interrupts so we don't need to know anything
about the platform. Don't need an IntrControl *.
dev/ns_gige.hh:
We don't need a Tsunami * anymore
convert to a parameter struct for construction
dev/pcidev.cc:
deal with new parameter struct
dev/pcidev.hh:
- Move all of the configuration parameters into a param struct
that we can pass into the constructor.
- Add a Platform * for accessing new generic interrupt post/clear
and dma address translation fuctions
- Create functions for posting/clearing interrupts and translating
dma addresses
dev/platform.cc:
have default functions that panic on pci calls
dev/platform.hh:
don't make the pci stuff pure virtual, but rather provide
default implementations that panic. Also, add dma address
translation.
dev/tsunami.cc:
this-> isn't necessary here.
add pci address translation
dev/tsunami.hh:
implement the pciToDma address translation
--HG--
extra : convert_revision : 7db27a2fa1f1bd84704921ec7ca0280b5653c43e
never clear about whether the end of the range was inclusive
or exclusive. Make it inclusive, but also provide a RangeSize()
function that will generate a Range based on a start and a size.
This, in combination with using the comparison operators, makes
almost all usages of the range not care how it is stored.
base/range.cc:
Make the end of the range inclusive.
start/end -> first/last
(end seems too much like end() in stl)
base/range.hh:
Make the end of the range inclusive.
Fix all comparison operators so that they work correctly with
an inclusive range. Also, when comparing one range to another
with <, <=, >, >=, we only look at the beginning of the range
beacuse x <= y should be the same as x < y || x == y. (This wasn't
the case before.)
Add a few functions for making a range:
RangeSize is start and size
RangeEx is start and end where end is exclusive
RangeIn is start and end where end is inclusive
start/end -> first/last
(end seems too much like end() in stl)
dev/alpha_console.cc:
dev/baddev.cc:
dev/ide_ctrl.cc:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
Use the RangeSize function to create a range.
--HG--
extra : convert_revision : 29a7eb7fce745680f1c77fefff456c2144bc3994
arch/alpha/vtophys.cc:
PGOFSET -> ALPHA_PGOFSET to avoid include file problems
base/callback.hh:
Added a class to create a callback from a function
base/intmath.hh:
make FloorLog2 inlined
dev/pcidev.cc:
more work in getting pciconfig space happy with different endiannesses
dev/uart.cc:
used an incorrect size for write uint64_t instead of uint8_t
sim/system.cc:
when writing things into system data structures we need to pay
attention to endianness
--HG--
extra : convert_revision : 52f441b5789c45db30ef2f6fd4975cbc7323a381
dev/alpha_console.cc:
rather than acessing a byte array for alpha access, access the members
**this requires an updated console**
dev/pcidev.cc:
correctly type all the pci data and store in in little endian no
matter what system we are on
dev/tsunami_uart.cc:
correct a bug with the data type.
kern/linux/linux_system.cc:
system type in hwprb needs to be endian happy as well.
--HG--
extra : convert_revision : 8de9bb69365b5d30fceaf4fa342a1639f92d7a83
dev/ide_ctrl.cc:
Properly serialize/unserialize the PciDev base class to get it to remap
the MMU
dev/ns_gige.cc:
dev/ns_gige.hh:
Remove the "addr" paramter from the constructor and change the device
to use PCI based MMU mappings only
dev/pciconfigall.cc:
Change comments
dev/pcidev.cc:
Properly setup the MMU after a serialize
--HG--
extra : convert_revision : 4b2e7ba58e3c24fac1ff6f80635e704d6ecc0eff
dev/baddev.hh:
dev/pcidev.hh:
dev/tsunami.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
Added doxygen comments
dev/pciconfigall.hh:
Added doxygen comments. Made the hlist of devices private and provided
members to modify the data.
dev/pcidev.cc:
updated for change in pciconfigall
dev/tsunami_pchip.cc:
Deleted commented out code we don't need
kern/linux/linux_syscalls.cc:
Simplified the number -> name conversion.
kern/linux/linux_syscalls.hh:
Removed StandardNumber and replaced with Number.
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
LinuxSkipIdeDelay50msEvent was simply the same as the SkipFunc event,
so I removed it. Same with with LinuxSkipFuncEvent.
--HG--
extra : convert_revision : 1508c335f87d90373f5772f3a0407ea13e858d7e
dev/ide_disk.cc:
Fix to PIO writes and also add command needed for shutdown
dev/pcidev.cc:
Change the panic on write to read-only registers to a debug print. The
kernel tries to write back over all of the PCI registers to restore
the saved SRM state, so we need to let it do this without panicing.
sim/system.cc:
Add back increment of number of running systems to allow trap of halt
work correctly.
--HG--
extra : convert_revision : 84aba4effbec14545f3610c19a8e321d7e7f7cf2
base/range.hh:
andrew thought this might be a bug.
dev/etherpkt.cc:
don't need std:: since there is a using directive
dev/ns_gige.cc:
update to new PIO and PCI system
dev/ns_gige.hh:
update to deal with new PIO and PCI setup
dev/ns_gige_reg.h:
Add some new #defines that I ended up needing
dev/pcidev.cc:
some changes to the debugging printfs of pci device
--HG--
extra : convert_revision : 955ba8e8e1c418cfe1c6549dc3451ea091541556
assumes that all PCI devices are DmaDevices, and if not, they can just
ignore the DMA stuff)
--HG--
extra : convert_revision : aa58b658370696674ca4c32b265bc0400e5dda5a
arch/alpha/vtophys.cc:
base/remote_gdb.cc:
Fix to remote debugger while in PAL code
dev/pcidev.cc:
Remove extra debug printf
--HG--
extra : convert_revision : e64988846ad05cd3ddf47034d72d99dae3501591
some sundry problems with new interface
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
Fixed to use new FunctionalMemory interface
--HG--
extra : convert_revision : bee98e6285d92f28fafacf919ab06eaf333a9b56
dev/pcidev.cc:
Linux 2.6 writes the latency timer, so it was added to the list of
allowable writes
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
A couple of changes so that the new linux autoconf serial driver thinks
that the serial port exists and configures it
--HG--
extra : convert_revision : 6c026ef754e31de56c9b837ceb8f6be48c8d8d9c
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami.cc:
dev/tsunami.hh:
A bunch of changes to clean up new PCI code and to fix build
--HG--
extra : convert_revision : 71063bcc565c50fc293b323ddce2c8e701f544ff
