6 commits

Author	SHA1	Message	Date
Ali Saidi	f3585c841e	stats: update stats for cache occupancy and clock domain changes	2014-01-24 15:29:33 -06:00
Nilay Vaish	2823982a3c	stats: updates due to changes to ticksToCycles()	2013-11-26 17:05:25 -06:00
Steve Reinhardt	10e6450120	test: update stats ... Update stats for recent changes. Mostly minor changes in register access stats due to addition of new cc register type and slightly different (and more accurate) classification of int vs. fp register accesses.	2013-10-16 10:44:12 -04:00
Andreas Sandberg	0438bf9389	stats: Update x86 stats after x87 fixes ... The updates to the x87 caused the stats for several regressions to change. This was mainly caused by the addition of a working 32-bit and 80-bit FP load instruction and xsave support.	2013-10-02 11:03:38 +02:00
Steve Reinhardt	fbc1feb39a	tests: update reference outputs ... Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.	2013-09-28 15:25:17 -04:00
Nilay Vaish	c2d799c6b0	x86: regressions: add switcher full test	2013-04-23 00:03:09 -05:00