cpu/base_cpu.cc:
cpu/base_cpu.hh:
Convert the CPU stuff to use a params struct
cpu/memtest/memtest.cc:
The memory tester is really not a cpu, so don't derive from
BaseCPU since it just makes things a pain in the butt. Keep
track of max loads in the memtest class now that the base class
doesn't do it for us.
Don't have any default parameters.
cpu/memtest/memtest.hh:
The memory tester is really not a cpu, so don't derive from
BaseCPU since it just makes things a pain in the butt. Keep
track of max loads in the memtest class now that the base class
doesn't do it for us.
cpu/simple_cpu/simple_cpu.cc:
Convert to use a params struct.
remove default parameters
cpu/simple_cpu/simple_cpu.hh:
convert to use a params struct
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
this isn't really a cpu. don't derive from BaseCPU
objects/MemTest.mpy:
we only need one max_loads parameter
sim/main.cc:
Don't check for the number of CPUs since we may be doing something
else going on. If we don't have anything to simulate, the
simulator will exit anyway.
--HG--
extra : convert_revision : 2195a34a9ec90b5414324054ceb3bab643540dd5
it makes more sense and is less confusing.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
width is a better name than multiplier
--HG--
extra : convert_revision : ea2fa4faa160f5657aece41df469bbc9f7244b21
output files and the output directory are are handled. Make
the output directory configuration via a command line parameter,
or an environment variable.
SConscript:
Add new output file stuff
base/misc.cc:
dev/simconsole.cc:
use new output file code
cpu/base_cpu.cc:
use new output file code to generate output streams
dev/etherdump.cc:
use the output file code to find the output directory
use a real stream instead of a pointer
dev/etherdump.hh:
use a real stream instead of a pointer
objects/Root.mpy:
output_dir and config_output_file are not longer configured here.
sim/main.cc:
- Completely rework the command line argument passing to deal with
changes in python and output files.
- Update help output to reflect changes.
- Remove all direct support for .ini files. They are strictly
for intermediate representation.
- Remove the --foo:bar=blah syntax for .ini files and add --foo.bar=blah
syntax for python. This will generate: foo.bar = 'blah' in the python
script.
- Add '-d' to set the output directory.
- Use new output file code to access the output stream.
sim/serialize.cc:
use the new code to find the output directory
sim/universe.cc:
Get rid of makeOutputStream. Use the new output file code.
Remove output_dir and config_output_file as parameters.
--HG--
extra : convert_revision : df2f0e13d401c3a60cae1239aa1ec3511721544d
Increase the default number of CSHR's, we should really fix this or make it a parameter
Use a setBlocked call to tell the bus it should block
New technique for sampling and switchover:
1) Sampler switchover event happens
2) All cpus in the current phase of sampling associated with this sampler are signaled to switchover
3) Each cpu drains it's pipe of things being executed (stops fetching and waits for empty pipe)
4) Once the pipe is empty the cpu calls back to the sampler to signal it has finished, and moves into the switchedout state (continues not to fetch)
5) The sampler collects all the signals, once all cpus are drained it calls the new cpu's in the next phase to takeover from the correct cpu
6) The statistics are reset and the next switchover time is calculated from this point
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
Reconfigure the way the sampling switchover works
cpu/pc_event.cc:
More debugging information on kernel panic's
kern/linux/linux_system.cc:
More debug info for Kernel Die events
kern/linux/linux_system.hh:
More debug info for kernel die events
--HG--
extra : convert_revision : 61cc42e43ba738705aa1f1d167b65d4d6dee51ae
address calculation and memory access portions separately.
Not currently used by any CPU models, but Kevin says he needs this.
Also clean up handling of execution tracing for memory accesses
(move it all into isa_desc and out of CPU models).
Got rid of some ancient unused code too.
arch/alpha/isa_desc:
Add execute() methods to EAComp and MemAcc portions of memory
access instructions, to allow CPU models to execute the effective
address calculation and memory access portions separately.
Requires the execution context to remember the effective address
across the two invocations. Added setEA() and getEA() methods to
execution context to support this. A model that does not use the
split execution model can panic if these methods are called.
Also added hook to call traceData->setAddr() after EA computation
on any load or store operation.
arch/isa_parser.py:
Call traceData->setData() on memory writes (stores).
cpu/simple_cpu/simple_cpu.cc:
Get rid of unused code.
cpu/simple_cpu/simple_cpu.hh:
Add (non-functional) setEA() and getEA() methods for new
split memory access execution support.
--HG--
extra : convert_revision : bc2d2c758c4ca753812b9fa81f21038e55929ff0
which is evaluated slightly differently than in previous versions of gcc.
arch/alpha/alpha_linux_process.cc:
Alphabetize includes.
arch/alpha/vptr.hh:
Change the constants that are being used for alpha pagebytes to come from the ISA.
base/random.hh:
cpu/static_inst.cc:
sim/param.cc:
Fix up template syntax.
base/range.hh:
Include iostream for << operator.
base/res_list.hh:
base/statistics.hh:
cpu/simple_cpu/simple_cpu.hh:
cpu/static_inst.hh:
sim/eventq.hh:
sim/param.hh:
Fixup for templated code to resolve different scope lookup in gcc 3.4. This defers the lookup of the
function/variable until actual instantiation time by making it dependent on the templated class/function.
base/trace.cc:
Fix call to new.
base/trace.hh:
Fix up #define to have full path.
cpu/base_cpu.cc:
Fix up call to new.
dev/etherlink.hh:
dev/ns_gige.hh:
dev/sinic.hh:
Fixup for friend class/function declaration. g++ 3.4 no longer allows typedefs to be declared as
a friend class.
dev/pcidev.hh:
Fix up re-definition of access level to params.
kern/linux/linux_syscalls.hh:
kern/tru64/tru64_syscalls.hh:
Fix up header. Fix up template syntax.
sim/serialize.cc:
Include errno.h.
sim/startup.cc:
Change startupq. queue was getting destructed before all things had called ~StartupCallback(), which lead
to a segfault. This puts startupq in global space, and we allocate it ourselves. Other code may be similar
to this and may need changing in the future.
sim/syscall_emul.hh:
Include cpu/exec_context.hh and sim/process.hh, as forward declarations are no longer sufficient.
sim/universe.cc:
Include errno.h
--HG--
extra : convert_revision : e49d08ee89eb06a28351f02bafc028ca6652d5af
No multiple requests to the same block outstanding from the same tester
Using false sharing, each tester only access a single byte within the block based on which tester it is
Allow more cycles before signalling deadlock, with do_events it may take some time with NACK/retry and many proccessors
--HG--
extra : convert_revision : 4c8eab99082c53840a5ad2a926457dfc27f23b77
Small fixes to read() in simpleCPU and small fixes to cache_impl.hh
and to simple_mem_bank to deal with writeInv from DMA
--HG--
extra : convert_revision : db24028c34b7a535aa0db55b43bad1d3d75cd258
Changed SimpleCPU to not due functional access until the cache returns
Updated config file to use a simple cpu for second cpu in dual mode.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
Update cache completion event to perform the functional read upon completion
--HG--
extra : convert_revision : 7a5b318d2040580fae92c165611425f513b14be9
every time the committed PC changes from one symbol scope
to another.
Set function_trace=y on target CPU to enable.
To defer start, use function_trace_start=<tick>
(in addition to setting function_trace=y).
cpu/base_cpu.cc:
cpu/base_cpu.hh:
Add simple function-tracing support.
cpu/simple_cpu/simple_cpu.cc:
Add function_trace, function_trace_start params
Call traceFunctions() on instruction completion
cpu/simple_cpu/simple_cpu.hh:
Add function_trace, function_trace_start params
--HG--
extra : convert_revision : 8a7f84028ccbaee585253629007f32fc8eae35e1
base/loader/symtab.cc:
base/loader/symtab.hh:
Get rid of old unused calls.
cpu/simple_cpu/simple_cpu.hh:
No need to include base/loader/symtab.hh
kern/linux/linux_system.cc:
kern/tru64/tru64_system.cc:
Include base/loader/symtab.hh (since it's no longer included in system.hh)
sim/system.hh:
Replace include of base/loader/symtab.hh with forward class decl.
--HG--
extra : convert_revision : 3a778c2f409ec94e3b00eaa9b3859943cb39918c
Simple text list of symbol (or address) and count
will be dumped to m5prof.<cpu-name> if the cpu's
pc_sample_interval param is set.
SConscript:
Add cpu/full_cpu/pc_sample_profile.cc
base/callback.hh:
Add a comment about MakeCallback.
Fix type in another comment.
base/loader/symtab.cc:
Revamp findNearestSymbol() to provide addresses of both
nearest symbols (preceding and following) as well as
string for former.
Move global definition of debugSymbolTable here too.
base/loader/symtab.hh:
Revamp findNearestSymbol() to provide addresses of both
nearest symbols (preceding and following) as well as
string for former.
Move global declaration of debugSymbolTable here too.
cpu/exetrace.cc:
Use new findNearestSymbol() interface for trace symbols.
kern/linux/linux_system.cc:
sim/system.cc:
Remove extern of debugSymbolTable (now in symtab.hh)
sim/process.cc:
Initialize debugSymbolTable if binary has a symbol table.
--HG--
extra : convert_revision : 0b5393dc39c40ac88c953684708f1125da550671
all macros in ev5.hh to inline functions or constant typed
variables and make them follow our style while we're at it.
All of the stuff in this file actually belongs in the ISA
traits code, but this is a first step at getting things done
in the right manner.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/ev5.cc:
arch/alpha/isa_desc:
dev/ns_gige.cc:
kern/tru64/tru64_events.cc:
deal with changes in ev5.hh
arch/alpha/ev5.hh:
Macros are nasty, so let's get rid of them. Convert all
all macros to inline functions or constant typed variables.
Make them follow our style while we're at it.
All of the stuff in this file actually belongs in the ISA
traits code, but this is a first step at getting things done
in the right manner.
arch/alpha/isa_traits.hh:
move some of the ev5 specific code into the isa
arch/alpha/vtophys.cc:
base/remote_gdb.cc:
deal with isa addition
cpu/exec_context.hh:
be less isa specific and use the isa traits to figure out
what we can.
dev/alpha_console.cc:
dev/pciconfigall.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
deal with changes in ev5.hh
I don't believe this masking is actually necessary. We should
look at removing it later.
dev/ide_ctrl.cc:
sort #includes
deal with changes in ev5.hh
--HG--
extra : convert_revision : c8a3adf0a4b1d198aefe38fc38b295abf289b08a
This added a snoopResponse callback to the caches, and a NACK to requests.
cpu/memtest/memtest.cc:
Modified to work with do_events:
No multiple requests to the same block outstanding at the same time from the same tester
Using false sharing, each tester does only 1 byte access using it's id as the blk offset
Allow for cycles before signaling deadlock, with do events it can take time to complete (NACK/blocked bus)
cpu/memtest/memtest.hh:
Updated to keep an id with each tester (used for address generation)
Updated to keep a list of outstanding address to prevent multiple outstanding per tester
//Should really look into doing store forwarding within the tester, then we can test more functionality
--HG--
extra : convert_revision : 05fbcf547e4ffab9d220aeb73126ed787ca82239
checkInterrupts variable and use that to determine whether an interrupt
can occur on a given cycle.
arch/alpha/ev5.cc:
XC -> CPU (and xc -> CPU) since we're really talking about a CPU here
Don't use the global check_interrupts variable. Add a per-cpu
checkInterrupts variable and use that to determine whether an interrupt
can occur on a given cycle.
--HG--
extra : convert_revision : be4c0247e5834005c60a45796a222cffd327b64e
cpu/trace/opt_cpu.cc:
cpu/trace/trace_cpu.cc:
we don't want to register this cpu since it's not a real cpu
--HG--
extra : convert_revision : 3b87b6ac3dd061018909bf4fdb4e2d611128d07b
the registration stuff all moves into BaseCPU
cpu/base_cpu.cc:
Move the registration stuff into the BaseCPU since all
other CPUs use it.
cpu/base_cpu.hh:
Move the defer registration stuff into the BaseCPU since all
other CPUs use it.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
registration stuff moved to base class
sim/system.cc:
the activation of exec contexts should happen at startup, not
when they are registered.
sim/system.hh:
the system now has a startup function
--HG--
extra : convert_revision : bb6a7c2da5a1ecf5fe7ede1078200bfe5245f8ef
arch/alpha/isa_traits.hh:
Move defines to non full system code section so they can
be used elsewhere
cpu/simple_cpu/simple_cpu.cc:
Don't use magic numbers
cpu/simple_cpu/simple_cpu.hh:
simple format nit
--HG--
extra : convert_revision : b8d492218340d41ab9420c6ad1e81a197db1c132
cpu/simple_cpu/simple_cpu.cc:
Send Copy
cpu/trace/opt_cpu.cc:
Calculate the block size correctly. Set lookupTable value directly, since the old way only worked for FA caches.
cpu/trace/trace_cpu.cc:
Don't start events if the hierarchy is in non-event mode.
--HG--
extra : convert_revision : daf2db5ed7428c2fb08652cf76f6fe99d8357db5
cpu/trace/opt_cpu.cc:
Change printout to look more like real stats, should really just make these stats someday.
--HG--
extra : convert_revision : cd5db4657a53abeda0417ca6ba4407d366408358
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
Add the ability to simulate less than fully-associative opt caches.
cpu/trace/reader/itx_reader.cc:
Add writeback to the command list.
--HG--
extra : convert_revision : a9c9c4be3358f4083d7e85772620441a3ad809db
arch/alpha/isa_desc:
whitespace fix.
cpu/simple_cpu/simple_cpu.cc:
Add support to make sure we don't get alignment faults in copies. Warn if we go over an 8k page boundary.
--HG--
extra : convert_revision : 98b38da86a66215d80ea9eb6e6f1f68ee573cb57
always build with dynamic libraries for mysqlclient
SConscript:
always use dynamic library now
cpu/pc_event.hh:
cleared lower 2 bits, since everything must be 4byte aligned
--HG--
extra : convert_revision : 332ecd25a598e6a46a79bd653449aa7eb22a580a
cpu/pc_event.cc:
mask off lower three bits so we can have an event in palcode
--HG--
extra : convert_revision : 49fcdc5c359ca2bd9149f092f80f77abcd7b20ee
arch/alpha/ev5.cc:
set the mode explictly rather than having a bool user/notuser
cpu/simple_cpu/simple_cpu.hh:
there is no class Kernel
kern/kernel_stats.cc:
use cpu_mode_num
kern/kernel_stats.hh:
add interrupt mode and use cpu_mode_num rather than constant
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/system_events.cc:
kern/system_events.hh:
add events to change the mode to/from interrupt
sim/system.cc:
sim/system.hh:
add a pal symbol table
--HG--
extra : convert_revision : 9d30e826b72122062a5ea12d094f94760e75c66a
SConscript:
Add build support for ITX trace writer
cpu/trace/reader/itx_reader.cc:
Handle full 36 bit physical addressses.
cpu/trace/reader/itx_reader.hh:
Need a string header file here
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
Modify trace CPU to take a single trace and drive an instruction and data interfaces.
--HG--
extra : convert_revision : 4c81f2f9d9341df41f0ae45e4bda49800a43977c
single place so it's easier to work with.
- Add support for binning kernel/user/idle time separately from
lisa's binning stuff, but make the two compatible.
- KernelStats used to directly implement the pImpl idiom, but
it makes more sense to just remove the level of indirection and
make the exec context have a pointer to the stats.
- Factor common code out of LinuxSystem and Tru64System and put
it into the System base class. While doing that, make all
constructors take a pointer to a parameter struct instead of
naming the parameters individually to make it much easier to add
parameters to these classes.
SConscript:
Move the function tracking and binning stuff around.
arch/alpha/ev5.cc:
kernelStats is now a pointer
arch/alpha/pseudo_inst.cc:
kernelStats is now a pointer
the parameters to the system have been moved into their own
struct
base/trace.hh:
provide a little functor class for wrapping a string that
can allow you to define name() in any scope very simply
for use with DPRINTF
cpu/base_cpu.cc:
New order of arguments for consistency.
cpu/exec_context.cc:
kernelStats no longer has the level of indirection in it,
execContext has the indirection now. so, kernelStats is a pointer.
We also need a pointer to the kernelBinning stuff from the system
and we need to figure out if we want to do binning or not.
Move a whole bunch of code into kern_binning.cc so it's all
in the same place.
cpu/exec_context.hh:
We want pointers to the kernel binning/stats stuff and we'll
have the exec_context and system have the level of indirection
instead of having the extra layer in the kernel stats class.
cpu/simple_cpu/simple_cpu.cc:
call through the exec context to do the special binning
stuff.
kern/kernel_stats.cc:
kern/kernel_stats.hh:
Re-organize the stats stuff and remove the level of indirection
(that was there to simplify building) and move the binning stuff
into its own class/file.
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/system.cc:
sim/system.hh:
move lots of common system code into the base system class so
that it can be shared between linux, tru64, and whatever else
we decide to support in the future.
Make the constructor take a pointer to a parameter struct so that
it is easier to pass parameters to the parent.
kern/system_events.cc:
move the majority of the binning code into the Kernel::Binning class
in the kern_binning file
kern/system_events.hh:
FnEvents only need to know the bin
create the Idle start event to find the PCBB of the idle
process when it starts.
kern/tru64/tru64_events.cc:
memCtrl -> memctrl
sim/process.cc:
sim/process.hh:
re-order args for consistency
--HG--
extra : convert_revision : 86cb39738c41fcd680f2aad125c9dde000227b2b
Put correct date in copyright headers based on bk changesets
LICENSE:
Updated copyright on license file
README:
Updaded readme to reflect shift to scons and linux support
cpu/trace/reader/ibm_reader.cc:
cpu/trace/reader/ibm_reader.hh:
cpu/trace/reader/itx_reader.cc:
cpu/trace/reader/itx_reader.hh:
cpu/trace/reader/m5_reader.cc:
cpu/trace/reader/m5_reader.hh:
cpu/trace/reader/mem_trace_reader.cc:
cpu/trace/reader/mem_trace_reader.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
updated copyright (only changeset in 2004)
kern/kernel_stats.cc:
kern/kernel_stats.hh:
updated copyright
--HG--
extra : convert_revision : 726aed4b38ff4d230c63a570df83c63075b3c76f
arch/alpha/ev5.cc:
cpu/simple_cpu/simple_cpu.cc:
update for new event interface
base/stats/events.cc:
implement the ignore event function which matches sim objects from which
to ignore events.
Make insert event like insert data and make it able to insert many
events in a single transaction with the database.
base/stats/events.hh:
Make it possible to ignore events
sim/sim_object.cc:
make recordEvent a member function of SimObject to implement
the ignore function easily
sim/sim_object.hh:
implement the ignore event stuff in the sim object. This is a
bit of a hack, but an easy place to put it.
--HG--
extra : convert_revision : ba3f25a14ad03662c53fb35514860d69be8cd4f0
