Commit graph

292 commits

Author SHA1 Message Date
Gabe Black
3f7979c99d Made Addr a global type
--HG--
extra : convert_revision : 869bd9fa5d8591115ac9b4a7401eb2490986b835
2006-02-21 03:38:21 -05:00
Ron Dreslinski
3391354285 Make loaders use translation port instead of proxy memory.
Also start compiling Simple CPU again.

SConscript:
    Start Compiling Simple CPU as well
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.hh:
sim/process.cc:
sim/process.hh:
    Convert loaders to used translation port instead of proxy memory

--HG--
extra : convert_revision : 63275071f6a0e0d71935641205b203d94381ee44
2006-02-20 23:56:10 -05:00
Ron Dreslinski
d96de69abc Add in a new translating port that allows syscalls to translate addresses via the page table before accessing the memory port.
Other compile issues cleaned up.

SConscript:
    Changes to compile the new Translating Port.
    Split out memtester and eio support, will rework them back in after first getting a simpleCPU to work
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    Changes to use the new translating Port.
cpu/exec_context.cc:
cpu/exec_context.hh:
    Create a translating port in each execution context.
sim/process.cc:
    Fix the way we do proxy memory

--HG--
extra : convert_revision : 3d33218fe8b425a5d9ce24757f1112b4aa6001fd
2006-02-20 23:26:39 -05:00
Gabe Black
f721a4d9ad Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into  zizzer.eecs.umich.edu:/z/m5/Bitkeeper/multiarch

arch/alpha/faults.hh:
    ur
    Using cleaned up fault class deiffinitions

--HG--
extra : convert_revision : a600950d539be2be73358f072aa5426456bf3d2d
2006-02-19 03:20:05 -05:00
Gabe Black
463aa6d49d Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths.
arch/alpha/alpha_linux_process.cc:
    Added using directive for AlphaISA namespace
arch/alpha/alpha_memory.hh:
arch/alpha/isa/branch.isa:
cpu/pc_event.hh:
    Added typedefs for Addr
arch/alpha/alpha_tru64_process.cc:
arch/alpha/arguments.cc:
    Added using directive for AlphaISA
arch/alpha/ev5.hh:
    Added an include of arch/alpha/isa_traits.hh, and a using directive for the AlphaISA namespace.
arch/alpha/faults.hh:
    Added a typedef for the Addr type, and changed the formatting of the faults slightly.
arch/alpha/isa/main.isa:
    Untemplatized StaticInst, added a using for namespace AlphaISA to show up in decoder.cc and the exec.ccs, relocated makeNop to decoder.hh
arch/alpha/isa/mem.isa:
    Untemplatized StaticInst and StaticInstPtr
arch/alpha/isa/pal.isa:
cpu/base_dyn_inst.cc:
    Untemplatized StaticInstPtr
arch/alpha/isa_traits.hh:
    Changed variables to be externs instead of static since they are part of a namespace and not a class.
arch/alpha/stacktrace.cc:
    Untemplatized StaticInstPtr, and added a using directive for AlphaISA.
arch/alpha/stacktrace.hh:
    Added some typedefs for Addr and MachInst, and untemplatized StaticInstPtr
arch/alpha/vtophys.cc:
    Added a using directive for AlphaISA
arch/alpha/vtophys.hh:
    Added the AlphaISA namespace specifier where needed
arch/isa_parser.py:
    Changed the placement of the definition of the decodeInst function to be outside the namespaceInst namespace.
base/loader/object_file.hh:
cpu/o3/bpred_unit.hh:
    Added a typedef for Addr
base/loader/symtab.hh:
    Added a typedef for Addr, and added a TheISA to Addr in another typedef
base/remote_gdb.cc:
    Added a using namespace TheISA, and untemplatized StaticInstPtr
base/remote_gdb.hh:
    Added typedefs for Addr and MachInst
cpu/base.cc:
    Added TheISA specifier to some variables exported from the isa.
cpu/base.hh:
    Added a typedef for Addr, and TheISA to some variables from the ISA
cpu/base_dyn_inst.hh:
    Untemplatized StaticInstPtr, and added TheISA specifier to some variables from the ISA.
cpu/exec_context.hh:
    Added some typedefs for types from the isa, and added TheISA specifier to some variables from the isa
cpu/exetrace.hh:
    Added typedefs for some types from the ISA, and untemplatized StaticInstPtr
cpu/memtest/memtest.cc:
cpu/o3/btb.cc:
dev/baddev.cc:
dev/ide_ctrl.cc:
dev/ide_disk.cc:
dev/isa_fake.cc:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/platform.cc:
dev/sinic.cc:
dev/uart8250.cc:
kern/freebsd/freebsd_system.cc:
kern/linux/linux_system.cc:
kern/system_events.cc:
kern/tru64/dump_mbuf.cc:
kern/tru64/tru64_events.cc:
sim/process.cc:
sim/pseudo_inst.cc:
sim/system.cc:
    Added using namespace TheISA
cpu/memtest/memtest.hh:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/itx_reader.hh:
dev/ide_disk.hh:
dev/pcidev.hh:
dev/platform.hh:
dev/tsunami.hh:
sim/system.hh:
sim/vptr.hh:
    Added typedef for Addr
cpu/o3/2bit_local_pred.hh:
    Changed the include to use arch/isa_traits.hh instead of arch/alpha/isa_traits.hh. Added typedef for Addr
cpu/o3/alpha_cpu.hh:
    Added typedefs for Addr and IntReg
cpu/o3/alpha_cpu_impl.hh:
    Added this-> to setNextPC to fix a problem since it didn't depend on template parameters any more. Removed "typename" where it was no longer needed.
cpu/o3/alpha_dyn_inst.hh:
    Cleaned up some typedefs, and untemplatized StaticInst
cpu/o3/alpha_dyn_inst_impl.hh:
    untemplatized StaticInstPtr
cpu/o3/alpha_impl.hh:
    Fixed up a typedef of MachInst
cpu/o3/bpred_unit_impl.hh:
    Added a using TheISA::MachInst to a function
cpu/o3/btb.hh:
    Changed an include from arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef for Addr
cpu/o3/commit.hh:
    Removed a typedef of Impl::ISA as ISA, since TheISA takes care of this now.
cpu/o3/cpu.cc:
    Cleaned up namespace issues
cpu/o3/cpu.hh:
    Cleaned up namespace usage
cpu/o3/decode.hh:
    Removed typedef of ISA, and changed it to TheISA
cpu/o3/fetch.hh:
    Fized up typedefs, and changed ISA to TheISA
cpu/o3/free_list.hh:
    Changed include of arch/alpha/isa_traits.hh to arch/isa_traits.hh
cpu/o3/iew.hh:
    Removed typedef of ISA
cpu/o3/iew_impl.hh:
    Added TheISA namespace specifier to MachInst
cpu/o3/ras.hh:
    Changed include from arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef for Addr.
cpu/o3/regfile.hh:
    Changed ISA to TheISA, and added some typedefs for Addr, IntReg, FloatReg, and MiscRegFile
cpu/o3/rename.hh:
    Changed ISA to TheISA, and added a typedef for RegIndex
cpu/o3/rename_map.hh:
    Added an include for arch/isa_traits.hh, and a typedef for RegIndex
cpu/o3/rob.hh:
    Added a typedef for RegIndex
cpu/o3/store_set.hh:
cpu/o3/tournament_pred.hh:
    Changed an include of arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef of Addr
cpu/ozone/cpu.hh:
    Changed ISA into TheISA, and untemplatized StaticInst
cpu/pc_event.cc:
    Added namespace specifier TheISA to Addr types
cpu/profile.hh:
kern/kernel_stats.hh:
    Added typedef for Addr, and untemplatized StaticInstPtr
cpu/simple/cpu.cc:
    Changed using directive from LittleEndianGuest to AlphaISA, which will contain both namespaces. Added TheISA where needed, and untemplatized StaticInst
cpu/simple/cpu.hh:
    Added a typedef for MachInst, and untemplatized StaticInst
cpu/static_inst.cc:
    Untemplatized StaticInst
cpu/static_inst.hh:
    Untemplatized StaticInst by using the TheISA namespace
dev/alpha_console.cc:
    Added using namespace AlphaISA
dev/simple_disk.hh:
    Added typedef for Addr and fixed up some formatting
dev/sinicreg.hh:
    Added TheISA namespace specifier where needed
dev/tsunami.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
    Added using namespace TheISA. It might be better for it to be AlphaISA
dev/tsunami_cchip.cc:
    Added typedef for TheISA. It might be better for it to be AlphaISA
kern/linux/aligned.hh:
sim/pseudo_inst.hh:
    Added TheISA namespace specifier to Addr
kern/linux/linux_threadinfo.hh:
    Added typedef for Addr, and TheISA namespace specifier to StackPointerReg
kern/tru64/mbuf.hh:
    Added TheISA to Addr type in structs
sim/process.hh:
    Added typedefs of Addr, RegFile, and MachInst
sim/syscall_emul.cc:
    Added using namespace TheISA, and a cast of VMPageSize to the int type
sim/syscall_emul.hh:
    Added typecast for Addr, and TheISA namespace specifier for where needed

--HG--
extra : convert_revision : 91d4f6ca33a73b21c1f1771d74bfdea3b80eff45
2006-02-19 02:34:37 -05:00
Ali Saidi
14f2cdb1a1 Merge zizzer:/bk/m5
into  pb15.local:/Users/ali/work/m5.head

--HG--
extra : convert_revision : 774e4afbb0f9c3ae62843138b6d7195ea184ff92
2006-02-19 00:47:45 -05:00
Ali Saidi
53d2c9398e Move Linux/Tru64 architecture independent code into kern/*
leaving dependent code making way  for solaris linux syscall emu.

SConscript:
    Add two new files for syscall emulation
    Add getDesc() function
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
    move architecture independent code into kern/linux/linux.(hh|cc)
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_tru64_process.hh:
    Add getDesc function
kern/linux/linux.hh:
    move generi linux syscall emulation code into kern/linux
kern/tru64/tru64.hh:
    move generi tru64 syscall emulation code into kern/tru64
sim/process.cc:
sim/process.hh:
    Push the function determination and calling stuff down to LiveProcess
    and out of the Linux/Tru64 classes respectively
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    fnctl implementation was identical in tru64 and linux so moved to generic

--HG--
extra : convert_revision : 103293dbe6fe2f7892de4929d17dc085def77026
2006-02-18 23:44:22 -05:00
Kevin Lim
d6a330ebb9 Remove fake fault.
Switch fault pointers to const pointers to prevent them from accidentally being changed.
Fix some coding style.

arch/alpha/ev5.cc:
cpu/o3/commit_impl.hh:
kern/kernel_stats.hh:
    Remove fake fault.
arch/alpha/faults.cc:
    Remove fake fault, fix to have normal m5 line length limit, and change pointers to be const pointers so that the default faults aren't changed accidentally.
arch/alpha/faults.hh:
    Fix to have normal m5 line length limit, change pointers to const pointers.
sim/faults.cc:
sim/faults.hh:
    Remove fake fault, change pointers to const pointers.

--HG--
extra : convert_revision : 01d4600e0d4bdc1d177b32edebc78f86a1bbfe2e
2006-02-16 14:55:15 -05:00
Gabe Black
b161d2a731 Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into  ewok.(none):/home/gblack/m5/multiarch

--HG--
extra : convert_revision : d8626acb2686e123ad0bb6cf94e85c992657470d
2006-02-16 01:25:48 -05:00
Gabe Black
10c79efe55 Changed the fault enum into a class, and fixed everything up to work with it. Next, the faults need to be pulled out of all the other code so that they are only used to communicate between the CPU and the ISA.
SConscript:
    The new faults.cc file in sim allocates the system wide faults. When these faults are generated through a function interface in the ISA, this file may go away.
arch/alpha/alpha_memory.cc:
    Changed Fault to Fault * and took the underscores out of fault names.
arch/alpha/alpha_memory.hh:
    Changed Fault to Fault *. Also, added an include for the alpha faults.
arch/alpha/ev5.cc:
    Changed the fault_addr array into a fault_addr function. Once all of the faults can be expected to have the same type, fault_addr can go away completely and the info it provided will come from the fault itself. Also, Fault was changed to Fault *, and underscores were taken out of fault names.
arch/alpha/isa/decoder.isa:
    Changed Fault to Fault * and took the underscores out fault names.
arch/alpha/isa/fp.isa:
    Changed Fault to Fault *, and took the underscores out of fault names.
arch/alpha/isa/main.isa:
    Changed Fault to Fault *, removed underscores from fault names, and made an include of the alpha faults show up in all the generated files.
arch/alpha/isa/mem.isa:
    Changed Fault to Fault * and removed underscores from fault names.
arch/alpha/isa/unimp.isa:
arch/alpha/isa/unknown.isa:
cpu/exec_context.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
dev/alpha_console.cc:
dev/ide_ctrl.cc:
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
    Changed Fault to Fault *, and removed underscores from fault names.
arch/alpha/isa_traits.hh:
    Changed the include of arch/alpha/faults.hh to sim/faults.hh, since the alpha faults weren't needed.
cpu/base_dyn_inst.cc:
    Changed Fault to Fault *, and removed underscores from fault names. This file probably shouldn't use the Unimplemented Opcode fault.
cpu/base_dyn_inst.hh:
    Changed Fault to Fault * and took the underscores out of the fault names.
cpu/exec_context.cc:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/fetch.hh:
dev/alpha_console.hh:
dev/baddev.hh:
dev/ide_ctrl.hh:
dev/isa_fake.hh:
dev/ns_gige.hh:
dev/pciconfigall.hh:
dev/sinic.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
dev/uart.hh:
dev/uart8250.hh:
    Changed Fault to Fault *.
cpu/o3/alpha_cpu.hh:
    Changed Fault to Fault *, removed underscores from fault names.
cpu/o3/alpha_cpu_impl.hh:
    Changed Fault to Fault *, removed underscores from fault names, and changed the fault_addr array to the fault_addr function. Once all faults are from the ISA, this function will probably go away.
cpu/o3/commit_impl.hh:
cpu/o3/fetch_impl.hh:
dev/baddev.cc:
    Changed Fault to Fault *, and removed underscores from the fault names.
cpu/o3/regfile.hh:
    Added an include for the alpha specific faults which will hopefully go away once the ipr stuff is moved, changed Fault to Fault *, and removed the underscores from fault names.
cpu/simple/cpu.hh:
    Changed Fault to Fault *
dev/ns_gige.cc:
    Changed Fault to Fault *, and removdd underscores from fault names.
dev/sinic.cc:
    Changed Fault to Fault *, and removed the underscores from fault names.
dev/uart8250.cc:
    Chanted Fault to Fault *, and removed underscores from fault names.
kern/kernel_stats.cc:
    Removed underscores from fault names, and from NumFaults.
kern/kernel_stats.hh:
    Changed the predeclaration of Fault from an enum to a class, and changd the "fault" function to work with the classes instead of the enum. Once there are no system wide faults anymore, this code will simplify back to something like it was originally.
sim/faults.cc:
    This allocates the system wide faults.
sim/faults.hh:
    This declares the system wide faults.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    Removed the underscores from fault names.

--HG--
rename : arch/alpha/faults.cc => sim/faults.cc
rename : arch/alpha/faults.hh => sim/faults.hh
extra : convert_revision : 253d39258237333ae8ec4d8047367cb3ea68569d
2006-02-16 01:22:51 -05:00
Ron Dreslinski
d142788172 More compilation fixes.
Should we add a proxy_port that does the v->p address translation?
Should the proxy port return a fault on translation errors, if we add one?

arch/alpha/alpha_linux_process.cc:
    Syscalls use a memPort through the CPU now instead of a xc functional memory.
cpu/base.hh:
    Add a pointer to the memPort syscalls will use.  Should this be a proxy_port that does address translation?
cpu/exec_context.cc:
cpu/exec_context.hh:
    Remove functional memory from the exec context
cpu/simple/cpu.cc:
    Set the memPort to be used as the syscall port as the dcache port
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    Syscalls use a memPort through the CPU now instead of a xc functional memory.
    Also, fix the fact that readStringFunctional doesn't return a fault... should proxy_port handle this because it is doing the translation?

--HG--
extra : convert_revision : 1f65318c6594301a75dc4dc0c99fdd436b094a7f
2006-02-15 22:05:23 -05:00
Steve Reinhardt
b8a2d1e5c7 More progress toward compiling... partly by
fixing things, partly by ignoring CPU models
that don't currently compile.

SConscript:
    Split sources for fast, simple, and o3 CPU models into
    separate source lists.  For now none of these are included
    in the base source list, so you won't get any CPU models
    at all... but we still can't compile the other stuff so
    it's not an issue.

    Also get rid of obsolete encumbered/mem file.
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.hh:
cpu/exec_context.cc:
sim/process.cc:
sim/system.cc:
sim/system.hh:
    FunctionalMemory -> Memory
cpu/pc_event.hh:
    Get rid of unused badpc.
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    Move Port functions into .cc file.
mem/port.hh:
    Make recvAddressRangesQuery panic by default instead
    of being abstract... do CPUs need to implement this?
mem/request.hh:
    Add prefetch flags.
sim/syscall_emul.hh:
    Start to fix...

--HG--
extra : convert_revision : ece53b3855f20916caaa381598ac37e8c7adfba7
2006-02-15 17:52:49 -05:00
Ron Dreslinski
90def9ea9e Changes to start making the tree use the new memory system. Trying to compile decoder.cc but fails still.
SConscript:
    Place the memory objects back in the right place
arch/alpha/isa_desc:
    Fix includes to point to the new memory requests
cpu/exec_context.hh:
    Exec context now points to memory object, fix the include paths.
    Convert to prot_read/prot_write functions instead of read and write.
    Convert to new CpuRequestPtr instead of MemReqPtr.
mem/request.hh:
    Add back in support for Request Flags (needed by decoder to tag request) Removed the flags that were associated with packets/coherence.
sim/process.hh:
    Converted to point to new memory objects

--HG--
extra : convert_revision : a0b95380915d63b53194e2a26336d6adb1a0086b
2006-02-15 14:53:02 -05:00
Ali Saidi
7b42d61f13 Merge zizzer:/bk/m5
into  pb15.local:/Users/ali/work/m5.head

sim/byteswap.hh:
    SCCS merged

--HG--
extra : convert_revision : 65989fef265ddfafb59a6c96e3cdde76eb3e071d
2006-02-15 01:27:06 -05:00
Ali Saidi
18a0fa3e0c endian fixes and compiles on mac os x
arch/alpha/alpha_linux_process.cc:
    add endian conversions for fstat functions
arch/alpha/alpha_tru64_process.cc:
    add endian conversions for various functions
sim/byteswap.hh:
    for some reason gcc on macos really wants long and unsigned long
    Why int32_t and uint32_t isn't sufficient I don't know.
sim/process.cc:
sim/syscall_emul.hh:
    endian fixes

--HG--
extra : convert_revision : ce625d5660b70867c43c74fbed856149c0d8cd36
2006-02-15 01:23:13 -05:00
Gabe Black
19e5efed03 Pseudo instructions are now passed whatever instructions they need by the decoder, rather than extracting them explicitly. This lets most of the pseudo instruction code to be shared across architectures.
SConscript:
    Moved pseudo_inst.hh from targetarch to full system sources
arch/alpha/SConscript:
    Moved pseudo_inst.cc out of the alpha specific sources
arch/alpha/isa/decoder.isa:
    The decoder now pulls out the arguments for the pseudo instructions based on the alpha ABI
arch/alpha/isa/main.isa:
    Registers 16, 17 and 18 are used to get parameters for the pseudo instructions and can be referred to explicitly
sim/pseudo_inst.cc:
    Changed some include paths to reflect that pseudo_inst.hh is now outside of the alpha directory. Also, instead of extracting their parameters directly, they're passed in as regular function arguments.
sim/pseudo_inst.hh:
    Changed the function prototypes to include the functions parameters, now that they aren't extracted from the execution context.

--HG--
rename : arch/alpha/pseudo_inst.cc => sim/pseudo_inst.cc
rename : arch/alpha/pseudo_inst.hh => sim/pseudo_inst.hh
extra : convert_revision : 76ce768cf1d8a838aa7b64878a7ab4c4215ac999
2006-02-12 17:38:10 -05:00
Gabe Black
2c5e03550a Removed isa_traits.hh from targetarch, moved vptr.hh from arch/alpha to sim, fixed an include to have the new location, and removed an ambiguating function declaration in byteswap.hh.
SConscript:
    Moved isa_fullsys_traits.hh out of targetarch, since the only place it's included, and the only place the comments in the file say it should be included, is in the alpha isa_traits.hh
    targetarch/isa_traits.hh is now included through arch/isa_traits.hh
    vptr.hh was removed from targetarch, and moved to sim
arch/alpha/pseudo_inst.cc:
    Moved vptr.hh from targetarch to sim
base/loader/object_file.hh:
base/loader/symtab.hh:
cpu/base.hh:
dev/ide_disk.cc:
    Changed the include of isa_traits.hh from targetarch to arch
cpu/static_inst.hh:
dev/platform.hh:
dev/simple_disk.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/mbuf.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/process.hh:
sim/syscall_emul.hh:
    Changed the include of isa_traits.hh from targetarch to arch.
kern/linux/linux_threadinfo.hh:
    Changed the include of vptr.hh from targetarch to sim.
sim/byteswap.hh:
    Removed the line declaring swap_byte(long), since it ambiguates with swap_byte(int32_t)
sim/vptr.hh:
    Fixed the assert in the equals operator.
    Changed the AlphaISA namespace reference to TheISA.
    Changed arch/alpha/vtophys.hh to targetarch/vtophys.hh, since this file is now for all architectures.
    Added an include of arch/isa_traits.hh so that TheISA would be defined.

--HG--
extra : convert_revision : e3c6ac17ed0277cfeba1d35cd63eba66eba5996f
2006-02-12 12:40:58 -05:00
Gabe Black
4d4c105ac5 Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into  ewok.(none):/home/gblack/m5/multiarch

--HG--
extra : convert_revision : baf9b0eb84df7da8152ddf9a25264e041a24b8ca
2006-02-12 12:17:51 -05:00
Gabe Black
47a065d9f0 vptr.hh:
Rename: arch/alpha/vptr.hh -> sim/vptr.hh

--HG--
rename : arch/alpha/vptr.hh => sim/vptr.hh
extra : convert_revision : 345745efec49f6169d1d9f61fd590240a995373b
2006-02-12 12:14:14 -05:00
Ali Saidi
96d6ac441c hello world works on a BE host for a LE guest
arch/alpha/alpha_linux_process.cc:
    Add endian conversions to fstat
sim/byteswap.hh:
    for some reason I don't understand g++ really wanted a long version defined
    even though int32_t should be the same.

--HG--
extra : convert_revision : 5bfe9d3f0b31824fa5a7ae3f51fd0be5ed4d555d
2006-02-11 00:55:36 -05:00
Ali Saidi
ac6240896e confused an ifdef with an if
--HG--
extra : convert_revision : 5b8e8bdff5813cf8846e66de2652246d77c97e88
2006-02-10 14:59:37 -05:00
Ali Saidi
fb7899aa68 fix problems on darwin/*BSD for syscall emulation mode
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
    fixup for bsd hosts. Some headers are included by default which means that
    more variables need TGT_ prefixes and there isn't a stat call (everything
    is a stat64 call) so we have to work around that a bit
base/intmath.hh:
base/socket.cc:
    this is no longer needed with mac os 10.4
cpu/inst_seq.hh:
    just use a uint64_t instead of long long
cpu/o3/inst_queue_impl.hh:
    I much cleaner way to get max int
sim/syscall_emul.hh:
    fix stat64 problems on *BSD

--HG--
extra : convert_revision : 9eef5f896e083ae1774e818a9765dd83e0305942
2006-02-10 14:21:32 -05:00
Gabe Black
82f2ae56ed Alot of changes to push towards ISA independence. Highlights are renaming of the isa_desc files, movement of byte_swap.hh into sim, and the creation of arch/isa_traits.hh
SConscript:
    Moved some files out of targetarch. The either no longer need to be there, never needed to be there, or should be referred to directly in arch/alpha due to there strictly alpha content.
arch/alpha/isa_traits.hh:
    Added alpha's endianness to it's isa_traits.hh
arch/mips/isa_traits.hh:
    Added MIPS endianness to it's isa_traits.hh
arch/sparc/isa_traits.hh:
    Added SPARCs endianess to it's isa_traits.hh
build/SConstruct:
    Added MIPS as a valid architecture
cpu/exec_context.hh:
    Included arch/isa_traits.hh to bring in the endianness of the system.
cpu/o3/alpha_cpu.hh:
    Included arch/isa_traits.hh to bring in the systems endianness, and removed the hardcoding of little endianness
cpu/o3/fetch_impl.hh:
kern/freebsd/freebsd_system.cc:
    Included arch/isa_traits.hh to bring in the systems endianness, and removed the hardcoding to little endianness.
sim/system.cc:
    Included arch/isa_traits.hh to bring in the systems endianness, and removed the hardcoding to little endian.

--HG--
extra : convert_revision : b1ab34b7569db531cd1c74f273b24222e63f9007
2006-02-08 01:03:55 -05:00
Gabe Black
2939a7089a byte_swap.hh was removed from arch/alpha/, and replaced by sim/byteswap.hh. The new file uses LittleEndianGuest and BigEndianGuest namespaces to allow selecting the appropriate functions.
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
    Added the endianness namespace. This may change.
cpu/exec_context.hh:
    Changed the include path for byteswap, and forced LittleEndianness for lack of a better solution.
cpu/o3/alpha_cpu.hh:
    Forced LittleEndianness, for lack of a better solution.
cpu/o3/alpha_cpu_impl.hh:
    Cleared away some commented out code.
cpu/o3/fetch_impl.hh:
    Changed the include patch for byteswap, and forced LittleEndianness for lack of a better solution.
cpu/simple/cpu.cc:
    Added an include for byteswap.hh, and fixed the SimpleCPU to LittleEndian. This cpu only does alpha, so that's fine.
dev/disk_image.cc:
    Changed the include path of byteswap.hh
kern/freebsd/freebsd_system.cc:
kern/linux/linux_system.cc:
    Added an include for byteswap.hh, and forced LittleEndianness for lack of a better solution.
sim/system.cc:
    Forced LittleEndianness for lack of a better solution.

--HG--
extra : convert_revision : b95d3e1265a825e04bd77622a3ac09fbac6bd206
2006-02-03 00:16:44 -05:00
Steve Reinhardt
03a2aca9a9 Changes for Process object initialization in merged-memory environment.
System object now exists for both fullsys and syscall emulation, as the
latter needs it so that Process objects can find the shared PhysicalMemory
for initialization.
Changes are incomplete: still need to fix up Process (& EioProcess) memory
initialization and syscall emulation code for new mem interface.

arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
cpu/base.cc:
cpu/base.hh:
    Take System argument in constructor.
cpu/exec_context.cc:
    Take System argument in constructor.
    Merge two constructors into a single one.
cpu/exec_context.hh:
    Take System argument in constructor.
    Merge two constructors into a single one.
    Replace dummy translation with lookup in Process object's page table.
python/m5/objects/Process.py:
    Add System parameter to Process object (& subobjects).
python/m5/objects/System.py:
    Segregate full-system only Process parameters (most of them!).
sim/process.cc:
    Take System argument in constructor.
    Move initialization to startup() callback to occur after system & cpus
    are initialized.
    Generate ProxyMemory object to pass to loader for transparent
    virtual page allocation.
sim/process.hh:
    Take System argument in constructor.
    Move initialization to startup() callback to occur after system & cpus
    are initialized.
sim/system.cc:
sim/system.hh:
    Enable System object for non-full-system too.
    Basically involved putting most of the existing code
    inside '#ifdef FULL_SYSTEM'.
    Key thing needed for syscall emulation at this point is
    the PhysicalMemory object (for Process initialization).

--HG--
extra : convert_revision : f0f34b47bd4f77b502191affd3d03b4d6d9bcdd8
2006-01-28 00:08:22 -05:00
Steve Reinhardt
16bda9c03e Fix roundUp function template so explicit arg is not
needed in a few more cases.

base/intmath.hh:
    align arg to roundUp should be int, not template class
sim/process.cc:
sim/syscall_emul.hh:
    No need for explicit template arg now that roundUp is fixed.

--HG--
extra : convert_revision : f9f4639e022acb9f427e8d30d81c782504437c53
2005-12-23 13:50:35 -05:00
Steve Reinhardt
0cdcb08d90 Change base/intmath.{cc,hh} to follow m5 style.
arch/alpha/alpha_tru64_process.cc:
base/intmath.hh:
base/statistics.cc:
base/str.cc:
cpu/o3/btb.cc:
sim/process.cc:
sim/syscall_emul.hh:
    Rename intmath.hh functions to follow m5 style
    (RoundUp -> roundUp, etc.).
base/intmath.cc:
    Rename intmath.hh functions to follow m5 style
    (RoundUp -> roundUp, etc.).
    Also reindent code in m5 style.

--HG--
extra : convert_revision : 57b853002bc3c9911e122599d9062b41a06d8e6a
2005-12-23 13:32:31 -05:00
Nathan Binkert
108cfe53d6 Make the debugger a bit more useful with m5.opt by moving stuff
from #ifdef DEBUG to #ifndef NDEBUG

base/remote_gdb.cc:
    make the remote debugger gdb stuff work in m5.opt
sim/system.cc:
sim/system.hh:
    make the console panic break event happen in m5.opt

--HG--
extra : convert_revision : 044a9b7cdacb058112388a31315e45c5d8cf70fd
2005-11-28 18:33:48 -05:00
Kevin Lim
6da93ea526 Apply patch for syscall emulation provided by Antti Miettinen (apm@brigitte.dna.fi). It provides support for more syscalls in syscall emulation mode.
arch/alpha/alpha_linux_process.cc:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    Apply patch for syscall emulation provided by Antti Miettinen (apm@brigitte.dna.fi).

--HG--
extra : convert_revision : 37fbc78a927110b7798343afd2c5f37a269e42b4
2005-11-22 12:08:08 -05:00
Nathan Binkert
63bb46b6d8 Serialize the symbol tables
base/loader/symtab.cc:
    Add support for clearing out the symbol table
    Add support for serializing the symbol table (clear on unserialize)
    Don't allow empty symbols to be entered into the table
base/loader/symtab.hh:
    Add support for clearing out the symbol table
    Add support for serializing the symbol table
sim/system.cc:
    Serialize the kernel, console, and palcode symbol tables so that
    we can capture any dynamic symbols that are added and so that we
    don't have to have the same kernel binary around to get the
    symbols right

--HG--
extra : convert_revision : 779888c88aa530f3adcd37dc7600a335951d05f7
2005-11-20 18:42:12 -05:00
Nathan Binkert
4e393f38ec get rid of allSymtab
if we want something like allSymtab, we should create a symbol
table proxy class

--HG--
extra : convert_revision : 20ca551a693b0d6495c018cac8afd63af33f16da
2005-11-20 18:39:31 -05:00
Steve Reinhardt
4410876773 Actually free Process fd_map entries when a file is closed...
amazingly we never did that before.  Caused us to run out of
file descriptors in twolf.

sim/process.cc:
    Add free_fd() method to free closed target fd in simulator fd map.
    Rename open_fd() to alloc_fd() for symmetry with free_fd().
sim/process.hh:
    Add free_fd() method to free closed target fd in simulator fd map.
    Rename open_fd() to alloc_fd() for symmetry with free_fd().
    Crank up MAX_FD while we're at it.
sim/syscall_emul.cc:
    Call free_fd() on process when target closes a file.
sim/syscall_emul.hh:
    Process open_fd() renamed to alloc_fd().

--HG--
extra : convert_revision : d780f4ccfd5a0989230b0afbdbd276212b87550c
2005-11-10 21:08:33 -05:00
Steve Reinhardt
99bf6ed084 Syscall DPRINTF and warning cleanup.
base/trace.hh:
    Need std:: on DPRINTFR reference to string class.
base/traceflags.py:
    Remove SyscallWarnings trace flag... we should always print warnings
    so nothing undesirable goes unnoticed.  Replaced with (currently unused)
    Syscall flag.
sim/syscall_emul.cc:
    Change SyscallWarning DPRINTFs into warn() calls.
    Uncomment SyscallVerbose DPRINTFs.
sim/syscall_emul.hh:
    Change SyscallWarning DPRINTFs into warn() calls.
    Call fatal() instead of ad-hoc termination.

--HG--
extra : convert_revision : dc6c2ce3691a129f697b6a6ae5d889e2dbaab228
2005-11-10 21:05:31 -05:00
Ali Saidi
0b3c27f149 Fix bug where simulation terminates same cycle as last stat dump causing a duplicate row in db
--HG--
extra : convert_revision : 45877c6feeaddf921eb0f4764246bf66e1705a1d
2005-11-02 14:45:35 -05:00
Nathan Binkert
a81c03737a Add new function profiling stuff, wrap the pc_sample stuff into it.
SConscript:
    Get rid of the pc_sample stuff and move to the new profiling stuff
base/traceflags.py:
    DPRINTF Stack stuff
cpu/base.cc:
cpu/base.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple/cpu.cc:
    Add profiling stuff
kern/kernel_stats.hh:
    Use a smart pointer
sim/system.cc:
sim/system.hh:
    Create a new symbol table that has all of the symbols for a
    particular system
util/stats/categories.py:
    change around the categories, add categories for function
    profiling stuff
util/stats/profile.py:
    No profile parsing and display code to deal with function
    profiling stuff, graph, dot, and text outputs.

--HG--
extra : convert_revision : b3de0cdc8bd468e42647966e2640ae009bda9eb8
2005-10-18 19:07:42 -04:00
Steve Reinhardt
2a1350e168 Fix for g++ 4 warning... not sure why this is just popping up now.
sim/system.hh:
    Fix for g++ 4.

--HG--
extra : convert_revision : e169220ba9ca34ebd4ba2bbafadf8de42f005812
2005-10-13 23:47:31 -04:00
Steve Reinhardt
93e60de656 Add executable parameter to LiveProcess. This allows the argv[0] value to
stay fixed even if the path to the binary changes, so the simulation results
are independent of that path.

--HG--
extra : convert_revision : d1109cd284466c14eddc97289908a51e771fc5db
2005-10-01 16:02:47 -04:00
Steve Reinhardt
d60de7122d Add functions to System object to set up function-based events,
including automatically fixing up addresses to deal with
optionally executed Alpha gp update prolog.

SConscript:
    Remove freebsd_events.cc and linux_events.cc.
base/remote_gdb.cc:
cpu/pc_event.cc:
kern/system_events.cc:
kern/system_events.hh:
    PCEvents now schedule themselves in constructor.
cpu/pc_event.hh:
    PCEvents now schedule themselves in the constructor.
    Get rid of constructor versions that don't take an address and
    all the schedule() methods that are now unnecessary.
kern/freebsd/freebsd_system.cc:
kern/freebsd/freebsd_system.hh:
    Use new System methods to schedule function-based events.
    Move FreeBSD-specific function event classes into FreebsdSystem.
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
    Use new System methods to schedule function-based events.
    Move Linux-specific function event classes into LinuxSystem.
kern/tru64/tru64_events.hh:
    PCEvents now schedule themselves in constructor.
    Add DebugPrintfrEvent to encapsulate raw setting as new type
    (to work better with new System function-event method.)
kern/tru64/tru64_system.cc:
    Use new System methods to schedule function-based events.
kern/tru64/tru64_system.hh:
    Add DebugPrintfrEvent to encapsulate raw setting as new type
    (to work better with new System function-event method.)
sim/system.cc:
sim/system.hh:
    Add functions to set up function-based events, including
    automatically fixing up addresses to deal with optionally
    executed Alpha gp update prolog.

--HG--
extra : convert_revision : c2cf09144297b6602afe755a34a0a2227023783f
2005-09-24 14:20:29 -04:00
Nathan Binkert
b1a1566818 fix the MAX_CHECKPOINTS stuff
sim/serialize.cc:
    Make the max checkpoint thing actually stop after the last
    checkpoint

--HG--
extra : convert_revision : 091179c4706e9876a9b7e826513c5c14ce6b72af
2005-09-18 21:20:24 -04:00
Ali Saidi
c62760e3cb fixes for gcc 4.0
base/mysql.hh:
    include mysql_version to get rid of that annoying mysql error.
    make sure refcount is set in all constructors
base/pollevent.hh:
dev/ethertap.hh:
dev/pciconfigall.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
sim/param.cc:
    fix for gcc 4

--HG--
extra : convert_revision : be626af2f40ca402818996ef27249ae256c63ef1
2005-09-12 03:01:43 -04:00
Steve Reinhardt
9196fbfe5e Fixes to build with gcc 4.0.
sim/param.hh:
    Add "template<>" to explicit template specialization.

--HG--
extra : convert_revision : 05e2f4ad8141a8782fe09a0b6824baf56c9fc957
2005-09-02 21:30:02 -04:00
Steve Reinhardt
23a9102d01 Convert type of max_time and progress_interval parameters
from Latency to Tick, and rename max_time to max_tick.

python/m5/objects/Root.py:
sim/root.cc:
    Convert type of max_time and progress_interval
    from Latency to Tick, and rename max_time to max_tick.

--HG--
extra : convert_revision : 2f2aacf6321c3003a0ce834acd8fb726abf27ce3
2005-09-01 11:32:58 -04:00
Steve Reinhardt
c4793184bd Build options are set via a build_options file in the
build directory instead of being inferred from the name
of the build directory.
Options are passed to C++ via config/*.hh files instead of
via the command line.  Build option flags are now always
defined to 0 or 1, so checks must use '#if' rather than
'#ifdef'.

SConscript:
    MySQL detection moved to SConstruct.
    Add config/*.hh files (via ConfigFile builder).
arch/alpha/alpha_memory.cc:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/isa_traits.hh:
base/fast_alloc.hh:
base/statistics.cc:
base/statistics.hh:
base/stats/events.cc:
base/stats/events.hh:
cpu/base.cc:
cpu/base.hh:
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/o3/alpha_cpu.hh:
cpu/o3/alpha_cpu_builder.cc:
cpu/o3/alpha_cpu_impl.hh:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/alpha_params.hh:
cpu/o3/commit_impl.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
cpu/o3/fetch_impl.hh:
cpu/o3/iew.hh:
cpu/o3/iew_impl.hh:
cpu/o3/regfile.hh:
cpu/o3/rename_impl.hh:
cpu/o3/rob_impl.hh:
cpu/ozone/cpu.hh:
cpu/pc_event.cc:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
sim/process.cc:
sim/process.hh:
    Convert compile flags from def/undef to 0/1.
    Set via #include config/*.hh instead of command line.
arch/alpha/isa_desc:
    Convert compile flags from def/undef to 0/1.
    Set via #include config/*.hh instead of command line.
    Revamp fenv.h support... most of the ugliness is hidden
    in base/fenv.hh now.
base/mysql.hh:
    Fix typo in #ifndef guard.
build/SConstruct:
    Build options are set via a build_options file in the
    build directory instead of being inferred from the name
    of the build directory.
    Options are passed to C++ via config/*.hh files instead of
    via the command line.
python/SConscript:
    Generate m5_build_env directly from scons options
    instead of indirectly via CPPDEFINES.
python/m5/convert.py:
    Allow '0' and '1' for booleans.
    Rewrite toBool to use dict.
base/fenv.hh:
    Revamp <fenv.h> support to make it a compile option
    (so we can test w/o it even if it's present) and to
    make isa_desc cleaner.

--HG--
extra : convert_revision : 8f97dc11185bef5e1865b3269c7341df8525c9ad
2005-08-30 13:18:54 -04:00
Miguel Serrano
b64eae5e52 Changes for getting FreeBSD to run.
SConscript:
    Added more files to compile: dev/pcifake.cc, dev/isa_fake.cc, kern/freebsd/freebsd_system.cc, kern/freebsd/freebsd_events.cc.
arch/alpha/isa_traits.hh:
    Added constant for argument register 2 as it is needed by FreebsdSystem::doCalibrateClocks().
cpu/exec_context.hh:
cpu/o3/alpha_cpu.hh:
    Replaced htoa()s with gtoh() and htog().
cpu/o3/fetch_impl.hh:
cpu/simple/cpu.cc:
    Replaced htoa() with gtoh().
dev/disk_image.cc:
    Replaced htoa()s with letoh()s.
dev/ide_ctrl.cc:
    Got rid of magic numbers.
    Added IdeChannel and IdeRegType type names where necessary.
dev/ide_ctrl.hh:
    Got rid of unnecessary macros.
    Changed RegType_t to IdeRegType.
    Changed bmi_regs to allow accessing registers by name instead of just by array index.
    Added IdeChannel enum type to use in place of bool variables which were used to specify IDE channel.
dev/ide_disk.cc:
    Rewrote IdeDisk::read and IdeDisk::write functions to specify registers by name instead of indexing through an array.
dev/ide_disk.hh:
    Updated command register struct.
dev/ns_gige.cc:
dev/ns_gige.hh:
    Made ReadConfig and WriteConfig begin with a lower-case letter.
    writeConfig() now takes a pointer to data as a parameter instead of a copy of data.
dev/pciconfigall.cc:
    writeConfig() now takes a pointer to data as a parameter instead of a copy of data.
dev/pcidev.cc:
    Cleaned up readConfig() and writeConfig() functions.
dev/pcidev.hh:
    Added macros to make code that works with the BARs (base adress registers) more readable. writeConfig() now takes a pointer to data.
dev/pcireg.h:
    Changed PCIConfig struct to make accessing elements more straight forward. Removed type 1 (for PCI-to-PCI bridges) PCI configuration space struct since it is not used.
dev/rtcreg.h:
    Added macros for bit fields in RTC status registers A & B.
dev/sinic.cc:
    Function name change: WriteConfig --> writeConfig.
    writeConfig() now takes a pointer to data instead of a copy of data.
    The accessing of elements of PCIConfig structure is updated.
dev/sinic.hh:
    Function name change: WriteConfig --> writeConfig.
    writeConfig() now takes a pointer to data instead of a copy of data.
dev/tsunami_io.cc:
    Added implementation of new RTC and PIT classes.
dev/tsunami_io.hh:
    Added classes for RTC and PIT modules.
dev/tsunamireg.h:
    Added macros for DMA ports used by Tsunami-Tru64.
dev/uart8250.cc:
    Got rid of a magic number.
    Transmit (Tx) interrupts should clear upon a read of the Interrupt ID register.
dev/uart8250.hh:
    Added comments and macros dealing with the UART Interrupt ID register.
kern/linux/linux_system.cc:
    Replaced htoa() with htog().
python/m5/objects/Pci.py:
    PciFake is a python class for Pci Devices that do nothing.
python/m5/objects/Tsunami.py:
    TsunamiFake was renamed as IsaFake.
sim/system.cc:
    Replaced htoa()s with htog()s.
dev/isa_fake.cc:
    New BitKeeper file ``dev/isa_fake.cc''
    TsunamiFake was renamed as IsaFake.
dev/isa_fake.hh:
    New BitKeeper file ``dev/isa_fake.hh''
    TsunmaiFake was renamed as IsaFake.
dev/pitreg.h:
    New BitKeeper file ``dev/pitreg.h''
    Useful macros for working with PIT (Periodic Interval Timer) registers.

--HG--
extra : convert_revision : 33f3a8a1034af4f6c71b32dd743e371c8613e780
2005-08-15 16:59:58 -04:00
Steve Reinhardt
5107b3bc83 Fixes for cygwin compile.
dev/ide_atareg.h:
    Need endian.h for LITTLE_ENDIAN.
sim/syscall_emul.hh:
    Need to include sys/fcntl.h to get O_BINARY.

--HG--
extra : convert_revision : 606f9506dc483f3952dcc65b8ba25c28001f2c43
2005-06-30 00:42:27 -04:00
Nathan Binkert
ec1f689d0d Easier remote debugging at boot time.
sim/system.cc:
    Add a global variable that will tell the remote debugger to
    wait when a given CPU is is registered.

--HG--
extra : convert_revision : a093c9331daa675d4b59a321e53a5da6ea292c40
2005-06-29 22:20:38 -04:00
Nathan Binkert
8a0bc84022 Allow CPUs to specify their own CPU ids.
Make the AlphaConsole calculate the number of CPUs instead
of passing that in as a parameter.

cpu/base.cc:
    pass the desired cpu_id into registerExecContext, offsetting it
    by the thread number.  a cpu_id of -1 means that it should be
    generated for you.
cpu/base.hh:
    Take the cpu_id as a parameter
cpu/o3/alpha_cpu_builder.cc:
cpu/simple/cpu.cc:
    Accept the cpu_id as a parameter
    while we're here, let's remove the multiplier since it is
    not used.
dev/alpha_console.cc:
    don't take the number of CPUs as a parameter.  Calculate it from
    the system based on the number of CPUs that have been registered.
    move init() code to startup() to ensure that all CPUs are registerd.
dev/alpha_console.hh:
python/m5/objects/AlphaConsole.py:
    don't take the number of CPUs as a parameter.
    move init() code to startup() to ensure that all CPUs are registerd.
python/m5/objects/BaseCPU.py:
    take the cpu_id as a parameter.  Default it to -1 which means
    that it will be generated.
sim/system.cc:
    allow the registerExecContext functioin to take a desired
    cpu_id as a parameter.  Check to ensure that the id isn't
    already used.  Accept -1 as a request to have an id assigned.
sim/system.hh:
    keep track of the number of registered exec contexts.
    provide a function for accessing the number of exec contexts
    that checks to ensure that they are all registered correctly.

--HG--
extra : convert_revision : 8e12f96ff8a49fa16cdbbdb4c05c651376c35788
2005-06-29 01:20:41 -04:00
Nathan Binkert
036a8ceb8d Don't hard code the location of m5AlphaAccess. Instead, move the
code into a function that can be called by the AlphaConsole class.
AlphaConsole will pass in its address.

arch/alpha/ev5.hh:
    Move Phys2K0Seg to ev5.hh and fixup the TSUNAMI uncacheable
    bits so that they will be converted correctly.
dev/alpha_access.h:
    Do not hard code the location of the AlphaConsole
dev/alpha_console.cc:
    fixup #includes
    tell the system where the alpha console is
sim/system.hh:
    Provide a function that will tell the system where the AlphaAccess
    structure (device) lives

--HG--
extra : convert_revision : 92d70ca926151a32eebe9925de597459ac58013e
2005-06-28 12:42:15 -04:00
Nathan Binkert
d172447a7a Pass the location of the m5 console backdoor to the console
instead of compiling it into the console version

dev/alpha_access.h:
    move serialization stuff to alpha_console.hh
    define the ALPHA_ACCESS_BASE in m5 instead of in console.c and
    have m5 pass the value to the console
dev/alpha_console.cc:
dev/alpha_console.hh:
    Move serialization stuff into a derived class of AlphaAccess
sim/system.cc:
    pass the value of ALPHA_ACCESS_BASE to the console code via
    the m5AlphaAccess console variable.

--HG--
extra : convert_revision : 0ea4ba239f03d6dad51a6efae0385aa543064117
2005-06-28 01:09:13 -04:00
Nathan Binkert
10a906be52 Update for console code reorganization
dev/alpha_access.h:
    Update the ALPHA_ACCESS_VERSION
    move typedefs to this file since they're only used here.
dev/alpha_console.cc:
    formatting
sim/system.cc:
    xxm -> m5

--HG--
extra : convert_revision : 3aeca50d1385034f5a1e20dd8b0abd03bd6f26f0
2005-06-27 17:04:43 -04:00
Nathan Binkert
91f5736fd3 Move max_time and progress_interval parameters to the Root
object and get rid of the ParamContext that each used to have.

python/m5/objects/Root.py:
    Add max_time and progress_interval to the Root object
sim/root.cc:
    Add max_time and progress_interval to the Root object.  These
    parameters used to be in their own contexts in sim_events.cc
sim/sim_events.cc:
    Get rid of the ParamContext for max cycles and the progress
    event.  Move the functionality to the Root object
sim/sim_events.hh:
    Move ProgressEvent declaration to the header so that it can
    be used in other files.

--HG--
extra : convert_revision : ff664b806855e8eb9201b8a25392aa53204464f0
2005-06-22 09:59:13 -04:00
Steve Reinhardt
ad8b9636f8 Many files:
Update copyright dates and author list

SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
arch/alpha/aout_machdep.h:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/faults.cc:
arch/alpha/faults.hh:
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/osfpal.hh:
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
arch/alpha/vptr.hh:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/bitfield.hh:
base/callback.hh:
base/circlebuf.cc:
base/circlebuf.hh:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/crc.hh:
base/date.cc:
base/dbl_list.hh:
base/endian.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/intmath.hh:
base/match.cc:
base/match.hh:
base/misc.cc:
base/misc.hh:
base/mod_num.hh:
base/mysql.cc:
base/mysql.hh:
base/output.cc:
base/output.hh:
base/pollevent.cc:
base/pollevent.hh:
base/predictor.hh:
base/random.cc:
base/random.hh:
base/range.cc:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/socket.hh:
base/statistics.cc:
base/statistics.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/stats/events.cc:
base/stats/events.hh:
base/stats/flags.hh:
base/stats/mysql.cc:
base/stats/mysql.hh:
base/stats/mysql_run.hh:
base/stats/output.hh:
base/stats/statdb.cc:
base/stats/statdb.hh:
base/stats/text.cc:
base/stats/text.hh:
base/stats/types.hh:
base/stats/visit.cc:
base/stats/visit.hh:
base/str.cc:
base/str.hh:
base/time.cc:
base/time.hh:
base/timebuf.hh:
base/trace.cc:
base/trace.hh:
base/userinfo.cc:
base/userinfo.hh:
build/SConstruct:
cpu/base.cc:
cpu/base.hh:
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/inst_seq.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/smt.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
cpu/memtest/memtest.hh:
cpu/o3/sat_counter.cc:
cpu/o3/sat_counter.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/ibm_reader.cc:
cpu/trace/reader/ibm_reader.hh:
cpu/trace/reader/itx_reader.cc:
cpu/trace/reader/itx_reader.hh:
cpu/trace/reader/m5_reader.cc:
cpu/trace/reader/m5_reader.hh:
cpu/trace/reader/mem_trace_reader.cc:
cpu/trace/reader/mem_trace_reader.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/pktfifo.cc:
dev/pktfifo.hh:
dev/platform.cc:
dev/platform.hh:
dev/simconsole.cc:
dev/simconsole.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/sinic.cc:
dev/sinic.hh:
dev/sinicreg.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunamireg.h:
dev/uart.cc:
dev/uart.hh:
dev/uart8250.cc:
dev/uart8250.hh:
docs/stl.hh:
encumbered/cpu/full/op_class.hh:
kern/kernel_stats.cc:
kern/kernel_stats.hh:
kern/linux/linux.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/linux/linux_threadinfo.hh:
kern/linux/printk.cc:
kern/linux/printk.hh:
kern/system_events.cc:
kern/system_events.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/dump_mbuf.hh:
kern/tru64/mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
kern/tru64/tru64.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_events.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
python/SConscript:
python/m5/__init__.py:
python/m5/config.py:
python/m5/convert.py:
python/m5/multidict.py:
python/m5/smartdict.py:
sim/async.hh:
sim/builder.cc:
sim/builder.hh:
sim/debug.cc:
sim/debug.hh:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/process.cc:
sim/process.hh:
sim/root.cc:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/startup.cc:
sim/startup.hh:
sim/stat_control.cc:
sim/stat_control.hh:
sim/stats.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
sim/system.cc:
sim/system.hh:
test/bitvectest.cc:
test/circletest.cc:
test/cprintftest.cc:
test/genini.py:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/sized_test.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/ccdrv/devtime.c:
util/m5/m5.c:
util/oprofile-top.py:
util/rundiff:
util/m5/m5op.h:
util/m5/m5op.s:
util/stats/db.py:
util/stats/dbinit.py:
util/stats/display.py:
util/stats/info.py:
util/stats/print.py:
util/stats/stats.py:
util/tap/tap.cc:
    Update copyright dates and author list

--HG--
extra : convert_revision : 0faba08fc0fc0146f1efb7f61e4b043c020ff9e4
2005-06-05 05:16:00 -04:00
Nathan Binkert
e71ee12eac move eio stuff to encumbered
--HG--
extra : convert_revision : 9061382dba285c84931f8825e7159db0e9899944
2005-06-05 02:26:19 -04:00
Nathan Binkert
fb1282de1a Merge zizzer.eecs.umich.edu:/bk/m5
into crampon.my.domain:/z/binkertn/research/m5/head

--HG--
extra : convert_revision : b0c9b044b44a1bfc4cded2ebfa240b799dd4a5a0
2005-06-05 00:45:10 -04:00
Steve Reinhardt
8170b4308f Get rid of broken "long help" option.
--HG--
extra : convert_revision : 8b7c646ce416d2a2a4919acbb87c0b6d65920d42
2005-06-04 23:13:09 -04:00
Nathan Binkert
13c005a8af shuffle files around for new directory structure
--HG--
rename : cpu/base_cpu.cc => cpu/base.cc
rename : cpu/base_cpu.hh => cpu/base.hh
rename : cpu/beta_cpu/2bit_local_pred.cc => cpu/o3/2bit_local_pred.cc
rename : cpu/beta_cpu/2bit_local_pred.hh => cpu/o3/2bit_local_pred.hh
rename : cpu/beta_cpu/alpha_full_cpu.cc => cpu/o3/alpha_cpu.cc
rename : cpu/beta_cpu/alpha_full_cpu.hh => cpu/o3/alpha_cpu.hh
rename : cpu/beta_cpu/alpha_full_cpu_builder.cc => cpu/o3/alpha_cpu_builder.cc
rename : cpu/beta_cpu/alpha_full_cpu_impl.hh => cpu/o3/alpha_cpu_impl.hh
rename : cpu/beta_cpu/alpha_dyn_inst.cc => cpu/o3/alpha_dyn_inst.cc
rename : cpu/beta_cpu/alpha_dyn_inst.hh => cpu/o3/alpha_dyn_inst.hh
rename : cpu/beta_cpu/alpha_dyn_inst_impl.hh => cpu/o3/alpha_dyn_inst_impl.hh
rename : cpu/beta_cpu/alpha_impl.hh => cpu/o3/alpha_impl.hh
rename : cpu/beta_cpu/alpha_params.hh => cpu/o3/alpha_params.hh
rename : cpu/beta_cpu/bpred_unit.cc => cpu/o3/bpred_unit.cc
rename : cpu/beta_cpu/bpred_unit.hh => cpu/o3/bpred_unit.hh
rename : cpu/beta_cpu/bpred_unit_impl.hh => cpu/o3/bpred_unit_impl.hh
rename : cpu/beta_cpu/btb.cc => cpu/o3/btb.cc
rename : cpu/beta_cpu/btb.hh => cpu/o3/btb.hh
rename : cpu/beta_cpu/comm.hh => cpu/o3/comm.hh
rename : cpu/beta_cpu/commit.cc => cpu/o3/commit.cc
rename : cpu/beta_cpu/commit.hh => cpu/o3/commit.hh
rename : cpu/beta_cpu/commit_impl.hh => cpu/o3/commit_impl.hh
rename : cpu/beta_cpu/full_cpu.cc => cpu/o3/cpu.cc
rename : cpu/beta_cpu/full_cpu.hh => cpu/o3/cpu.hh
rename : cpu/beta_cpu/cpu_policy.hh => cpu/o3/cpu_policy.hh
rename : cpu/beta_cpu/decode.cc => cpu/o3/decode.cc
rename : cpu/beta_cpu/decode.hh => cpu/o3/decode.hh
rename : cpu/beta_cpu/decode_impl.hh => cpu/o3/decode_impl.hh
rename : cpu/beta_cpu/fetch.cc => cpu/o3/fetch.cc
rename : cpu/beta_cpu/fetch.hh => cpu/o3/fetch.hh
rename : cpu/beta_cpu/fetch_impl.hh => cpu/o3/fetch_impl.hh
rename : cpu/beta_cpu/free_list.cc => cpu/o3/free_list.cc
rename : cpu/beta_cpu/free_list.hh => cpu/o3/free_list.hh
rename : cpu/beta_cpu/iew.cc => cpu/o3/iew.cc
rename : cpu/beta_cpu/iew.hh => cpu/o3/iew.hh
rename : cpu/beta_cpu/iew_impl.hh => cpu/o3/iew_impl.hh
rename : cpu/beta_cpu/inst_queue.cc => cpu/o3/inst_queue.cc
rename : cpu/beta_cpu/inst_queue.hh => cpu/o3/inst_queue.hh
rename : cpu/beta_cpu/inst_queue_impl.hh => cpu/o3/inst_queue_impl.hh
rename : cpu/beta_cpu/mem_dep_unit.cc => cpu/o3/mem_dep_unit.cc
rename : cpu/beta_cpu/mem_dep_unit.hh => cpu/o3/mem_dep_unit.hh
rename : cpu/beta_cpu/mem_dep_unit_impl.hh => cpu/o3/mem_dep_unit_impl.hh
rename : cpu/beta_cpu/ras.cc => cpu/o3/ras.cc
rename : cpu/beta_cpu/ras.hh => cpu/o3/ras.hh
rename : cpu/beta_cpu/regfile.hh => cpu/o3/regfile.hh
rename : cpu/beta_cpu/rename.cc => cpu/o3/rename.cc
rename : cpu/beta_cpu/rename.hh => cpu/o3/rename.hh
rename : cpu/beta_cpu/rename_impl.hh => cpu/o3/rename_impl.hh
rename : cpu/beta_cpu/rename_map.cc => cpu/o3/rename_map.cc
rename : cpu/beta_cpu/rename_map.hh => cpu/o3/rename_map.hh
rename : cpu/beta_cpu/rob.cc => cpu/o3/rob.cc
rename : cpu/beta_cpu/rob.hh => cpu/o3/rob.hh
rename : cpu/beta_cpu/rob_impl.hh => cpu/o3/rob_impl.hh
rename : cpu/beta_cpu/sat_counter.cc => cpu/o3/sat_counter.cc
rename : cpu/beta_cpu/sat_counter.hh => cpu/o3/sat_counter.hh
rename : cpu/beta_cpu/store_set.cc => cpu/o3/store_set.cc
rename : cpu/beta_cpu/store_set.hh => cpu/o3/store_set.hh
rename : cpu/beta_cpu/tournament_pred.cc => cpu/o3/tournament_pred.cc
rename : cpu/beta_cpu/tournament_pred.hh => cpu/o3/tournament_pred.hh
rename : cpu/ooo_cpu/ooo_cpu.cc => cpu/ozone/cpu.cc
rename : cpu/ooo_cpu/ooo_cpu.hh => cpu/ozone/cpu.hh
rename : cpu/ooo_cpu/ooo_impl.hh => cpu/ozone/cpu_impl.hh
rename : cpu/ooo_cpu/ea_list.cc => cpu/ozone/ea_list.cc
rename : cpu/ooo_cpu/ea_list.hh => cpu/ozone/ea_list.hh
rename : cpu/simple_cpu/simple_cpu.cc => cpu/simple/cpu.cc
rename : cpu/simple_cpu/simple_cpu.hh => cpu/simple/cpu.hh
rename : cpu/full_cpu/smt.hh => cpu/smt.hh
rename : cpu/full_cpu/op_class.hh => encumbered/cpu/full/op_class.hh
extra : convert_revision : c4a891d8d6d3e0e9e5ea56be47d851da44d8c032
2005-06-04 20:50:10 -04:00
Nathan Binkert
b46730c7ec BaseSystem -> System
Make System an object that can be instantiated.  For operating
systems that don't need any OS specific hacks.

python/m5/objects/AlphaConsole.py:
python/m5/objects/BaseCPU.py:
python/m5/objects/Tsunami.py:
    BaseSystem -> System

--HG--
rename : python/m5/objects/BaseSystem.py => python/m5/objects/System.py
extra : convert_revision : e5d12db02abef1b0eda720b50dd2c09cb1ac5232
2005-06-04 14:19:05 -04:00
Steve Reinhardt
22eccce34b Additions/fixes for Tru64 syscall emulation.
We can now run the SimpleScalar wupwise binary
to completion on the test input.
Didn't have time to do more testing, but I fixed
a major problem w/getdirentries that should help
a lot more programs run.

arch/alpha/alpha_tru64_process.cc:
    Add truncate, ftruncate, statfs, and fstatfs.
    Add v4.x (pre-F64) stat, fstat, and lstat.
    Add setsysinfo (though all it does is provide more
    specific warning messages).
    Fix subtle but major bug in getdirentries.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    Add truncate, ftruncate, statfs, and fstatfs.

--HG--
extra : convert_revision : 9037393d00dc49b0074a41603ea647587f5a9ec7
2005-06-03 16:19:34 -04:00
Nathan Binkert
ba73e1cc39 clean up command line stuff
sim/main.cc:
    Clean uo usage output and print usage when no options are given
    Don't accept mpy files anymore since we don't use them.

--HG--
extra : convert_revision : c3b16f602f301d2de12547285334c0037d829998
2005-06-02 11:20:31 -04:00
Steve Reinhardt
62fa781fee Rename sim/universe.{cc,hh} to root.{cc,hh} (since the
object defined there was renamed Root long ago).

SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
base/misc.cc:
base/pollevent.cc:
base/pollevent.hh:
base/stats/events.cc:
base/trace.hh:
cpu/beta_cpu/fetch_impl.hh:
cpu/beta_cpu/full_cpu.cc:
cpu/beta_cpu/inst_queue_impl.hh:
cpu/pc_event.cc:
cpu/static_inst.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ide_disk.cc:
dev/pcidev.cc:
sim/builder.cc:
sim/eventq.cc:
sim/main.cc:
sim/root.cc:
sim/stat_control.cc:
    Rename sim/universe.{cc,hh} to root.{cc,hh}.

--HG--
rename : sim/universe.cc => sim/root.cc
extra : convert_revision : b8699e81e285253d66da75412e7bb2c251c0389a
2005-06-01 21:59:27 -04:00
Steve Reinhardt
8031cd93b5 Standardize clock parameter names to 'clock'.
Fix description for Bus clock_ratio (no longer a ratio).
Add Clock param type (generic Frequency or Latency).

cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/beta_cpu/alpha_full_cpu_builder.cc:
cpu/simple_cpu/simple_cpu.cc:
dev/ide_ctrl.cc:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/pciconfigall.cc:
dev/sinic.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
python/m5/objects/BaseCPU.py:
python/m5/objects/BaseCache.py:
python/m5/objects/BaseSystem.py:
python/m5/objects/Bus.py:
python/m5/objects/Ethernet.py:
python/m5/objects/Root.py:
sim/universe.cc:
    Standardize clock parameter names to 'clock'.
    Fix description for Bus clock_ratio (no longer a ratio).
python/m5/config.py:
    Minor tweaks on Frequency/Latency:
    - added new Clock param type to avoid ambiguities
    - factored out init code into getLatency()
    - made RootFrequency *not* a subclass of Frequency so it
    can't be directly assigned to a Frequency paremeter

--HG--
extra : convert_revision : fc4bb8562df171b454bbf696314cda57e1ec8506
2005-06-01 21:44:00 -04:00
Nathan Binkert
5a7ee2b495 Make code more portable and port to cygwin
arch/alpha/alpha_tru64_process.cc:
    getdirent isn't implemented by cygwin.  panic if this function is
    executed.  (It shouldn't be too much to emulate it using opendir,
    readdir, etc.)
arch/alpha/pseudo_inst.cc:
    Use lseek once and read instead pread.
base/intmath.hh:
    we want int, long, and long long variations of FloorLog2 instead
    of int32_t, int64_t.  Otherwise, we leave one out.
base/socket.cc:
    Fix define that seems to be for apple
sim/serialize.cc:
    don't use the intXX_t stuff, instead, use the real types
    so we're sure that we cover all of them.

--HG--
extra : convert_revision : 9fccaff583100b06bbaafd95a162c4e19beed59e
2005-04-22 13:12:03 -04:00
Nathan Binkert
0f894a7b25 Make the exit after max checkpoints code compile.
sim/serialize.cc:
    call exitNow instead of SimExit.  Include the header too.

--HG--
extra : convert_revision : 633a8533b23cac914a2b09bd2d3ea5d85243c675
2005-04-13 14:26:56 -04:00
Nathan Binkert
d86bed198a Add support to limit the number of checkpoints dropped.
sim/serialize.hh:
    Add variables to keep track of the number of checkpoints
    dropped and maximum allowed.

--HG--
extra : convert_revision : 32241b90c58def6958ec84c53cc2cca996007506
2005-04-13 09:38:50 -04:00
Nathan Binkert
5eab6c4b41 Make the notion of a global event tick independent of the actual
CPU cycle ticks.  This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency.  For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.

arch/alpha/ev5.cc:
    The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
    frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
    frequency isn't the cpu parameter anymore, cycleTime is.
    create several public functions for getting the cpu frequency
    and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
    Now that ticks aren't cpu cycles, fixup code to advance
    by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
    Provide a function to get the number of ticks for a given
    number of cycles.
dev/alpha_console.cc:
    Update for changes in the way that frequencies and latencies are
    accessed.  Move some stuff to init()
dev/alpha_console.hh:
    Need a pointer to the system and the cpu to get the frequency
    so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
    Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
    outline the constructor and destructor
dev/platform.hh:
    outline the constructor and destructor.
    don't keep track of the interrupt frequency.  Only provide the
    accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
    outline the constructor and destructor
    Don't set the interrupt frequency here.  Get it from the actual device
    that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
    Make the interrupt interval a configuration parameter.  (And convert
    the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
    For now, we must get the boot cpu's frequency as a parameter
    since allowing the system to have a pointer to the boot cpu would
    cause a cycle.
kern/tru64/tru64_system.cc:
    For now, we must get the boot cpu's frequency as a parameter
    since allowing the system to have a pointer to the boot cpu would
    cause a cycle.
python/m5/config.py:
    Fix support for cycle_time relative latencies and frequencies.
    Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
    All CPUs now have a cycle_time.  The default is the global frequency,
    but it is now possible to set the global frequency to some large value
    (like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
    Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
    We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
    Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
    this frequency isn't needed.  We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
    The clock generator should hold the frequency
sim/eventq.hh:
    Need to remove this assertion because the writeback event
    queue is different from the CPU's event queue which can cause
    this assertion to fail.
sim/process.cc:
    Fix comment.
sim/system.hh:
    Struct member to hold the boot CPU's frequency.
sim/universe.cc:
    remove unneeded variable.

--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 15:32:06 -04:00
Nathan Binkert
c82562c740 full_system isn't a useful parameter anymore, get rid of it.
python/m5/objects/Root.mpy:
sim/universe.cc:
util/stats/stats.py:
    full_system isn't a useful parameter

--HG--
extra : convert_revision : 557091be1faa3cf121c55102aba4e6f4c1bd45ef
2005-04-06 16:58:40 -04:00
Nathan Binkert
43a9caa221 expose variables for number of global events per simulated second,
millisecond, microsecond, etc. so that the user can explicitly
convert between system ticks and time and know what sorts of
expensive operations are being used for that conversion.

arch/alpha/alpha_tru64_process.cc:
arch/alpha/pseudo_inst.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ns_gige.cc:
dev/sinic.cc:
dev/tsunami_io.cc:
dev/uart.cc:
sim/stat_control.cc:
sim/syscall_emul.hh:
    Use the new variables for getting the event clock
dev/etherdump.hh:
    delete variables that are no longer needed.

--HG--
extra : convert_revision : d95fc7d44909443e1b7952a24ef822ef051c7cf2
2005-03-29 07:55:44 -05:00
Ron Dreslinski
f2dd820972 No need for this ifdef, since the entire process.hh is surounded by an ifndef FULL_SYSTEM
--HG--
extra : convert_revision : 81009e5c468eaaee06c83c35f1d05ed2863299a4
2005-03-16 18:26:32 -05:00
Ron Dreslinski
d97590e29d Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : 848757d0f18cfb33620cfa4b084a9b102b2744c0
2005-03-16 10:31:22 -05:00
Ron Dreslinski
df012f26fa Fix the bad addr check to check for allowable addresses in the nxm address space
arch/alpha/alpha_tru64_process.cc:
sim/process.cc:
sim/process.hh:
    Add an address range for the nxm
sim/syscall_emul.hh:
    Check to make sure that if we have an nxm config space that the mmap hasn't grown into it

--HG--
extra : convert_revision : e479e5240080ae488080d228bafea488835d6e77
2005-03-16 10:30:33 -05:00
Nathan Binkert
0f8067fbf6 Hard code the SimObject::Params struct
sim/sim_object.cc:
    Add a new constructor that can take the params struct and
    tweak the old one to create a params struct if we use the
    old constructor.
sim/sim_object.hh:
    Hard code a Params struct for SimObject that all other params
    structs can derive from.  Move the name string into the struct
    and update the code accordingly.  New constructor that takes
    the params struct.

--HG--
extra : convert_revision : 30761dab31d7257f9e8c864dcd6cae37309163f2
2005-03-15 17:11:54 -05:00
Steve Reinhardt
1b841a871e - Add capability to auto-generate Param structs from
.mpy SimObject descriptions.  Structs are defined
in simobj/param/ObjectName.hh.
- Move compile-time python params (from CPPDEFINES) to
separate dict from run-time params (from os.environ).
The former are needed to generate proper param structs.
This also helps prevent users from messing things up
by setting the wrong environment vars (which could have
overridden compile-time settings in the old system).
- Other misc cleanup of m5 python package.

SConscript:
    Include simobj/SConscript
build/SConstruct:
    Fix type in comment
python/SConscript:
    Move CPPDEFINES dict-generating code to m5scons.flatten_defines
python/m5/__init__.py:
    - Generate a build_env SmartDict here to hold compile-time
    params (passed in via __main__.m5_build_env).
    - Move panic and env here from config.py.
python/m5/config.py:
    Move panic, env to top level (m5/__init__.py)
python/m5/objects/BaseCPU.mpy:
    Use build_env instead of env for compile-time params
python/m5/smartdict.py:
    Add some comments.
sim/sim_object.hh:
    Include auto-generated Param struct.  Not used yet,
    just here as proof of concept.
test/genini.py:
    Put -E arguments in build_env as well as os.environ

--HG--
extra : convert_revision : cf6f4a2565b230c495b33b18612d6030988adac5
2005-03-14 07:46:26 -05:00
Nathan Binkert
cf05fa476d stick all python stuff into a top level python directory.
create an m5 package in python/m5
move the objects package into the m5 package
move the m5config into the m5 package as config
leave both importers outside of the package.

SConscript:
sim/main.cc:
    move sim/pyconfig/* -> python
python/SConscript:
    m5config.py -> m5/config.py (now automatically embedded)
    objects -> python/m5/objects
    embed all python files in python/m5
python/m5/config.py:
    importer renamed mpy_importer
    move code to m5/__init__.py
test/genini.py:
    deal with new python organization
    keep track of paths we want to add and add them after parameters
    are parsed.

--HG--
rename : sim/pyconfig/SConscript => python/SConscript
rename : sim/pyconfig/m5config.py => python/m5/config.py
rename : objects/AlphaConsole.mpy => python/m5/objects/AlphaConsole.mpy
rename : objects/AlphaTLB.mpy => python/m5/objects/AlphaTLB.mpy
rename : objects/BadDevice.mpy => python/m5/objects/BadDevice.mpy
rename : objects/BaseCPU.mpy => python/m5/objects/BaseCPU.mpy
rename : objects/BaseCache.mpy => python/m5/objects/BaseCache.mpy
rename : objects/BaseSystem.mpy => python/m5/objects/BaseSystem.mpy
rename : objects/Bus.mpy => python/m5/objects/Bus.mpy
rename : objects/CoherenceProtocol.mpy => python/m5/objects/CoherenceProtocol.mpy
rename : objects/Device.mpy => python/m5/objects/Device.mpy
rename : objects/DiskImage.mpy => python/m5/objects/DiskImage.mpy
rename : objects/Ethernet.mpy => python/m5/objects/Ethernet.mpy
rename : objects/Ide.mpy => python/m5/objects/Ide.mpy
rename : objects/IntrControl.mpy => python/m5/objects/IntrControl.mpy
rename : objects/MemTest.mpy => python/m5/objects/MemTest.mpy
rename : objects/Pci.mpy => python/m5/objects/Pci.mpy
rename : objects/PhysicalMemory.mpy => python/m5/objects/PhysicalMemory.mpy
rename : objects/Platform.mpy => python/m5/objects/Platform.mpy
rename : objects/Process.mpy => python/m5/objects/Process.mpy
rename : objects/Repl.mpy => python/m5/objects/Repl.mpy
rename : objects/Root.mpy => python/m5/objects/Root.mpy
rename : objects/SimConsole.mpy => python/m5/objects/SimConsole.mpy
rename : objects/SimpleDisk.mpy => python/m5/objects/SimpleDisk.mpy
rename : objects/Tsunami.mpy => python/m5/objects/Tsunami.mpy
rename : objects/Uart.mpy => python/m5/objects/Uart.mpy
extra : convert_revision : aebf6ccda33028b1125974ca8b6aeab6f7570f30
2005-03-11 18:28:38 -05:00
Ali Saidi
ad9b28f98e Removed unecessary constructor call at each return.
arch/alpha/isa_traits.hh:
    updated copyright date

--HG--
extra : convert_revision : 30c5fc0eb94138ebd4ee047ebdbff5121f95e5f1
2005-03-10 14:20:12 -05:00
Ali Saidi
2897665685 Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : a61ddd67647fc6a6e8e12d918cc71ae9da69f869
2005-03-09 15:56:29 -05:00
Ali Saidi
232134a816 Changed all syscalls to use syscall return object.
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
cpu/exec_context.hh:
sim/process.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    Changed all syscalls to use syscall return object
arch/alpha/isa_traits.hh:
    Added syscall return object that packages return value and return
    status into an object.
sim/process.cc:
    renamed variable name to nm so base class function name() can be called

--HG--
extra : convert_revision : 6609c5ffecc9e3519d7a0cd160879fd21d54abfc
2005-03-09 15:52:10 -05:00
Nathan Binkert
7d91bda6bf Add support for using the variables that m5 was compiled with for
determining which parameters belong to a class.  This allows us to
remove the disable flag since it is not the correct model
for variable checking anyway.

objects/BaseCPU.mpy:
    Use the FULL_SYSTEM environment variable to enable or disable
    parameters.
sim/pyconfig/m5config.py:
    remove the disable flag since it is not the correct model
    for variable checking.

--HG--
extra : convert_revision : a8ccb78ba16d23006225df282a09187d32557608
2005-03-09 14:42:30 -05:00
Nathan Binkert
4a3ad218e1 We should import m5config *after* we do the CPPDEFINES stuff,
otherwise m5config and the object descriptions cannot take
advantage of them.

sim/pyconfig/SConscript:
    We should import m5config *after* we do the CPPDEFINES stuff,
    otherwise m5config and the object descriptions cannot take
    advantage of them.  This means that we can't use the env dict
    alias.  We should instead use os.environ.

--HG--
extra : convert_revision : 392f99a3c15cfba74a5cde79a709ecfad3820e63
2005-03-09 14:39:35 -05:00
Steve Reinhardt
dbd60761f5 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/stever/bk/m5-head

--HG--
extra : convert_revision : daaeb6a596b08fbedd6a14833dcb3825c637d486
2005-03-09 00:17:20 -05:00
Steve Reinhardt
4b69debac6 Fix a couple of bugs introduced (or tickled) by the .ini sorting change.
sim/pyconfig/m5config.py:
    Don't sort child nodes, as this can change timing in memory system.
    (Really ought to be fixed in memory system, but we'll just take the
    sort back out for now to avoid intoducing gratuitous changes.)

--HG--
extra : convert_revision : 07e950c25911443cbc7a84435969ca596fb04348
2005-03-09 00:17:09 -05:00
Nathan Binkert
d191b14ff7 Pass all scons defined pre-processor macro variables to the
python configuration stuff as environment variables.

sim/pyconfig/SConscript:
    generate a python file that updates the env dict with all
    variables in the CPPDEFINES so the python code can use those
    variables in configuration scripts.

--HG--
extra : convert_revision : 50b0719b044f7adc87ce6ae1571d156ca0c5644c
2005-03-08 23:06:54 -05:00
Nathan Binkert
689f6d1b02 Split the string importer from the rest of the mpy parsing
and importing stuff to avoid some confusion.

sim/pyconfig/SConscript:
    Split the string importer from the rest of the importer code.
    The importer.py code can be embedded like m5config.py
sim/pyconfig/m5config.py:
    import what we need from importer

--HG--
extra : convert_revision : 9d57f43381b55e717b5b10adfb8f0a522280ac57
2005-03-08 22:07:26 -05:00
Steve Reinhardt
c720389366 More restructuring on Python config code for auto-generating
of Param structs.

objects/CoherenceProtocol.mpy:
objects/Ide.mpy:
    Update for new Enum syntax.
sim/pyconfig/m5config.py:
    More modest restructuring heading for auto-generating
    of param structs.

    - Revamped Enum handling: Enums are regular classes so they
    know their names now (makes it easier for generating C++
    equivalents).

    - Created MetaSimObject class and moved some SimObject-specific
    stuff there (i.e. does not apply to ConfigNodes in general).

--HG--
extra : convert_revision : a93b40dda3b038ebe8bffecac97e9079c22af561
2005-03-07 20:56:02 -05:00
Steve Reinhardt
e5f945967b Sort fields in .ini files generated by Python config
to make it easier to diff output from modified versions.

sim/pyconfig/m5config.py:
    Sort .ini outputs for repeatable results across versions.

--HG--
extra : convert_revision : fa918f2c53635eca3a02ce02af9b320eacd1f057
2005-03-05 19:28:43 -05:00
Nathan Binkert
6172f79d9e add some comments.
sim/pyconfig/m5config.py:
    Add some comments to indicate what the decorators mean.

--HG--
extra : convert_revision : fbcbcbe4ad8cd62f2bd12af6b1f141c66752b870
2005-03-01 11:07:44 -05:00
Ali Saidi
107233adf1 Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : a63405fac7237014c4ef8b765d31d59d3e1bb500
2005-02-24 15:59:29 -05:00
Nathan Binkert
b78b634107 Fix the python panic message
sim/pyconfig/m5config.py:
    Fix panic

--HG--
extra : convert_revision : 56d93398e992ed6e95380f6dcdb61cbee54b3893
2005-02-23 12:26:35 -05:00
Ali Saidi
27a338fe2b Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : f149b8ea762d4a83ef76b3bb95f28e0709391ecf
2005-02-23 11:47:49 -05:00
Ali Saidi
9ebeb9b2de Added mmap start and end so detailed CPU can know if an access is
in a mmaped region

--HG--
extra : convert_revision : e4ee0520c84d94a0d2e804d02035228766abe71f
2005-02-23 11:45:25 -05:00
Steve Reinhardt
af33e74638 Small initial steps toward generating C++ param structs
from Python object descriptions.  Mostly cleanup of Python
code based on things I encountered trying to figure out
what's going on.  Main reason I'm committing this now is
to transfer work from my laptop to zizzer.

sim/pyconfig/m5config.py:
    Small steps toward param struct generation: all param
    objects should now have a _cppname attribute that holds
    their corresponding C++ type name.

    Made Param ptype attribute an actual type instead of a
    string.  String is still stored in ptype_string.

    Get rid of AddToPath() and Import() (redundant copies
    are in importer, and that seems to be the more logical
    place for them).

    Add a few comments, delete some unused code.
test/genini.py:
    A few fixes to make the environment more compatible
    with what really happens when configs are executed
    from the m5 binary.

--HG--
extra : convert_revision : 9fc8f72cd0c22ba3deada02f37484787342534f2
2005-02-22 23:53:34 -05:00
Nathan Binkert
9b1e2db811 Clean up CPU stuff and make it use params structs
cpu/base_cpu.cc:
cpu/base_cpu.hh:
    Convert the CPU stuff to use a params struct
cpu/memtest/memtest.cc:
    The memory tester is really not a cpu, so don't derive from
    BaseCPU since it just makes things a pain in the butt.  Keep
    track of max loads in the memtest class now that the base class
    doesn't do it for us.
    Don't have any default parameters.
cpu/memtest/memtest.hh:
    The memory tester is really not a cpu, so don't derive from
    BaseCPU since it just makes things a pain in the butt.  Keep
    track of max loads in the memtest class now that the base class
    doesn't do it for us.
cpu/simple_cpu/simple_cpu.cc:
    Convert to use a params struct.
    remove default parameters
cpu/simple_cpu/simple_cpu.hh:
    convert to use a params struct
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
    this isn't really a cpu.  don't derive from BaseCPU
objects/MemTest.mpy:
    we only need one max_loads parameter
sim/main.cc:
    Don't check for the number of CPUs since we may be doing something
    else going on.  If we don't have anything to simulate, the
    simulator will exit anyway.

--HG--
extra : convert_revision : 2195a34a9ec90b5414324054ceb3bab643540dd5
2005-02-19 11:46:41 -05:00
Kevin Lim
f4d3f781f1 Include errno.h to fix compile errors in gcc 3.4
sim/main.cc:
    Include errno.h

--HG--
extra : convert_revision : ff91579ae590b3c1d11f7468b71f295e6f3edd68
2005-02-17 19:22:42 -05:00
Nathan Binkert
cfe6ed7c48 Fix compile on linux
sim/main.cc:
    For some unknown reason linux's basename doesn't take a const char *

--HG--
extra : convert_revision : 30289195881e16a05429f7025abab7914a9e3eb6
2005-02-17 03:40:17 -05:00
Nathan Binkert
5de3bba758 Make code more portable.
sim/main.cc:
    basename is in libgen

--HG--
extra : convert_revision : 1af6ff2f492b4deee9e56edfa5ee6ea235cd4eb0
2005-02-17 02:50:34 -05:00
Nathan Binkert
a24016c731 Several tweaks to make binning work in any simulation
configuration so that we can always have binning on.

base/statistics.cc:
    If we're binning, and there is no bin active at the time
    we check all stats stuff, create a bin.
base/statistics.hh:
    FS_MEASURE doesn't exist anymore
base/stats/text.cc:
    don't print out bin names if there is only one bin
sim/process.cc:
    don't zero stats.  It happens automatically.
    Don't activate the context at the time it is registered,
    instead activate the first context in a startup callback.
sim/process.hh:
    Add startup callback to initialize the first exec context

--HG--
extra : convert_revision : bcb23cdb184b0abf7cecd79902f8a59b50f71fe4
2005-02-17 02:48:56 -05:00
Nathan Binkert
10ee909fbd Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/merge

--HG--
extra : convert_revision : 5d73046310a64b80a6ba3832df3b30b55532d707
2005-02-11 09:48:23 -05:00
Nathan Binkert
06a4686af9 Rework the command line paramters for python output and how
output files and the output directory are are handled.  Make
the output directory configuration via a command line parameter,
or an environment variable.

SConscript:
    Add new output file stuff
base/misc.cc:
dev/simconsole.cc:
    use new output file code
cpu/base_cpu.cc:
    use new output file code to generate output streams
dev/etherdump.cc:
    use the output file code to find the output directory
    use a real stream instead of a pointer
dev/etherdump.hh:
    use a real stream instead of a pointer
objects/Root.mpy:
    output_dir and config_output_file are not longer configured here.
sim/main.cc:
    - Completely rework the command line argument passing to deal with
    changes in python and output files.
    - Update help output to reflect changes.
    - Remove all direct support for .ini files.  They are strictly
    for intermediate representation.
    - Remove the --foo:bar=blah syntax for .ini files and add --foo.bar=blah
    syntax for python.  This will generate: foo.bar = 'blah' in the python
    script.
    - Add '-d' to set the output directory.
    - Use new output file code to access the output stream.
sim/serialize.cc:
    use the new code to find the output directory
sim/universe.cc:
    Get rid of makeOutputStream.  Use the new output file code.
    Remove output_dir and config_output_file as parameters.

--HG--
extra : convert_revision : df2f0e13d401c3a60cae1239aa1ec3511721544d
2005-02-11 09:47:41 -05:00
Nathan Binkert
60b263466e Make sure we have all values when trying to generate the ini file
sim/pyconfig/m5config.py:
    When getting all values, make sure we get the ones that are
    parameter defaults as well.

--HG--
extra : convert_revision : 2b1c4b2f27dfab17ef9df18d7e5936e4a00bb12e
2005-02-11 01:40:49 -05:00
Nathan Binkert
8efd7d9063 More fixes to the pbs stuff to make it more robust.
sim/pyconfig/SConscript:
    Embed the jobfile.py script into the binary so that we don't
    need to copy it into the Base directory every time.
test/genini.py:
    Add the util/pbs directory to the path so we can get to
    jobfile.py
    Add a -I argument to set to add to the path.
util/pbs/pbs.py:
    Create a MyPOpen class.  This is a lot like the popen2.Popen3 class
    in the python library except that my version allows redirection of
    standard in and standard out to a file instead of a pipe.
    Use this popen class to execute qsub or ssh qsub.  This was important
    for the ssh version of qsub because we need to pipe the script into
    standard in of ssh so that the script can get to the qsub command.
    (Otherwise we have a problem discovering the path.)
util/pbs/send.py:
    Tweak the script so it figures out paths in NFS correctly.
    Use the new system for running qsub.

--HG--
extra : convert_revision : 1289915ba99cec6fd464b71215c32d2197ff2824
2005-02-09 23:55:21 -05:00
Nathan Binkert
b46baf107f enable the Trace, Statistics, and Serialize param contexts.
objects/Root.mpy:
    Fake the param context stuff for now.
sim/param.cc:
    Make empty vector enums work
sim/serialize.cc:
    serialize_dir is always valid

--HG--
extra : convert_revision : c46373f0f4c70e6a2f01a81c0fa6bacab72d4c4f
2005-02-09 17:33:28 -05:00