Gabe Black
de445b5e96
Fixes to the isa description.
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src/arch/sparc/isa/base.isa:
Fix a constant.
src/arch/sparc/isa/decoder.isa:
Made carry calculation more consistent.
src/arch/sparc/isa/operands.isa:
Use the right constant.
--HG--
extra : convert_revision : 25b3a09ff20d4b8e1a95ee8a983d14ef3cfe73bb
2006-11-23 00:36:42 -05:00
Gabe Black
758c780651
Moved some constants from isa_traits.hh to the reg file headers.
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--HG--
extra : convert_revision : 378b2d9791e6282539900a2261ad2275d726b4be
2006-11-22 23:49:44 -05:00
Gabe Black
0a99750ebf
Merge zizzer:/bk/sparcfs
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into zower.eecs.umich.edu:/eecshome/m5/newmem
--HG--
extra : convert_revision : 75f3398e38e18eb1f8248e23708d7a8d8cce0fc5
2006-11-22 15:45:32 -05:00
Gabe Black
b4a31cb8b5
Make sure only real bits of pstate can be set.
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--HG--
extra : convert_revision : 8707bbed2aeb80613f86503e92b63853767adaa9
2006-11-20 18:08:50 -05:00
Gabe Black
a0287c1e2d
Set the pstate.priv bit to 1 in hyperpriveleged mode. The description in the manual of what happens during a trap says it should be 0, and other places say it doesn't matter.
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--HG--
extra : convert_revision : 9ecb6af06657e936a208cbeb8e4a18305869b949
2006-11-20 18:07:58 -05:00
Gabe Black
cd2727694d
Add in rom/rams for the nvram, hypervisor description, and partition description.
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--HG--
extra : convert_revision : a49de5fcfbea307c971964b8a68b95eb5d9a2bf4
2006-11-20 17:59:35 -05:00
Nathan Binkert
31d829d388
Implement current working directory for LiveProcesses
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--HG--
extra : convert_revision : a2d3cf29ab65c61af27d82a8c421a41a19fd5aeb
2006-11-16 12:43:11 -08:00
Gabe Black
74654ddd1f
Merge zower.eecs.umich.edu:/home/gblack/m5/newmemmemops
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into zower.eecs.umich.edu:/eecshome/m5/newmem
--HG--
extra : convert_revision : 74b2352b8f088e38cd1ecf3a8233b45df0476d93
2006-11-16 14:42:44 -05:00
Gabe Black
cd5b33b9ff
Fixes for SPARC_FS
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configs/common/FSConfig.py:
Make a SPARC system create an IO bus.
src/python/m5/objects/T1000.py:
Create a T1000 platform
src/arch/sparc/miscregfile.cc:
Initialize the strand status register to the value legion provides.
src/cpu/exetrace.cc:
Truncate an ExtMachInst to a MachInst before comparing with Legion.
--HG--
extra : convert_revision : e4189b572a5297e8362f5bd26d87b74736c8e5f1
2006-11-16 12:34:10 -05:00
Gabe Black
ac2c7967f6
Merge zizzer.eecs.umich.edu:/bk/newmem/
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into zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops
--HG--
extra : convert_revision : 966246877ac1f1e6c2675d413b0b405cccfecbeb
2006-11-14 15:23:23 -05:00
Lisa Hsu
ee777f35c2
interrupts.hh:
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make a likewise updateIntrInfo for Sparc that's blank so it doesn't fart on build
src/arch/sparc/interrupts.hh:
make a likewise updateIntrInfo for Sparc that's blank so it doesn't fart on build
--HG--
extra : convert_revision : 5f469d0cf897479b42703104cd801a8ef923fcae
2006-11-14 12:59:57 -05:00
Gabe Black
20730b790c
Set hpstate to be what I'm assuming Legion is.
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--HG--
extra : convert_revision : 0be66513cb0cff07c0c2b50c97c1ea74d52b0dc9
2006-11-14 01:30:34 -05:00
Gabe Black
c2ceaa887e
Make sure a POR doesn't clobber the value of the hpstate.
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--HG--
extra : convert_revision : 4504f08fd94792819bd4419bbd2e0ebd1d7f29e9
2006-11-14 01:29:11 -05:00
Gabe Black
6b95f24145
Fix up the disassembly a little.
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--HG--
extra : convert_revision : 7bdf68f445b79b1b5dbcdfa5fa1005c68d03724c
2006-11-14 01:28:11 -05:00
Gabe Black
fd35f02efe
Fix for CAS so that it knows about all the possible code in the constructor.
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--HG--
extra : convert_revision : 863d395f8e7c8ee2aec708ffcef842317ec9a89b
2006-11-11 07:23:13 -05:00
Ali Saidi
aa19b2e7bc
fix endian issues with condition codes
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use memcpy instead of bcopy
s/u_int32_t/uint32_t/g
fixup endian code to work with solaris
hack to make sure htole() works... Nate, have a good idea to fix this?
src/arch/sparc/faults.cc:
set the reset address to be 40 bits. Makes PC printing easier at least for now.
src/arch/sparc/isa/base.isa:
fix endian issues with condition codes
src/arch/sparc/tlb.hh:
add implemented physical addres constants
src/arch/sparc/utility.hh:
add tlb.hh to utilities
src/base/loader/raw_object.cc:
add a symbol <filename>_start to the symbol table for binaries files
src/base/remote_gdb.cc:
use memcpy instead of bcopy
src/cpu/exetrace.cc:
clean up printing a bit more
src/cpu/m5legion_interface.h:
add tons to the shared interface
src/dev/ethertap.cc:
s/u_int32_t/uint32_t/g
src/dev/ide_atareg.h:
fixup endian code to work with solaris
src/dev/pcidev.cc:
src/sim/param.hh:
hack to make sure htole() works...
--HG--
extra : convert_revision : 4579392184b40bcc1062671a953c6595c685e9b2
2006-11-10 20:17:42 -05:00
Gabe Black
6d54a77518
Elaborated on the tlb stubs so that they just set the physical address to the virtual address.
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--HG--
extra : convert_revision : 41478abc4d21d504420f6842338675c0767f7cf9
2006-11-10 15:32:15 -05:00
Gabe Black
e3d8831857
Fixed up DepTags a little. I think NumMicroIntRegs shouldn't be added to Ctrl_Base_DepTag.
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--HG--
extra : convert_revision : 2ebb3eb781441ba936c8d8bb1f42e4c0840aff2e
2006-11-10 15:30:59 -05:00
Gabe Black
d30e3b30af
Added StrandStsReg operand.
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--HG--
extra : convert_revision : 51be41716ed9fe0e99e53f2341ad5651a525055a
2006-11-10 15:29:32 -05:00
Gabe Black
13a8752c11
Put in provisions for rd, rdpr, rdhpr, wr, wrpr, and wrhpr to disassemble properly.
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--HG--
extra : convert_revision : f2cad8a5879999438ba9b05f15a91320e7a4cc4a
2006-11-10 15:28:58 -05:00
Gabe Black
7bf1c8981d
Made the annul of unconditional conditional branches behave properly, added code to read and write the strand_sts_reg, and made restored a Priv instruction.
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--HG--
extra : convert_revision : 386512215f7243d230717c369217f8d2f9ada935
2006-11-10 15:27:06 -05:00
Gabe Black
27b43b62b7
Fixed up the code that prints out registers to take into account microregisters.
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--HG--
extra : convert_revision : 6809de467e4500ce34447c0544caf0ba04af81e7
2006-11-10 15:25:52 -05:00
Gabe Black
8390e46311
Tweaked debug output.
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--HG--
extra : convert_revision : cd33b7c1ebdbefd42f18c1435b2519d06d9914a6
2006-11-10 15:25:03 -05:00
Gabe Black
cee4d1c113
Touched up faults, and made POR actually do something.
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--HG--
extra : convert_revision : 38951352edbfc423fb6767a9aac49a703578c0ac
2006-11-10 15:24:10 -05:00
Gabe Black
71dc49c785
The reset function of the MiscRegFile really resets it now. This function is called from the class's constructor.
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--HG--
extra : convert_revision : 4e7a40ffe0a9a71fd1b2b171d9c0dcac50e1a1fe
2006-11-10 04:33:41 -05:00
Gabe Black
dc6af9fbf7
Set the ASI register to be something explicitly so that simulation is deterministic.
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--HG--
extra : convert_revision : 38cd06f946fc0cc22288f71f567e77ce8fdfea99
2006-11-10 04:14:25 -05:00
Gabe Black
4aea5deccb
Fix up instructions to read and write control registers, and got rid of the control register fields which won't work on a big endian host.
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--HG--
extra : convert_revision : 1b518873b6e1a073b58cbe27642537d5ae3a604d
2006-11-10 04:02:39 -05:00
Gabe Black
232c3f1b27
Moved the Alpha MiscRegFile into it's own file, and got rid of the Alpha specific DepTag constants.
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--HG--
extra : convert_revision : e4af5e2fb2a6953f8837ad9bda309b7d6fa7abfb
2006-11-09 21:30:48 -05:00
Gabe Black
50462c15aa
Fix a couple uninitialized variables.
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--HG--
extra : convert_revision : d17d28a9520524e5f56bd79beb9b2be6ce76a22f
2006-11-09 19:24:35 -05:00
Ali Saidi
cb172d0332
Get SPARC to the point that it starts running. Add ability to load the ROM bin files, cleanup lockstep printing a bit
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Since we don't have a platform yet, you need to comment out the default responder stuff in Bus.py to make it work.
SConstruct:
Add TARGET_ISA to the list of environment variables that end up in the build_env for python
configs/common/FSConfig.py:
add a simple SPARC system to being testing with, you'll need to change makeLinuxAlphaSystem to makeSparcSystem in fs.py for now
src/SConscript:
add a raw file object, at least until we get more info about how to compile openboot properly
src/arch/sparc/system.cc:
src/arch/sparc/system.hh:
add parameters for ROM files (OBP/Reset/Hypervisor), a ROM, load files into ROM
src/base/loader/object_file.cc:
src/base/loader/object_file.hh:
add option to try raw when nothing works
src/cpu/exetrace.cc:
cleanup lockstep printing a little bit
src/cpu/m5legion_interface.h:
change the instruction to be 32 bits because it is
src/mem/physical.cc:
fix assert that doesn't work if memory starts somewhere above 0
src/python/m5/objects/BaseCPU.py:
Add if statement to choose between sparc tlbs and alpha tlbs
src/python/m5/objects/System.py:
Add a sparc system that sets the rom addresses correctly
src/python/m5/params.py:
add the ability to add Addr() together
--HG--
extra : convert_revision : bbbd8a56134f2dda2728091f740e2f7119b0c4af
2006-11-09 18:22:46 -05:00
Gabe Black
63bbc8929d
First cut at full blown SPARC faults. There are a few details that are missing.
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--HG--
extra : convert_revision : 8023db1479cb9bf99fc9edfeb521c4e5b581f895
2006-11-08 13:58:00 -05:00
Gabe Black
67b9a2ebd8
Move the check to see if you're in user mode into the isa directory.
...
--HG--
extra : convert_revision : b5b7cdf4a5e5e54228c592093516bf18d0f7dbe6
2006-11-08 13:55:48 -05:00
Gabe Black
770b575c30
Sorted faults by the trap type constant, expanded their names, added in new faults for ua2005, and commented out ones which are apparently dropped.
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--HG--
extra : convert_revision : 32bd0c3a75d7c036ad4a3cb0bc1c32e0b6cb3d87
2006-11-08 10:27:38 -05:00
Gabe Black
9375caa3f1
Fix for slightly mangled merge.
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--HG--
extra : convert_revision : 1dea04ca222dd423c3d462114bc1c65afa52825d
2006-11-08 08:25:37 -05:00
Gabe Black
b82fa633bb
Merge zeep.eecs.umich.edu:/home/gblack/m5/newmem
...
into zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops
src/arch/sparc/faults.hh:
Hand merged.
--HG--
extra : convert_revision : 1bcefe47fa98e878a0dfbcfa5869b5b171927911
2006-11-08 08:19:52 -05:00
Gabe Black
635df9ba17
Major clean up of the fault code.
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--HG--
extra : convert_revision : eb7e016a127417cbb0e1e2c733b17f82469c2f24
2006-11-08 08:12:19 -05:00
Gabe Black
f0c4d36649
The new global level is computed with min, not max.
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--HG--
extra : convert_revision : 6339c82d3655694445c3eb43e467b9aa6b4c8224
2006-11-08 04:18:15 -05:00
Gabe Black
8cb7ac0900
Changed the getReg and setReg functions so that they work like netbsd. Apparently, gdb expects to do single stepping on its own, so those functions panic for SPARC. acc still needs to be implemented.
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--HG--
extra : convert_revision : c6e98e37b8ab3d6f8d6b3cd2c961faa65b08a179
2006-11-08 02:13:47 -05:00
Gabe Black
f1a55570d3
Put the ProcessInfo and StackTrace objects into the ISA namespaces.
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--HG--
extra : convert_revision : 1626703583f02a1c9823874290462c1b6bdb6c3c
2006-11-08 00:52:04 -05:00
Gabe Black
16a012e80d
Stubs for SPARC's tlbs
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--HG--
extra : convert_revision : ba08da78693cc6f59f7358134f121f471910dbf6
2006-11-08 00:32:40 -05:00
Gabe Black
746ceb93fd
Replaced getArg with a SPARC implementation.
...
--HG--
extra : convert_revision : ba31171a81b6c46de2997de2701d35fcf8c614b7
2006-11-08 00:32:04 -05:00
Gabe Black
c693c6ba9f
Put kernel_stats back into arch.
...
--HG--
rename : src/kern/alpha/idle_event.cc => src/arch/alpha/idle_event.cc
rename : src/kern/alpha/idle_event.hh => src/arch/alpha/idle_event.hh
rename : src/kern/alpha/kernel_stats.cc => src/arch/alpha/kernel_stats.cc
rename : src/kern/alpha/kernel_stats.hh => src/arch/alpha/kernel_stats.hh
rename : src/kern/sparc/kernel_stats.hh => src/arch/sparc/kernel_stats.hh
rename : src/kern/base_kernel_stats.cc => src/kern/kernel_stats.cc
rename : src/kern/base_kernel_stats.hh => src/kern/kernel_stats.hh
extra : convert_revision : 42bd3e36b407edbd19b912c9218f4e5923a15966
2006-11-07 22:34:34 -05:00
Gabe Black
48415ad298
A dummy implementation of stacktrace.cc to clear up linker errors.
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--HG--
extra : convert_revision : ea1e54a529ad7ae4a6564dd6fb47c31fb0573adf
2006-11-07 05:44:22 -05:00
Gabe Black
7e422980e9
Arguments class for SPARC. This is basically just a copy of Alpha's
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--HG--
extra : convert_revision : 9df68973c63d5ff256d6de485e8d918c454c8ff1
2006-11-07 05:43:33 -05:00
Gabe Black
74112dec52
Added a stub implementation of fixFuncEventAddr to get past linker errors.
...
--HG--
extra : convert_revision : 24ab1789496c5fae6c0992db2d521ea02354ee90
2006-11-07 05:41:23 -05:00
Gabe Black
0c9bcf209a
The normal spill and fill faults only need to behave specially in SE.
...
--HG--
extra : convert_revision : 4d4b866699e3450b88418822fc198411ee3d831a
2006-11-07 05:40:48 -05:00
Gabe Black
bcd5099aac
Added in alot of missing source files.
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--HG--
extra : convert_revision : 335b458d195a00dac3d04e92fe9df915e660538f
2006-11-07 05:40:06 -05:00
Gabe Black
54e22bfe95
Broke remote_gdb into a base class and architecture specific derived classes.
...
--HG--
extra : convert_revision : 8c528fab56a95b8245ad0f2572d62bb556ce0dde
2006-11-07 05:39:40 -05:00
Gabe Black
02abca6b9e
Merge zizzer.eecs.umich.edu:/bk/newmem/
...
into zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops
src/SConscript:
SCCS merged
--HG--
extra : convert_revision : f130c8a2d33f58d857e5d5a02bb9698c1bceb23b
2006-11-06 19:52:32 -05:00
Gabe Black
ef1a92eb9b
Stub for SPARC interrupt handling object.
...
--HG--
extra : convert_revision : 7257e3387c01e84e5a1018a9cdcc09a79edfa934
2006-11-06 18:30:28 -05:00