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Author SHA1 Message Date
Steve Reinhardt
d4cca11bdb Very minor memtest regression stats changes from recent coherence bug fixes. 
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extra : convert_revision : 5e7f8ce91ea8f98e6503ac9e10aae68c62f9e510
 2008-01-02 15:35:09 -08:00
Steve Reinhardt
21a99af009 Update memtest results due to new deferred-target-promotion fix. 
Turned out this scenario was happening, but due to other activity,
the writable block returned by the ReadResp would get downgraded
or invalidated before the "unnecessary" ReadExResp/UpgradeResp
returned, thus avoiding triggering the assertion that led us to
catch this.

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extra : convert_revision : 19dd0dbedb0227aed29da31a868ddf5ca4c50519
 2007-11-16 20:10:33 -08:00
Ali Saidi
d114e5fae6 Regression: Update stats for cache changes. 
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extra : convert_revision : 005672e722dec00cb4c38501b5189b4eb7515ca1
 2007-08-12 19:43:55 -04:00
Steve Reinhardt
bb3f7dc83b tests: new ref outputs for new cache model 
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extra : convert_revision : 244749072f97e425c2ca1cf296f2b95f37e99eb6
 2007-08-03 18:04:30 -04:00
Steve Reinhardt
a0bf2535a8 tests: config.out no longer exists, eliminate ref copy. 
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extra : convert_revision : e2d6aa61aa2ffd1a9d16260244512eeb1fe4d5a3
 2007-08-03 18:03:59 -04:00
Nathan Binkert
1a3e668446 update for small parameter and statistics name changes 
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extra : convert_revision : d538b79986c11a462ab285c167cef45dd793da32
 2007-06-12 07:56:53 -07:00
Steve Reinhardt
0305159abf PhysicalMemory has vector of uniform ports instead of one special one. 
configs/example/memtest.py:
    PhysicalMemory has vector of uniform ports instead of one special one.
    Other updates to fix obsolete brokenness.
src/mem/physical.cc:
src/mem/physical.hh:
src/python/m5/objects/PhysicalMemory.py:
    Have vector of uniform ports instead of one special one.
src/python/swig/pyobject.cc:
    Add comment.

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extra : convert_revision : a4a764dcdcd9720bcd07c979d0ece311fc8cb4f1
 2007-05-19 00:24:34 -04:00
Ali Saidi
b85690e239 update all the regresstion tests for release 
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extra : convert_revision : 47e420b5b27e196a6e7a6424540923623bb3c4d2
 2007-05-15 19:25:35 -04:00
Kevin Lim
d70f01ba5c Update refs for new CPU frequency changes. 
tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini:
tests/quick/00.hello/ref/alpha/linux/o3-timing/config.out:
tests/quick/00.hello/ref/alpha/linux/o3-timing/m5stats.txt:
tests/quick/00.hello/ref/alpha/linux/o3-timing/stderr:
tests/quick/00.hello/ref/alpha/linux/o3-timing/stdout:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.out:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/stderr:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/stdout:
tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini:
tests/quick/00.hello/ref/alpha/linux/simple-timing/config.out:
tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt:
tests/quick/00.hello/ref/alpha/linux/simple-timing/stderr:
tests/quick/00.hello/ref/alpha/linux/simple-timing/stdout:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.out:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.out:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stderr:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.out:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/stderr:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.out:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stderr:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout:
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini:
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.out:
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/m5stats.txt:
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout:
tests/quick/50.memtest/ref/alpha/linux/memtest/config.ini:
tests/quick/50.memtest/ref/alpha/linux/memtest/config.out:
tests/quick/50.memtest/ref/alpha/linux/memtest/m5stats.txt:
tests/quick/50.memtest/ref/alpha/linux/memtest/stdout:
    Update refs

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extra : convert_revision : 8d9deb2b907843064b40e46207d9c9361941f022
 2007-04-22 14:50:37 -04:00
Steve Reinhardt
d486700149 Add short memtest run to quick regressions. 
Caveats:
- Even though memtest is ISA-independent, it will only
run for the Alpha builds, since there's no way to specify
ISA-independent reference files and I didn't want to commit
3 copies since I'm not sure we want to run it for all the
different ISAs anyway.
- Reference outputs were generated on my laptop,
so performance numbers will be low compared to zizzer.

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extra : convert_revision : 210fe4abecc19fbab0b15402c6cb4863650bab66
 2007-02-06 21:16:33 -08:00
Ron Dreslinski
6c7ab02682 Update the Memtester, commit a config file/test for it. 
src/cpu/SConscript:
    Add memtester to the compilation environment.
    Someone who knows this better should make the MemTest a cpu model parameter.

    For now attached with the build of o3 cpu.
src/cpu/memtest/memtest.cc:
src/cpu/memtest/memtest.hh:
    Update Memtest for new mem system
src/python/m5/objects/MemTest.py:
    Update memtest python description

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extra : convert_revision : d6a63e08fda0975a7abfb23814a86a0caf53e482
 2006-10-09 00:26:10 -04:00