Commit graph

346 commits

Author SHA1 Message Date
Andreas Sandberg
670fc52f18 x86: Revert [02321b16685f] which breaks m5ops on x86
Changeset 02321b16685f added m5_writefile to m5op_x86.S a second time,
which causes a compilation error on when compiling for x86. This
changeset reverts that changeset and fixes the error.
2013-03-25 13:20:15 +01:00
Matt Horsnell
e88e7d88b9 o3: fix tick used for renaming and issue with range selection
Fixes the tick used from rename:
- previously this gathered the tick on leaving rename which was always 1 less
  than the dispatch. This conflated the decode ticks when back pressure built
  in the pipeline.
- now picks up tick on entry.

Added --store_completions flag:
- will additionally display the store completion tail in the viewer.
- this highlights periods when large numbers of stores are outstanding (>16 LSQ
  blocking)

Allows selection by tick range (previously this caused an infinite loop)
2013-02-15 17:40:09 -05:00
Lluís Vilanova
25efbb5bdc util: add writefile to m5 util program for x86 2013-01-08 08:54:13 -05:00
Lluís Vilanova
807168a1de util: add m5_fail op.
Used as a command in full-system scripts helps the user ensure the benchmarks have finished successfully.

For example, one can use:

    /path/to/benchmark args || /sbin/m5 fail 1

and thus ensure gem5 will exit with an error if the benchmark fails.
2013-01-08 08:54:12 -05:00
Andreas Sandberg
35be32b7ea util: Fix stack corruption in the m5 util
The number of arguments specified when calling parse_int_args() in
do_exit() is incorrect. This leads to stack corruption since it causes
writes past the end of the ints array.
2013-01-07 16:56:37 -05:00
Andreas Sandberg
38925ff621 arm: Remove the register mapping hack used when copying TCs
In order to see all registers independent of the current CPU mode, the
ARM architecture model uses the magic MISCREG_CPSR_MODE register to
change the register mappings without actually updating the CPU
mode. This hack is no longer needed since the thread context now
provides a flat interface to the register file. This patch replaces
the CPSR_MODE hack with the flat register interface.
2013-01-07 13:05:44 -05:00
Andreas Sandberg
17b47d35e1 arch: Move the ISA object to a separate section
After making the ISA an independent SimObject, it is serialized
automatically by the Python world. Previously, this just resulted in
an empty ISA section. This patch moves the contents of the ISA to that
section and removes the explicit ISA serialization from the thread
contexts, which makes it behave like a normal SimObject during
serialization.

Note: This patch breaks checkpoint backwards compatibility! Use the
cpt_upgrader.py utility to upgrade old checkpoints to the new format.
2013-01-07 13:05:42 -05:00
Lluis Vilanova
bb4f6562ae x86, util: add m5_writefile to m5op_x86.S
Committed by: Nilay Vaish
2012-11-03 12:57:28 -05:00
James Clarkson
fdcfbda38d m5: Expose m5 pseudo-instructions to C/C++ via a static library
Updated the util/m5/Makefile.arm so that m5op_arm.S is used to create
a static library - libm5.a. Allowing users to insert m5
psuedo-instructions into their applications for fine-grained
checkpointing, switching cpus or dumping statistics. e.g.

#include <m5op.h>

void foo(){
	...
	m5_reset_stats(<delay>,<period>)
	m5_work_begin(<workid>,<threadid>);
	...
	m5_work_end(<workid>,<threadid>);
	m5_dump_stats(<delay>,<period>);
}
2012-10-09 12:58:25 +01:00
Dam Sunwoo
81406018b0 ARM: dump stats and process info on context switches
This patch enables dumping statistics and Linux process information on
context switch boundaries (__switch_to() calls) that are used for
Streamline integration (a graphical statistics viewer from ARM).
2012-11-02 11:32:01 -05:00
Andreas Hansson
9baa35ba80 Mem: Separate the host and guest views of memory backing store
This patch moves all the memory backing store operations from the
independent memory controllers to the global physical memory. The main
reason for this patch is to allow address striping in a future set of
patches, but at this point it already provides some useful
functionality in that it is now possible to change the number of
memory controllers and their address mapping in combination with
checkpointing. Thus, the host and guest view of the memory backing
store are now completely separate.

With this patch, the individual memory controllers are far simpler as
all responsibility for serializing/unserializing is moved to the
physical memory. Currently, the functionality is more or less moved
from AbstractMemory to PhysicalMemory without any major
changes. However, in a future patch the physical memory will also
resolve any ranges that are interleaved and properly assign the
backing store to the memory controllers, and keep the host memory as a
single contigous chunk per address range.

Functionality for future extensions which involve CPU virtualization
also enable the host to get pointers to the backing store.
2012-10-15 08:12:32 -04:00
Sascha Bischoff
29acf859eb Util: Added script to semantically diff two config.ini files
This script (util/diff_config.pl) takes two config.ini files and compares them.
It highlights value changes, as well as displaying which parts are unique to
a specific config.ini file. This is useful when trying to replicate an earlier
experiment and when trying to make small changes to an existing configuration.
2012-09-25 11:49:40 -05:00
Djordje Kovacevic
d060a28a29 CPU: Add abandoned instructions to O3 Pipe Viewer 2012-09-25 11:49:40 -05:00
Ali Saidi
98e1ce638f ARM: Fix the compiler and platform identification for building on ARM. 2012-09-07 14:20:53 -05:00
Ali Saidi
0ecb351c51 ARM: fix m5 op binary to properly convert 64bit operands 2012-09-07 14:20:53 -05:00
Djordje Kovacevic
124aac72b4 CPU: O3-PipeView.py doesn't display the end of timelines.
Insts' timeline that stretches over multiple lines doesn't always get printed.
2012-09-07 14:20:53 -05:00
Nathanael Premillieu
fe2faa1975 util: Fix issues with style checker. 2012-07-27 16:08:05 -04:00
Matt Evans
234fd1c4d8 Style: Make style.py's invalid warning print which file caused the infraction. 2012-06-29 11:19:06 -04:00
Ali Saidi
c06970b673 cpt: update some comments in the checkpoint migration script 2012-06-05 10:36:59 -04:00
Ali Saidi
70d7d6cc7f sim: Provide a framework for detecting out of data checkpoints and migrating them. 2012-06-05 01:23:10 -04:00
Ali Saidi
798403b689 ARM: Update m5op assembly for thumb compilation. 2012-05-10 18:04:26 -05:00
Nilay Vaish
6ea7fcc54a util/regress: Add the missing comma in the list of builds 2012-04-26 20:28:45 -05:00
Nilay Vaish
86f248e2a7 Regression: Add a test for x86 timing full system ruby simulation 2012-04-25 22:43:36 -05:00
Gabe Black
214d7af2fe m5=>gem5: Make the regression script build gem5.* instead of m5.* 2012-02-07 04:43:05 -08:00
Gabe Black
82939294d6 Regressions: Fix the regress script when "all" is used.
When the "all" test is specified, the "tests" list should have two elements in
it, "quick" and "long", not a single element "quick,long". The later would be
appropriate as the default for one of the command line options which are split
at commas, but at that point "tests" should already be a list.
2012-02-05 01:23:22 -08:00
Andreas Hansson
096a550757 Regression: Update the regress script after SE/FS merge
This patch updates the regress script to reflect the merge of the
SE/FS builds and the new structure of the test directories. It adds a
"mode" flag to the script, that defaults to both se and fs.
2012-02-02 04:51:13 -05:00
Dam Sunwoo
0ed3c84c7b util: implements "writefile" gem5 op to export file from guest to host filesystem
Usage: m5 writefile <filename>

File will be created in the gem5 output folder with the identical filename.
Implementation is largely based on the existing "readfile" functionality.
Currently does not support exporting of folders.
2012-01-31 07:46:04 -08:00
Nathan Binkert
a1b4cb58f1 hgfilesize: skip files that have been removed 2012-01-10 22:50:54 -08:00
Ali Saidi
80a6907927 ARM: Add support for initparam m5 op 2012-01-09 18:08:20 -06:00
Nathan Binkert
abf26fd828 hooks: Add a hook to limit the size of any individual file 2012-01-06 18:19:13 -05:00
Steve Reinhardt
ed61e02b24 style.py: don't die on empty files 2011-09-24 08:12:26 -07:00
Prakash Ramrakhyani
e4830ad2eb gem5ops: Implement Java JNI for gem5Ops
These ops allow gem5 ops to be called from within java programs like the following:
import jni.gem5Op;

public  class HelloWorld {

    public static void main(String[] args) {
        gem5Op gem5 = new gem5Op();
        System.out.println("Rpns0:" + gem5.rpns());
        System.out.println("Rpns1:" + gem5.rpns());
    }

    static {
        System.loadLibrary("gem5OpJni");
    }
}

When building you need to make sure classpath include gem5OpJni.jar:
javac -classpath $CLASSPATH:/path/to/gem5OpJni.jar HelloWorld.java

and when running you need to make sure both the java and library path are set:
java -classpath $CLASSPATH:/path/to/gem5OpJni.jar -Djava.library.path=/path/to/libgem5OpJni.so HelloWorld
2011-09-13 12:06:13 -05:00
Giacomo Gabrielli
69ef57fd0f O3: Create a pipeline activity viewer for the O3 CPU model.
Implemented a pipeline activity viewer as a python script (util/o3-pipeview.py)
and modified O3 code base to support an extra trace flag (O3PipeView) for
generating traces to be used as inputs by the tool.
2011-07-15 11:53:35 -05:00
Gabe Black
ec89fffb07 tracediff: Check for --debug-flags now instead of --trace-flags. 2011-07-02 22:52:26 -07:00
Ali Saidi
0b7ca66919 ARM: Cleanup m5ops usage of r0 and r1 a bit. 2011-06-17 12:20:11 -05:00
Gedare Bloom
3f1f16703d ARM: Add m5ops and related support for workbegin() and workend() to ARM ISA. 2011-06-17 12:20:10 -05:00
Nathan Binkert
0c424344fa copyright: Add code for finding all copyright blocks and create a COPYING file
The end of the COPYING file was generated with:
% python ./util/find_copyrights.py configs src system tests util

Update -C command line option to spit out COPYING file
2011-06-02 17:36:07 -07:00
Nathan Binkert
1c23bc100f style: Make the style hook work in directories other than the root. 2011-05-24 21:19:31 -07:00
Steve Reinhardt
7411f348d5 util/regress: make default action a more thorough regression
Changed the --variants option to --test-variants and added a new
--compile-variants option for variants that are only compiled
(not tested).  The former still defaults to 'opt' and the latter
defaults to 'debug,fast'.

Also changed the behavior when no tests are specified from just
compiling to running the 'quick' tests.

As a result, a plain 'util/regress' invocation will now compile
(but not test) the debug and fast builds, and compile and run the
quick regressions on the opt build.  This should be the default
set of tests that are run before committing.  Since the nightly
regressions use this same script, this will also be the new
nightly regression behavior.

Test-only regressions can still be done by setting --compile=''.
Compile-only regressions can be done by setting --test=''.
2011-05-23 14:27:20 -07:00
Ali Saidi
48f7fda706 ARM: Add vfpv3 support to native trace. 2011-05-04 20:38:26 -05:00
Gabe Black
947a5ba9a5 Util: Replace mkblankimage.sh with the new gem5img.py.
This change replaces the mkblankimage.sh script, used for creating new disk
images, with a new gem5img.py script. The new version is written in python
instead of bash, takes its parameters from command line arguments instead of
prompting for them, and finds a free loopback device dynamically instead of
hardcoding /dev/loop1. The file system used is now optionally configurable,
and the blank image is filled by a "hole" left by lseek and write instead of
literally filling it with zeroes.

The functionality of the new script is broken into subcommands "init",
"mount", "umount", "new", "partition", and "format". "init" creates a new file
of the appropriate size, partitions it, and then formats the first (and only)
new parition. "mount" attaches a new loopback device to the first parition of
the image file and mounts it to the specified mount point. "umount" unmounts
the specified mount point and identifies and cleans up the underlying loopback
device. "new", "partition", and "format" are the individual stages of "init"
but broken out so they can be run individually. That's so an image can be
reinitialized in place if needed.

Two features of the original script are being dropped. The first is the
ability to specify a source directory to copy into the new file system. The
second is the ability to specify a list of commands to run which are expected
to (but not required to) update the permissions of the files in the new fs.
Both of these seem easy enough to do manually, especially given the "mount"
and "umount" commands, that removing them would meaningfully simplify the
script without making it less useful.
2011-04-29 04:46:19 -04:00
Steve Reinhardt
41680f4bad Change default regression build from 'fast' to 'opt' 2011-04-20 13:47:42 -07:00
Nathan Binkert
ddb0f1bca0 style: fix all_regions code and remove bogus region type 2011-04-17 14:21:04 -07:00
Nathan Binkert
6402721d8e style: remove extra debugging print 2011-04-17 13:57:40 -07:00
Nathan Binkert
a2889ef16d file_types: Make code work in Python 2.4 2011-04-17 13:57:03 -07:00
Nathan Binkert
39a055645f includes: sort all includes 2011-04-15 10:44:06 -07:00
Nathan Binkert
50fda09ac7 style: add sort_includes to the style hook 2011-04-15 10:43:51 -07:00
Nathan Binkert
5add771e85 style: move style verifiers into classes 2011-04-15 10:43:47 -07:00
Nathan Binkert
2d5e1de4d9 style: add a user interface wrapper class
makes things work both with mercurial and stand alone with stdio
2011-04-15 10:43:30 -07:00
Nathan Binkert
e5ecfde222 util: python implementation of a routine that will sort includes
I didn't realize that the perl version existed when I started this,
this version has a lot more features than the previous one since it will
sort and separate python, system, and m5 headers in separate groups, it
will remove duplicates, it will also convert c headers to stl headers
2011-04-15 10:43:06 -07:00