Commit graph

11217 commits

Author SHA1 Message Date
Nilay Vaish
66941163e5 stats: updates due to recent changes. 2015-08-30 12:24:19 -05:00
Nilay Vaish
a60a93eb05 ruby: specify number of vnets for each protocol
The default value for number of virtual networks is being removed.  Each protocol
should now specify the value it needs.
2015-08-30 12:24:18 -05:00
Nilay Vaish
bf8ae288fa ruby: network: drop member m_in_use
This member indicates whether or not a particular virtual network is in use.
Instead of having a default big value for the number of virtual networks and
then checking whether a virtual network is in use, the next patch removes the
default value and the protocol configuration file would now specify the
number of virtual networks it requires.

Additionally, the patch also refactors some of the code used for computing the
virtual channel next in the round robin order.
2015-08-30 12:24:18 -05:00
Nilay Vaish
7175db4a3f ruby: garnet: mark few functions const in BaseGarnetNetwork.hh 2015-08-30 12:24:18 -05:00
Nilay Vaish
426e38af8b ruby: slicc: avoid duplicate code for function argument check
Both FuncCallExprAST and MethodCallExprAST had code for checking the arguments
with which a function is being called.  The patch does away with this
duplication.  Now the code for checking function call arguments resides in the
Func class.
2015-08-30 10:52:58 -05:00
Nilay Vaish
4727fc26f8 ruby: eliminate type uint64 and int64
These types are being replaced with uint64_t and int64_t.
2015-08-29 10:19:23 -05:00
Andreas Sandberg
e9d6bf5e35 ruby: Use the const serialize interface in RubySystem
The new serialization code (kudos to Tim Jones) moves all of the state
mangling in RubySystem to memWriteback. This makes it possible to use
the new const serialization interface.

This changeset moves the cache recorder cleanup from the checkpoint()
method to drainResume() to make checkpointing truly constant and
updates the checkpointing code to use the new interface.
2015-08-28 10:58:44 +01:00
Nilay Vaish
fc3d34a488 ruby: handle llsc accesses through CacheEntry, not CacheMemory
The sequencer takes care of llsc accesses by calling upon functions
from the CacheMemory.  This is unnecessary once the required CacheEntry object
is available.  Thus some of the calls to findTagInSet() are avoided.
2015-08-27 12:51:40 -05:00
Emilio Castillo
88b1fd82a6 cpu: quiesce pseudoinsts: Always do full quiesce
The O3CPU blocks the Fetch when it sees a quiesce instruction (IsQuiesce flag).
When the inst. is executed, a quiesce event is created to reactivate the
context and unblock the Fetch.

If the quiesceNs or quiesceCycles are called with a value of 0, the
QuiesceEvent will not be created and the Fetch stage will remain blocked.


Committed by Joel Hestness <jthestness@gmail.com>
2015-08-26 14:20:30 -05:00
Andreas Hansson
ce4f6a9020 mem: Revert requirement on packet addr/size always valid
This patch reverts part of (842f56345a42), as apparently there are
use-cases outside the main repository relying on the late setting of
the physical address.
2015-08-24 05:03:45 -04:00
Andreas Hansson
daaae3744d mem: Reflect that packet address and size are always valid
This patch simplifies the packet, and removes the possibility of
creating a packet without a valid address and/or size. Under no
circumstances are these fields set at a later point, and thus they
really have to be provided at construction time.

The patch also fixes a case there the MinorCPU creates a packet
without a valid address and size, only to later delete it.
2015-08-21 07:03:27 -04:00
Andreas Hansson
6eb434c8a2 arm, mem: Remove unused CLEAR_LL request flag
Cleaning up dead code. The CLREX stores zero directly to
MISCREG_LOCKFLAG and so the request flag is no longer needed. The
corresponding functionality in the cache tags is also removed.
2015-08-21 07:03:25 -04:00
Andreas Hansson
bda79817c8 mem: Remove unused cache squash functionality
Tidying up.
2015-08-21 07:03:24 -04:00
Andreas Hansson
ddfa96cf45 mem: Add explicit Cache subclass and make BaseCache abstract
Open up for other subclasses to BaseCache and transition to using the
explicit Cache subclass.

--HG--
rename : src/mem/cache/BaseCache.py => src/mem/cache/Cache.py
2015-08-21 07:03:23 -04:00
Andreas Hansson
d71a0d790d ruby: Move Rubys cache class from Cache.py to RubyCache.py
This patch serves to avoid name clashes with the classic cache. For
some reason having two 'SimObject' files with the same name creates
problems.

--HG--
rename : src/mem/ruby/structures/Cache.py => src/mem/ruby/structures/RubyCache.py
2015-08-21 07:03:21 -04:00
Andreas Hansson
1bf389a2bf mem: Move cache_impl.hh to cache.cc
There is no longer any need to keep the implementation in a header.
2015-08-21 07:03:20 -04:00
Andreas Hansson
ae06e9a5c6 cpu: Move invldPid constant from Request to BaseCPU
A more natural home for this constant.
2015-08-21 07:03:14 -04:00
Nilay Vaish
2f44dada68 ruby: reverts to changeset: bf82f1f7b040 2015-08-19 10:02:01 -05:00
Nilay Vaish
2d9f3f8582 ruby: add accessor functions to SLICC def of MachineID 2015-08-14 19:28:44 -05:00
Nilay Vaish
62dcbe3d95 ruby: simple network: refactor code
Drops an unused variable and marks three variables as const.
2015-08-14 19:28:44 -05:00
Nilay Vaish
d0cf41300b ruby: profiler: provide the number of vnets through ruby system
The aim is to ultimately do away with the static function
Network::getNumberOfVirtualNetworks().
2015-08-14 19:28:44 -05:00
Nilay Vaish
e63c120d0d ruby: directory memory: drop unused variable. 2015-08-14 19:28:44 -05:00
Nilay Vaish
8114c7ff2c ruby: slicc: remove a stray line in StateMachine.py 2015-08-14 19:28:44 -05:00
Nilay Vaish
85506f1c21 ruby: garnet: flexible: refactor flit 2015-08-14 19:28:44 -05:00
Nilay Vaish
ae87d68551 ruby: DataBlock: adds a comment 2015-08-14 19:28:44 -05:00
Nilay Vaish
d660b3145b ruby: remove random seed
We no longer use the C library based random number generator: random().
Instead we use the C++ library provided rng.  So setting the random seed for
the RubySystem class has no effect.  Hence the variable and the corresponding
option are being dropped.
2015-08-14 19:28:44 -05:00
Nilay Vaish
ca368765a1 ruby: SubBlock: refactor code 2015-08-14 19:28:44 -05:00
Nilay Vaish
514f18cdda ruby: cache recorder: move check on block size to RubySystem. 2015-08-14 19:28:44 -05:00
Nilay Vaish
3a726752c1 ruby: abstract controller: mark some variables as const 2015-08-14 19:28:44 -05:00
Nilay Vaish
3230a0b89f ruby: simple network: store Switch* in PerfectSwitch and Throttle 2015-08-14 19:28:44 -05:00
Nilay Vaish
cb133b5f2c ruby: remove unused functionalRead() function. 2015-08-14 19:28:44 -05:00
Nilay Vaish
5f1d1ce5d4 ruby: perfect switch: refactor code
Refactored the code in operateVnet(), moved partly to a new function
operateMessageBuffer().
2015-08-14 19:28:44 -05:00
Nilay Vaish
a706b6259a ruby: cache memory: drop {try,test}CacheAccess functions 2015-08-14 19:28:43 -05:00
Nilay Vaish
5060e572ca ruby: call setMRU from L1 controllers, not from sequencer
Currently the sequencer calls the function setMRU that updates the replacement
policy structures with the first level caches.  While functionally this is
correct, the problem is that this requires calling findTagInSet() which is an
expensive function.  This patch removes the calls to setMRU from the sequencer.
All controllers should now update the replacement policy on their own.

The set and the way index for a given cache entry can be found within the
AbstractCacheEntry structure. Use these indicies to update the replacement
policy structures.
2015-08-14 19:28:43 -05:00
Nilay Vaish
b815221718 ruby: adds set and way indices to AbstractCacheEntry 2015-08-14 19:28:43 -05:00
Nilay Vaish
a6f3f38f2c ruby: eliminate type uint64 and int64
These types are being replaced with uint64_t and int64_t.
2015-08-14 19:28:43 -05:00
Nilay Vaish
9648c05db1 ruby: slicc: use default argument value
Before this patch, while one could declare / define a function with default
argument values, but the actual function call would require one to specify
all the arguments.  This patch changes the check for  function arguments.
Now a function call needs to specify arguments that are at least as much as
those with default values and at most the total number of arguments taken
as input by the function.
2015-08-14 19:28:43 -05:00
Nilay Vaish
7fc725fdb5 ruby: slicc: avoid duplicate code for function argument check
Both FuncCallExprAST and MethodCallExprAST had code for checking the arguments
with which a function is being called.  The patch does away with this
duplication.  Now the code for checking function call arguments resides in the
Func class.
2015-08-14 19:28:43 -05:00
Nilay Vaish
f391cee5e1 ruby: drop the [] notation for lookup function.
This is in preparation for adding a second arugment to the lookup
function for the CacheMemory class.  The change to *.sm files was made using
the following sed command:

sed -i 's/\[\([0-9A-Za-z._()]*\)\]/.lookup(\1)/' src/mem/protocol/*.sm
2015-08-14 19:28:43 -05:00
Nilay Vaish
1a3e8a3370 ruby: handle llsc accesses through CacheEntry, not CacheMemory
The sequencer takes care of llsc accesses by calling upon functions
from the CacheMemory.  This is unnecessary once the required CacheEntry object
is available.  Thus some of the calls to findTagInSet() are avoided.
2015-08-14 19:28:42 -05:00
Nilay Vaish
d383a08f16 stats: updates to ruby fs regression test
Changes due to recent patches: fc1e41e88fd3, 882ce080c9f7, e8a6637afa4c, and
e6e3b7097810 by Joel Hestness.
2015-08-14 19:26:43 -05:00
Nilay Vaish
91a84c5b3c ruby: replace Address by Addr
This patch eliminates the type Address defined by the ruby memory system.
This memory system would now use the type Addr that is in use by the
rest of the system.
2015-08-14 12:04:51 -05:00
Nilay Vaish
9ea5d9cad9 ruby: rename variables Addr to addr
Avoid clash between type Addr and variable name Addr.
2015-08-14 12:04:47 -05:00
Joel Hestness
93c173a95e stats: Bump for MessageBuffer, cache latency changes 2015-08-14 01:19:34 -05:00
Joel Hestness
905c0b347c ruby: Protocol changes for SimObject MessageBuffers 2015-08-14 00:19:45 -05:00
Joel Hestness
581bae9ecb ruby: Expose MessageBuffers as SimObjects
Expose MessageBuffers from SLICC controllers as SimObjects that can be
manipulated in Python. This patch has numerous benefits:
1) First and foremost, it exposes MessageBuffers as SimObjects that can be
manipulated in Python code. This allows parameters to be set and checked in
Python code to avoid obfuscating parameters within protocol files. Further, now
as SimObjects, MessageBuffer parameters are printed to config output files as a
way to track parameters across simulations (e.g. buffer sizes)

2) Cleans up special-case code for responseFromMemory buffers, and aligns their
instantiation and use with mandatoryQueue buffers. These two special buffers
are the only MessageBuffers that are exposed to components outside of SLICC
controllers, and they're both slave ends of these buffers. They should be
exposed outside of SLICC in the same way, and this patch does it.

3) Distinguishes buffer-specific parameters from buffer-to-network parameters.
Specifically, buffer size, randomization, ordering, recycle latency, and ports
are all specific to a MessageBuffer, while the virtual network ID and type are
intrinsics of how the buffer is connected to network ports. The former are
specified in the Python object, while the latter are specified in the
controller *.sm files. Unlike buffer-specific parameters, which may need to
change depending on the simulated system structure, buffer-to-network
parameters can be specified statically for most or all different simulated
systems.
2015-08-14 00:19:44 -05:00
Joel Hestness
bf06911b3f ruby: Change PerfectCacheMemory::lookup to return pointer
CacheMemory and DirectoryMemory lookup functions return pointers to entries
stored in the memory. Bring PerfectCacheMemory in line with this convention,
and clean up SLICC code generation that was in place solely to handle
references like that which was returned by PerfectCacheMemory::lookup.
2015-08-14 00:19:39 -05:00
Joel Hestness
9567c839fe ruby: Remove the RubyCache/CacheMemory latency
The RubyCache (CacheMemory) latency parameter is only used for top-level caches
instantiated for Ruby coherence protocols. However, the top-level cache hit
latency is assessed by the Sequencer as accesses flow through to the cache
hierarchy. Further, protocol state machines should be enforcing these cache hit
latencies, but RubyCaches do not expose their latency to any existng state
machines through the SLICC/C++ interface. Thus, the RubyCache latency parameter
is superfluous for all caches. This is confusing for users.

As a step toward pushing L0/L1 cache hit latency into the top-level cache
controllers, move their latencies out of the RubyCache declarations and over to
their Sequencers. Eventually, these Sequencer parameters should be exposed as
parameters to the top-level cache controllers, which should assess the latency.
NOTE: Assessing these latencies in the cache controllers will require modifying
each to eliminate instantaneous Ruby hit callbacks in transitions that finish
accesses, which is likely a large undertaking.
2015-08-14 00:19:37 -05:00
Nilay Vaish
c58bee829f sim: clocked object: function for converting cycles to ticks. 2015-08-11 11:39:23 -05:00
Nilay Vaish
759fe30d9f ruby: drop some redundant includes 2015-08-11 11:39:23 -05:00