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Author SHA1 Message Date
Gabe Black 079dd45417 Merge 141.212.106.238:/home/gblack/m5/newmemmemops 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem

--HG--
extra : convert_revision : 8e805b9bbd5c64c2e5951384b3c6ef712062d08c
 2006-11-14 15:14:28 -05:00
Gabe Black bc4d15ddd1 Create a stub t1000 platform. 
--HG--
extra : convert_revision : 7e27b23b66c743b4625a1dd9d8d6ba61bff45168
 2006-11-14 15:14:27 -05:00
Gabe Black 7632198a6e Merge 141.212.106.238:/home/gblack/m5/newmemmemops 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem

--HG--
extra : convert_revision : cda58e6e63f2f909b85a510fb76d35d49d8042b9
 2006-11-14 01:31:37 -05:00
Gabe Black 20730b790c Set hpstate to be what I'm assuming Legion is. 
--HG--
extra : convert_revision : 0be66513cb0cff07c0c2b50c97c1ea74d52b0dc9
 2006-11-14 01:30:34 -05:00
Gabe Black c2ceaa887e Make sure a POR doesn't clobber the value of the hpstate. 
--HG--
extra : convert_revision : 4504f08fd94792819bd4419bbd2e0ebd1d7f29e9
 2006-11-14 01:29:11 -05:00
Gabe Black 6b95f24145 Fix up the disassembly a little. 
--HG--
extra : convert_revision : 7bdf68f445b79b1b5dbcdfa5fa1005c68d03724c
 2006-11-14 01:28:11 -05:00
Gabe Black 8d234a4bc5 Merge 141.212.106.238:/home/gblack/m5/newmemmemops 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem

--HG--
extra : convert_revision : 753831a9f6f79d07e6ee122ab894e24161d2e722
 2006-11-14 01:23:59 -05:00
Lisa Hsu 69623a892e main.i: 
swig still thought the default arg for simulate() was -1, make it MaxTick

--HG--
extra : convert_revision : 2bcbef7e5e5d28cf55645fdc53d43e3953b1a11c
 2006-11-13 16:18:47 -05:00
Nathan Binkert afed455e77 Expose debugBreakCycle through swig and get rid of 
the Debug param context

--HG--
extra : convert_revision : 40e9dcfa9faedbe0c90a43f908f20a7c14ded6a4
 2006-11-13 12:20:08 -08:00
Nathan Binkert 2370e638ce Clean up comment 
--HG--
extra : convert_revision : 75c6415c49305e2f8cf7f833c66a46a4dee503ea
 2006-11-13 12:18:36 -08:00
Ali Saidi ef5b842247 Parse CC/CXX early so that we use the correct compiler for testing dependencies/versions/libraries/etc 
--HG--
extra : convert_revision : b34ee03e44b35df30b746c4c570316db75d6ffe5
 2006-11-13 13:26:36 -05:00
Kevin Lim fd213f7270 Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix

--HG--
extra : convert_revision : 6ef2249bfa3f7149830efdb42a313422090da7d7
 2006-11-13 02:49:13 -05:00
Kevin Lim 41a9196f60 More interrupt reworking. 
--HG--
extra : convert_revision : 40dfbb72c4e418c54e909c54dad5fe6ef7017cb4
 2006-11-13 02:49:03 -05:00
Steve Reinhardt 51d8c59ef8 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  vm1.(none):/home/stever/bk/newmem-head

--HG--
extra : convert_revision : faab7569deefde94c20133b2f70a8567bcaa2960
 2006-11-12 22:04:00 -08:00
Steve Reinhardt 0f633c5fee Make setRegWithEffect do something in SE mode. 
--HG--
extra : convert_revision : 88fdaa403fe6d083f8c8fc064cb0d0d6a8b8daf8
 2006-11-12 22:03:42 -08:00
Kevin Lim 4c21fab575 Change warn to DPRINTF. 
--HG--
extra : convert_revision : 746bdf92334d220158eb0eb6bf113b4dcedbb354
 2006-11-13 00:26:38 -05:00
Kevin Lim b0db4e4dcf Update output refs. Some FS statistics will change (namely the ITB) due to the recent TLB changes. Now PAL mode accesses are counted as hits in the TLB. 
tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini:
tests/quick/00.hello/ref/alpha/linux/o3-timing/config.out:
tests/quick/00.hello/ref/alpha/linux/o3-timing/stderr:
tests/quick/00.hello/ref/alpha/linux/o3-timing/stdout:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.out:
tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini:
tests/quick/00.hello/ref/alpha/linux/simple-timing/config.out:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.out:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/stderr:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.out:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.out:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.out:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stderr:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt:
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini:
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.out:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out:
    Update refs.

--HG--
extra : convert_revision : 6798c5753d4d7bd7b5667d59cf564012b781ce8a
 2006-11-13 00:24:22 -05:00
Kevin Lim 9e53eed88a Fix typo. 
--HG--
extra : convert_revision : 05db10e20d33302fe830d5759b8881b1233aca87
 2006-11-12 23:31:29 -05:00
Kevin Lim 8a0cbbe27b Fix for regression failure. 
src/cpu/o3/fetch_impl.hh:
    Fetch needs to make sure it isn't waiting on an Icache access.

--HG--
extra : convert_revision : b53eb58b9e5a00bdb394134586d1f84f84d1c6e1
 2006-11-12 23:30:09 -05:00
Gabe Black 14cb2264c8 Merge zizzer.eecs.umich.edu:/bk/newmem/ 
into  zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops

--HG--
extra : convert_revision : eed3b6a650635d43fe75c2158c8417647af640d9
 2006-11-12 22:36:22 -05:00
Kevin Lim 3052632b68 Merge ktlim@zamp:./local/clean/tmp/test-regress 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix

--HG--
extra : convert_revision : b98236507bb8996ce605b48b5a5a6a7aac297dc5
 2006-11-12 21:57:58 -05:00
Kevin Lim 437436a2f7 Fix for non-FS compile. 
--HG--
extra : convert_revision : 661b412b0ae670181b89cb7dbc5e9d813804aa7a
 2006-11-12 21:49:51 -05:00
Nathan Binkert d2d4431752 Create a module called internal where swigged stuff goes. 
Rename cc_main to internal.main

--HG--
extra : convert_revision : e938005f600fbf8a43435e29426a948f4501f072
 2006-11-12 18:49:16 -08:00
Kevin Lim 12e26c68c3 Updates to support new interrupt processing and removal of PcPAL. 
src/arch/alpha/interrupts.hh:
    No need for this now that the ThreadContext is being used to set these IPRs in interrupts.
    Also split up the interrupt checking from the updating of the IPL and interrupt summary.
src/arch/alpha/tlb.cc:
    Check the PC for whether or not it's in PAL mode, not the addr.
src/cpu/o3/alpha/cpu.hh:
    Split up getting the interrupt from actually processing the interrupt.
src/cpu/o3/alpha/cpu_impl.hh:
    Splut up the processing of interrupts.
src/cpu/o3/commit_impl.hh:
    Update for ISA-oriented interrupt changes.
src/cpu/o3/fetch_impl.hh:
    Fix broken if statement from PcPAL updates, and properly populate the request fields.

    Also more debugging output.
src/cpu/ozone/cpu_impl.hh:
    Updates for ISA-oriented interrupt stuff.
src/cpu/ozone/front_end_impl.hh:
    Populate request fields properly.
src/cpu/simple/base.cc:
    Update for interrupt stuff.

--HG--
extra : convert_revision : 9bac3f9ffed4948ee788699b2fa8419bc1ca647c
 2006-11-12 20:15:30 -05:00
Ron Dreslinski 6098f57b08 Update for maxtick in splash2/memtest configs 
configs/example/memtest.py:
configs/splash2/run.py:
    Update for maxtick

--HG--
extra : convert_revision : 94106625be1ebc2b614db16720a4861e47222c0b
 2006-11-12 11:42:07 -05:00
Ron Dreslinski fa41791a57 Update refs for functional access fixes 
--HG--
extra : convert_revision : aa34e0e7254daf20ecb7c14d430f08927a8fb9ca
 2006-11-12 11:07:34 -05:00
Ron Dreslinski 1d5d9c83b4 Merge zizzer:/bk/newmem 
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest

--HG--
extra : convert_revision : 498304c24435437f8f1942bb8aeafe69ba22a089
 2006-11-12 10:41:18 -05:00
Ron Dreslinski 5edfaefc78 Physical memory overrides the tport version of recvFunctional, need to do the 
check here for responses that match as well

--HG--
extra : convert_revision : 69c3628a381a9da885fab0272abf40c3411a5f0f
 2006-11-12 09:30:12 -05:00
Ron Dreslinski a200bccc20 Handle packets being deleted by lower level properly. 
Fixes for Mem Leak associated with Writebacks.

src/mem/cache/miss/mshr_queue.cc:
    Fixes for Mem Leak associated with Writebacks. (Double Delete removed)

--HG--
extra : convert_revision : 7a52ddd57da35995896f2c4438a58aa53f762416
 2006-11-12 09:06:15 -05:00
Ron Dreslinski 29cefcbf13 Don't insert reponses into the list more than once 
If you get inserted in the front, reschedule the event

--HG--
extra : convert_revision : eccbacf5ec85600e5b68eb554fee2c0e2b65e965
 2006-11-12 07:16:34 -05:00
Ron Dreslinski 11accacf7c Move code before a early return to make sure it is executed on all paths 
--HG--
extra : convert_revision : cfdd5b6911422fbb733677c43d027aa4407fbc85
 2006-11-12 06:44:05 -05:00
Ron Dreslinski b22d390721 Yet another small bug in mem system related to flow control 
src/mem/cache/cache_impl.hh:
    When upgrades change to readEx make sure to allocate the block
    Fix dprintf

--HG--
extra : convert_revision : 8700a7e47ad042c8708302620b907849c4bfdded
 2006-11-12 06:36:33 -05:00
Ron Dreslinski c577665040 Fix functional access errors related to delayed respnoses in cachePort 
src/mem/cache/base_cache.cc:
    On a delayed response, be sure to call the fixPacket wrapper to toggle hasData flag.
src/mem/packet.cc:
src/mem/packet.hh:
    Create a wrapper to toggle the hasData flag on delayed responses

--HG--
extra : convert_revision : 1ced8d4e3dc12a059fb7636d59e429cd3dd46901
 2006-11-12 06:35:39 -05:00
Nathan Binkert 8354cfc715 Fix Typo 
--HG--
extra : convert_revision : 4f5b610f364876b29ad0e04f1757e4b42d1f2bd8
 2006-11-11 23:57:20 -08:00
Nathan Binkert 3f280bb2e8 set TRACING_ON one way or another explicitly in the 
SConscript file instead of basing it on DEBUG

--HG--
extra : convert_revision : 6e6807cc4350ef92baeaaabfeb3dc0bb785128ba
 2006-11-11 20:46:56 -08:00
Nathan Binkert aec0afd59f Delete the actual PseudoInst file 
--HG--
extra : convert_revision : 54e3dfbc1022fcc663a9c0e67f6434395d1fe33c
 2006-11-11 17:30:37 -08:00
Nathan Binkert b16e559177 Get rid of the ParamContext for pseudo instructions and move 
the parameters to the BaseCPU object.

--HG--
extra : convert_revision : 557292cffb40918133647b0c9ac653ee5112df2e
 2006-11-11 17:22:10 -08:00
Gabe Black fd35f02efe Fix for CAS so that it knows about all the possible code in the constructor. 
--HG--
extra : convert_revision : 863d395f8e7c8ee2aec708ffcef842317ec9a89b
 2006-11-11 07:23:13 -05:00
Gabe Black cc77304676 The Lock_Flag_DepTag went away earlier, and using TheISA gives the false impression that this code is ISA independent. 
--HG--
extra : convert_revision : 67d9e51702efbe5f5244268e3753328a6cf1a1d5
 2006-11-11 07:16:24 -05:00
Gabe Black 239a89e713 Certain header files should only be used in FS. 
src/arch/alpha/faults.hh:
    Only use pagetable.hh in FS
src/arch/alpha/pagetable.hh:
    pagetable.hh should only be included in FS, so protecting it internally should be unnecessary.
src/cpu/exetrace.cc:
    Only use tlb.hh in FS

--HG--
extra : convert_revision : 91ea61f2e7970e7146b6d407ee250fcb20cd4d48
 2006-11-11 07:15:16 -05:00
Ron Dreslinski f876bc2bf0 More fixes for functional accesses. It now makes the writeback memory leak to crash all configs. 
Working on that now.

src/mem/cache/base_cache.cc:
    Keep a list of the responders so we can search them on functional accesses.
src/mem/cache/base_cache.hh:
    Properly put things on a list for responses so we can search the list.
    Also, be sure to check the outgoing ports lists on a functional access (factor some common code out there)
src/mem/cache/cache_impl.hh:
    Properly return when the first read hit on a functional access.
    Make sure to call to check the other ports list of packets before forwarding it out.

--HG--
extra : convert_revision : 1d21cb55ff29c15716617efc48441329707c088a
 2006-11-10 22:45:50 -05:00
Ron Dreslinski 9a6e896d3b Big fix for functional access, where we forgot to copy the last byte on write intersections. 
src/mem/packet.cc:
    Make sure to copy the whole data (we were one byte short)
src/mem/tport.cc:
    Fix for the proper semantics of fixPacket

--HG--
extra : convert_revision : 215e05db9099d427afd4994f5b29079354c847d8
 2006-11-10 22:41:21 -05:00
Ali Saidi 77254e513d Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : e4f9bb663099662a94c5522e6b4955c2a83bac8d
 2006-11-10 20:17:54 -05:00
Ali Saidi aa19b2e7bc fix endian issues with condition codes 
use memcpy instead of bcopy
s/u_int32_t/uint32_t/g
fixup endian code to work with solaris
hack to make sure htole() works... Nate, have a good idea to fix this?

src/arch/sparc/faults.cc:
    set the reset address to be 40 bits. Makes PC printing easier at least for now.
src/arch/sparc/isa/base.isa:
    fix endian issues with condition codes
src/arch/sparc/tlb.hh:
    add implemented physical addres constants
src/arch/sparc/utility.hh:
    add tlb.hh to utilities
src/base/loader/raw_object.cc:
    add a symbol <filename>_start to the symbol table for binaries files
src/base/remote_gdb.cc:
    use memcpy instead of bcopy
src/cpu/exetrace.cc:
    clean up printing a bit more
src/cpu/m5legion_interface.h:
    add tons to the shared interface
src/dev/ethertap.cc:
    s/u_int32_t/uint32_t/g
src/dev/ide_atareg.h:
    fixup endian code to work with solaris
src/dev/pcidev.cc:
src/sim/param.hh:
    hack to make sure htole() works...

--HG--
extra : convert_revision : 4579392184b40bcc1062671a953c6595c685e9b2
 2006-11-10 20:17:42 -05:00
Kevin Lim e89eaf8b80 Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem

--HG--
extra : convert_revision : 35e2ff6ce62281299ad98dca64ba04a3a8a6757c
 2006-11-10 15:35:06 -05:00
Gabe Black 6d54a77518 Elaborated on the tlb stubs so that they just set the physical address to the virtual address. 
--HG--
extra : convert_revision : 41478abc4d21d504420f6842338675c0767f7cf9
 2006-11-10 15:32:15 -05:00
Gabe Black e3d8831857 Fixed up DepTags a little. I think NumMicroIntRegs shouldn't be added to Ctrl_Base_DepTag. 
--HG--
extra : convert_revision : 2ebb3eb781441ba936c8d8bb1f42e4c0840aff2e
 2006-11-10 15:30:59 -05:00
Gabe Black d30e3b30af Added StrandStsReg operand. 
--HG--
extra : convert_revision : 51be41716ed9fe0e99e53f2341ad5651a525055a
 2006-11-10 15:29:32 -05:00
Gabe Black 13a8752c11 Put in provisions for rd, rdpr, rdhpr, wr, wrpr, and wrhpr to disassemble properly. 
--HG--
extra : convert_revision : f2cad8a5879999438ba9b05f15a91320e7a4cc4a
 2006-11-10 15:28:58 -05:00
Gabe Black 7bf1c8981d Made the annul of unconditional conditional branches behave properly, added code to read and write the strand_sts_reg, and made restored a Priv instruction. 
--HG--
extra : convert_revision : 386512215f7243d230717c369217f8d2f9ada935
 2006-11-10 15:27:06 -05:00