2013-02-15 23:40:08 +01:00
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# Copyright (c) 2012 ARM Limited
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# All rights reserved
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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2008-02-14 22:13:50 +01:00
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# Copyright (c) 2006-2008 The Regents of The University of Michigan
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2010-08-17 14:49:05 +02:00
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# Copyright (c) 2010 Advanced Micro Devices, Inc.
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2006-10-27 22:32:26 +02:00
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Lisa Hsu
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2013-01-08 14:54:12 +01:00
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import sys
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2006-10-27 22:32:26 +02:00
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from os import getcwd
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2006-11-08 20:01:23 +01:00
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from os.path import join as joinpath
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2009-09-23 00:24:16 +02:00
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2013-02-15 23:40:08 +01:00
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import CpuConfig
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2013-04-22 19:20:33 +02:00
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import MemConfig
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2013-02-15 23:40:08 +01:00
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2006-10-27 22:32:26 +02:00
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import m5
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2009-09-23 00:24:16 +02:00
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from m5.defines import buildEnv
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2006-10-27 22:32:26 +02:00
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from m5.objects import *
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2009-09-23 00:24:16 +02:00
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from m5.util import *
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addToPath('../common')
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2006-10-27 22:32:26 +02:00
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2012-08-07 01:14:31 +02:00
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def getCPUClass(cpu_type):
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2013-02-15 23:40:08 +01:00
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"""Returns the required cpu class and the mode of operation."""
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cls = CpuConfig.get(cpu_type)
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return cls, cls.memory_mode()
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2012-08-07 01:14:31 +02:00
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2006-11-02 01:25:09 +01:00
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def setCPUClass(options):
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2012-08-07 01:14:31 +02:00
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"""Returns two cpu classes and the initial mode of operation.
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2006-11-02 01:25:09 +01:00
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2012-08-07 01:14:31 +02:00
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Restoring from a checkpoint or fast forwarding through a benchmark
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can be done using one type of cpu, and then the actual
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simulation can be carried out using another type. This function
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returns these two types of cpus and the initial mode of operation
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depending on the options provided.
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"""
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TmpClass, test_mem_mode = getCPUClass(options.cpu_type)
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2006-11-02 01:25:09 +01:00
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CPUClass = None
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2013-02-15 23:40:08 +01:00
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if TmpClass.require_caches() and \
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not options.caches and not options.ruby:
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fatal("%s must be used with caches" % options.cpu_type)
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2012-01-11 20:50:18 +01:00
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2012-08-07 01:14:31 +02:00
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if options.checkpoint_restore != None:
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if options.restore_with_cpu != options.cpu_type:
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2006-11-02 01:25:09 +01:00
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CPUClass = TmpClass
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2012-08-07 01:14:31 +02:00
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TmpClass, test_mem_mode = getCPUClass(options.restore_with_cpu)
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elif options.fast_forward:
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CPUClass = TmpClass
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TmpClass = AtomicSimpleCPU
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test_mem_mode = 'atomic'
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2006-11-02 01:25:09 +01:00
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return (TmpClass, test_mem_mode, CPUClass)
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2013-04-22 19:20:33 +02:00
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def setMemClass(options):
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"""Returns a memory controller class."""
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return MemConfig.get(options.mem_type)
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2012-03-28 01:23:21 +02:00
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def setWorkCountOptions(system, options):
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if options.work_item_id != None:
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system.work_item_id = options.work_item_id
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if options.work_begin_cpu_id_exit != None:
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system.work_begin_cpu_id_exit = options.work_begin_cpu_id_exit
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if options.work_end_exit_count != None:
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system.work_end_exit_count = options.work_end_exit_count
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if options.work_end_checkpoint_count != None:
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system.work_end_ckpt_count = options.work_end_checkpoint_count
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if options.work_begin_exit_count != None:
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system.work_begin_exit_count = options.work_begin_exit_count
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if options.work_begin_checkpoint_count != None:
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system.work_begin_ckpt_count = options.work_begin_checkpoint_count
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if options.work_cpus_checkpoint_count != None:
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system.work_cpus_ckpt_count = options.work_cpus_checkpoint_count
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2006-11-02 01:25:09 +01:00
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2012-08-07 01:14:32 +02:00
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def findCptDir(options, maxtick, cptdir, testsys):
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"""Figures out the directory from which the checkpointed state is read.
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There are two different ways in which the directories holding checkpoints
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can be named --
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1. cpt.<benchmark name>.<instruction count when the checkpoint was taken>
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2. cpt.<some number, usually the tick value when the checkpoint was taken>
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This function parses through the options to figure out which one of the
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above should be used for selecting the checkpoint, and then figures out
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the appropriate directory.
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It also sets the value of the maximum tick value till which the simulation
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will run.
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"""
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from os.path import isdir, exists
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from os import listdir
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import re
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if not isdir(cptdir):
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fatal("checkpoint dir %s does not exist!", cptdir)
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if options.at_instruction or options.simpoint:
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inst = options.checkpoint_restore
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if options.simpoint:
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# assume workload 0 has the simpoint
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if testsys.cpu[0].workload[0].simpoint == 0:
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fatal('Unable to find simpoint')
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inst += int(testsys.cpu[0].workload[0].simpoint)
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checkpoint_dir = joinpath(cptdir, "cpt.%s.%s" % (options.bench, inst))
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if not exists(checkpoint_dir):
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fatal("Unable to find checkpoint directory %s", checkpoint_dir)
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else:
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dirs = listdir(cptdir)
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expr = re.compile('cpt\.([0-9]*)')
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cpts = []
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for dir in dirs:
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match = expr.match(dir)
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if match:
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cpts.append(match.group(1))
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cpts.sort(lambda a,b: cmp(long(a), long(b)))
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cpt_num = options.checkpoint_restore
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if cpt_num > len(cpts):
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fatal('Checkpoint %d not found', cpt_num)
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maxtick = maxtick - int(cpts[cpt_num - 1])
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checkpoint_dir = joinpath(cptdir, "cpt.%s" % cpts[cpt_num - 1])
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return maxtick, checkpoint_dir
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2012-09-11 20:14:51 +02:00
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def scriptCheckpoints(options, maxtick, cptdir):
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2012-08-07 01:14:32 +02:00
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if options.at_instruction or options.simpoint:
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checkpoint_inst = int(options.take_checkpoints)
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# maintain correct offset if we restored from some instruction
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if options.checkpoint_restore != None:
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checkpoint_inst += options.checkpoint_restore
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print "Creating checkpoint at inst:%d" % (checkpoint_inst)
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exit_event = m5.simulate()
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exit_cause = exit_event.getCause()
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print "exit cause = %s" % exit_cause
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# skip checkpoint instructions should they exist
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while exit_cause == "checkpoint":
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exit_event = m5.simulate()
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exit_cause = exit_event.getCause()
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if exit_cause == "a thread reached the max instruction count":
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m5.checkpoint(joinpath(cptdir, "cpt.%s.%d" % \
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(options.bench, checkpoint_inst)))
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print "Checkpoint written."
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else:
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when, period = options.take_checkpoints.split(",", 1)
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when = int(when)
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period = int(period)
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2012-08-21 11:48:52 +02:00
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num_checkpoints = 0
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2012-08-07 01:14:32 +02:00
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2013-04-09 23:25:30 +02:00
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exit_event = m5.simulate(when - m5.curTick())
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2012-08-07 01:14:32 +02:00
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exit_cause = exit_event.getCause()
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while exit_cause == "checkpoint":
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exit_event = m5.simulate(when - m5.curTick())
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exit_cause = exit_event.getCause()
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if exit_cause == "simulate() limit reached":
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m5.checkpoint(joinpath(cptdir, "cpt.%d"))
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num_checkpoints += 1
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sim_ticks = when
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max_checkpoints = options.max_checkpoints
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while num_checkpoints < max_checkpoints and \
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exit_cause == "simulate() limit reached":
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if (sim_ticks + period) > maxtick:
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exit_event = m5.simulate(maxtick - sim_ticks)
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exit_cause = exit_event.getCause()
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break
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else:
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exit_event = m5.simulate(period)
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exit_cause = exit_event.getCause()
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sim_ticks += period
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while exit_event.getCause() == "checkpoint":
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exit_event = m5.simulate(sim_ticks - m5.curTick())
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if exit_event.getCause() == "simulate() limit reached":
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m5.checkpoint(joinpath(cptdir, "cpt.%d"))
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num_checkpoints += 1
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2013-03-22 23:31:24 +01:00
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return exit_event
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2012-08-07 01:14:32 +02:00
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def benchCheckpoints(options, maxtick, cptdir):
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2013-04-09 23:25:30 +02:00
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exit_event = m5.simulate(maxtick - m5.curTick())
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2012-08-07 01:14:32 +02:00
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exit_cause = exit_event.getCause()
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num_checkpoints = 0
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max_checkpoints = options.max_checkpoints
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while exit_cause == "checkpoint":
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m5.checkpoint(joinpath(cptdir, "cpt.%d"))
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num_checkpoints += 1
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if num_checkpoints == max_checkpoints:
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exit_cause = "maximum %d checkpoints dropped" % max_checkpoints
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break
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exit_event = m5.simulate(maxtick - m5.curTick())
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exit_cause = exit_event.getCause()
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2013-01-08 23:12:22 +01:00
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return exit_event
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2012-08-07 01:14:32 +02:00
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2012-08-15 16:38:07 +02:00
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def repeatSwitch(testsys, repeat_switch_cpu_list, maxtick, switch_freq):
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print "starting switch loop"
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while True:
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exit_event = m5.simulate(switch_freq)
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exit_cause = exit_event.getCause()
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if exit_cause != "simulate() limit reached":
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2013-01-08 23:12:22 +01:00
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return exit_event
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2012-08-15 16:38:07 +02:00
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2013-02-15 23:40:08 +01:00
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m5.switchCpus(testsys, repeat_switch_cpu_list)
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2012-08-15 16:38:07 +02:00
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tmp_cpu_list = []
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for old_cpu, new_cpu in repeat_switch_cpu_list:
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tmp_cpu_list.append((new_cpu, old_cpu))
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repeat_switch_cpu_list = tmp_cpu_list
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if (maxtick - m5.curTick()) <= switch_freq:
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exit_event = m5.simulate(maxtick - m5.curTick())
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2013-01-08 23:12:22 +01:00
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return exit_event
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2012-08-15 16:38:07 +02:00
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2006-11-02 01:25:09 +01:00
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def run(options, root, testsys, cpu_class):
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2006-10-27 22:32:26 +02:00
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if options.maxtick:
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maxtick = options.maxtick
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elif options.maxtime:
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2007-03-06 20:13:43 +01:00
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simtime = m5.ticks.seconds(simtime)
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2006-10-27 22:32:26 +02:00
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print "simulating for: ", simtime
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maxtick = simtime
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else:
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2006-11-08 21:05:23 +01:00
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maxtick = m5.MaxTick
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2006-10-27 22:32:26 +02:00
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if options.checkpoint_dir:
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cptdir = options.checkpoint_dir
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2007-11-03 19:41:00 +01:00
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elif m5.options.outdir:
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cptdir = m5.options.outdir
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2006-10-27 22:32:26 +02:00
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else:
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cptdir = getcwd()
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2008-02-29 07:23:18 +01:00
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if options.fast_forward and options.checkpoint_restore != None:
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2009-09-23 00:24:16 +02:00
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fatal("Can't specify both --fast-forward and --checkpoint-restore")
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2008-02-29 07:23:18 +01:00
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2008-02-29 07:49:36 +01:00
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if options.standard_switch and not options.caches:
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2009-09-23 00:24:16 +02:00
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fatal("Must specify --caches when using --standard-switch")
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2008-02-29 07:23:18 +01:00
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2012-08-15 16:38:07 +02:00
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if options.standard_switch and options.repeat_switch:
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fatal("Can't specify both --standard-switch and --repeat-switch")
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if options.repeat_switch and options.take_checkpoints:
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fatal("Can't specify both --repeat-switch and --take-checkpoints")
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2006-10-27 22:32:26 +02:00
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np = options.num_cpus
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2006-11-02 01:25:09 +01:00
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switch_cpus = None
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2011-05-23 20:36:22 +02:00
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if options.prog_interval:
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2009-05-05 08:39:05 +02:00
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for i in xrange(np):
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2011-05-20 20:49:06 +02:00
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testsys.cpu[i].progress_interval = options.prog_interval
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2009-05-05 08:39:05 +02:00
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2009-09-16 15:45:30 +02:00
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if options.maxinsts:
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for i in xrange(np):
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testsys.cpu[i].max_insts_any_thread = options.maxinsts
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2006-11-02 01:25:09 +01:00
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if cpu_class:
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2013-01-07 19:05:45 +01:00
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switch_cpus = [cpu_class(switched_out=True, cpu_id=(i))
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2006-11-02 01:25:09 +01:00
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for i in xrange(np)]
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|
|
|
for i in xrange(np):
|
2008-02-27 06:35:09 +01:00
|
|
|
if options.fast_forward:
|
2008-02-29 02:39:01 +01:00
|
|
|
testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
|
2006-11-02 01:25:09 +01:00
|
|
|
switch_cpus[i].system = testsys
|
2012-01-28 16:24:50 +01:00
|
|
|
switch_cpus[i].workload = testsys.cpu[i].workload
|
2012-07-23 15:32:22 +02:00
|
|
|
switch_cpus[i].clock = testsys.cpu[i].clock
|
2008-02-29 02:39:01 +01:00
|
|
|
# simulation period
|
2011-05-20 20:49:06 +02:00
|
|
|
if options.maxinsts:
|
|
|
|
switch_cpus[i].max_insts_any_thread = options.maxinsts
|
2012-03-09 15:59:27 +01:00
|
|
|
# Add checker cpu if selected
|
|
|
|
if options.checker:
|
|
|
|
switch_cpus[i].addCheckerCpu()
|
2006-11-02 01:25:09 +01:00
|
|
|
|
2007-12-18 07:52:57 +01:00
|
|
|
testsys.switch_cpus = switch_cpus
|
2006-11-02 01:25:09 +01:00
|
|
|
switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
|
2006-10-27 22:32:26 +02:00
|
|
|
|
2012-08-15 16:38:07 +02:00
|
|
|
if options.repeat_switch:
|
2013-02-15 23:40:08 +01:00
|
|
|
switch_class = getCPUClass(options.cpu_type)[0]
|
|
|
|
if switch_class.require_caches() and \
|
|
|
|
not options.caches:
|
|
|
|
print "%s: Must be used with caches" % str(switch_class)
|
2011-04-04 18:42:31 +02:00
|
|
|
sys.exit(1)
|
2013-02-15 23:40:08 +01:00
|
|
|
if not switch_class.support_take_over():
|
|
|
|
print "%s: CPU switching not supported" % str(switch_class)
|
|
|
|
sys.exit(1)
|
|
|
|
|
|
|
|
repeat_switch_cpus = [switch_class(switched_out=True, \
|
|
|
|
cpu_id=(i)) for i in xrange(np)]
|
2011-04-04 18:42:31 +02:00
|
|
|
|
2012-08-15 16:38:07 +02:00
|
|
|
for i in xrange(np):
|
|
|
|
repeat_switch_cpus[i].system = testsys
|
|
|
|
repeat_switch_cpus[i].workload = testsys.cpu[i].workload
|
|
|
|
repeat_switch_cpus[i].clock = testsys.cpu[i].clock
|
|
|
|
|
|
|
|
if options.maxinsts:
|
|
|
|
repeat_switch_cpus[i].max_insts_any_thread = options.maxinsts
|
|
|
|
|
|
|
|
if options.checker:
|
|
|
|
repeat_switch_cpus[i].addCheckerCpu()
|
|
|
|
|
|
|
|
testsys.repeat_switch_cpus = repeat_switch_cpus
|
|
|
|
|
|
|
|
if cpu_class:
|
|
|
|
repeat_switch_cpu_list = [(switch_cpus[i], repeat_switch_cpus[i])
|
|
|
|
for i in xrange(np)]
|
|
|
|
else:
|
|
|
|
repeat_switch_cpu_list = [(testsys.cpu[i], repeat_switch_cpus[i])
|
|
|
|
for i in xrange(np)]
|
|
|
|
|
|
|
|
if options.standard_switch:
|
2013-01-07 19:05:45 +01:00
|
|
|
switch_cpus = [TimingSimpleCPU(switched_out=True, cpu_id=(i))
|
2006-10-27 22:32:26 +02:00
|
|
|
for i in xrange(np)]
|
2013-01-07 19:05:45 +01:00
|
|
|
switch_cpus_1 = [DerivO3CPU(switched_out=True, cpu_id=(i))
|
2006-10-27 22:32:26 +02:00
|
|
|
for i in xrange(np)]
|
2006-11-01 17:40:49 +01:00
|
|
|
|
2006-10-27 22:32:26 +02:00
|
|
|
for i in xrange(np):
|
|
|
|
switch_cpus[i].system = testsys
|
2006-11-01 17:40:49 +01:00
|
|
|
switch_cpus_1[i].system = testsys
|
2012-01-28 16:24:50 +01:00
|
|
|
switch_cpus[i].workload = testsys.cpu[i].workload
|
|
|
|
switch_cpus_1[i].workload = testsys.cpu[i].workload
|
2012-07-23 15:32:22 +02:00
|
|
|
switch_cpus[i].clock = testsys.cpu[i].clock
|
|
|
|
switch_cpus_1[i].clock = testsys.cpu[i].clock
|
2006-11-01 17:49:39 +01:00
|
|
|
|
2008-02-27 06:35:09 +01:00
|
|
|
# if restoring, make atomic cpu simulate only a few instructions
|
2008-02-29 02:39:01 +01:00
|
|
|
if options.checkpoint_restore != None:
|
2008-02-27 06:35:09 +01:00
|
|
|
testsys.cpu[i].max_insts_any_thread = 1
|
|
|
|
# Fast forward to specified location if we are not restoring
|
|
|
|
elif options.fast_forward:
|
2008-02-29 02:39:01 +01:00
|
|
|
testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
|
2008-02-27 06:35:09 +01:00
|
|
|
# Fast forward to a simpoint (warning: time consuming)
|
|
|
|
elif options.simpoint:
|
2008-03-16 03:20:09 +01:00
|
|
|
if testsys.cpu[i].workload[0].simpoint == 0:
|
2009-09-23 00:24:16 +02:00
|
|
|
fatal('simpoint not found')
|
2008-02-27 06:35:09 +01:00
|
|
|
testsys.cpu[i].max_insts_any_thread = \
|
|
|
|
testsys.cpu[i].workload[0].simpoint
|
|
|
|
# No distance specified, just switch
|
|
|
|
else:
|
|
|
|
testsys.cpu[i].max_insts_any_thread = 1
|
|
|
|
|
|
|
|
# warmup period
|
|
|
|
if options.warmup_insts:
|
|
|
|
switch_cpus[i].max_insts_any_thread = options.warmup_insts
|
|
|
|
|
|
|
|
# simulation period
|
2011-05-20 20:49:06 +02:00
|
|
|
if options.maxinsts:
|
|
|
|
switch_cpus_1[i].max_insts_any_thread = options.maxinsts
|
2008-02-22 23:48:10 +01:00
|
|
|
|
2012-03-09 15:59:27 +01:00
|
|
|
# attach the checker cpu if selected
|
|
|
|
if options.checker:
|
|
|
|
switch_cpus[i].addCheckerCpu()
|
|
|
|
switch_cpus_1[i].addCheckerCpu()
|
|
|
|
|
2011-04-04 18:42:31 +02:00
|
|
|
testsys.switch_cpus = switch_cpus
|
|
|
|
testsys.switch_cpus_1 = switch_cpus_1
|
|
|
|
switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
|
|
|
|
switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)]
|
2006-10-27 22:32:26 +02:00
|
|
|
|
2008-02-27 06:35:09 +01:00
|
|
|
# set the checkpoint in the cpu before m5.instantiate is called
|
2008-02-29 02:39:01 +01:00
|
|
|
if options.take_checkpoints != None and \
|
2008-02-27 06:35:09 +01:00
|
|
|
(options.simpoint or options.at_instruction):
|
|
|
|
offset = int(options.take_checkpoints)
|
|
|
|
# Set an instruction break point
|
|
|
|
if options.simpoint:
|
|
|
|
for i in xrange(np):
|
2008-03-16 03:20:09 +01:00
|
|
|
if testsys.cpu[i].workload[0].simpoint == 0:
|
2009-09-23 00:24:16 +02:00
|
|
|
fatal('no simpoint for testsys.cpu[%d].workload[0]', i)
|
2008-02-29 02:39:01 +01:00
|
|
|
checkpoint_inst = int(testsys.cpu[i].workload[0].simpoint) + offset
|
2008-02-27 06:35:09 +01:00
|
|
|
testsys.cpu[i].max_insts_any_thread = checkpoint_inst
|
|
|
|
# used for output below
|
|
|
|
options.take_checkpoints = checkpoint_inst
|
|
|
|
else:
|
|
|
|
options.take_checkpoints = offset
|
|
|
|
# Set all test cpus with the right number of instructions
|
|
|
|
# for the upcoming simulation
|
|
|
|
for i in xrange(np):
|
|
|
|
testsys.cpu[i].max_insts_any_thread = offset
|
|
|
|
|
2010-08-17 14:17:06 +02:00
|
|
|
checkpoint_dir = None
|
2008-02-29 02:39:01 +01:00
|
|
|
if options.checkpoint_restore != None:
|
2012-08-07 01:14:32 +02:00
|
|
|
maxtick, checkpoint_dir = findCptDir(options, maxtick, cptdir, testsys)
|
2010-08-17 14:17:06 +02:00
|
|
|
m5.instantiate(checkpoint_dir)
|
2006-10-27 22:32:26 +02:00
|
|
|
|
2006-11-02 01:25:09 +01:00
|
|
|
if options.standard_switch or cpu_class:
|
2008-02-27 06:35:09 +01:00
|
|
|
if options.standard_switch:
|
|
|
|
print "Switch at instruction count:%s" % \
|
|
|
|
str(testsys.cpu[0].max_insts_any_thread)
|
|
|
|
exit_event = m5.simulate()
|
|
|
|
elif cpu_class and options.fast_forward:
|
|
|
|
print "Switch at instruction count:%s" % \
|
|
|
|
str(testsys.cpu[0].max_insts_any_thread)
|
|
|
|
exit_event = m5.simulate()
|
|
|
|
else:
|
|
|
|
print "Switch at curTick count:%s" % str(10000)
|
|
|
|
exit_event = m5.simulate(10000)
|
2010-11-18 05:16:19 +01:00
|
|
|
print "Switched CPUS @ tick %s" % (m5.curTick())
|
2006-10-27 22:32:26 +02:00
|
|
|
|
2013-02-15 23:40:08 +01:00
|
|
|
m5.switchCpus(testsys, switch_cpu_list)
|
2006-10-27 22:32:26 +02:00
|
|
|
|
2006-11-02 01:25:09 +01:00
|
|
|
if options.standard_switch:
|
2008-02-27 06:35:09 +01:00
|
|
|
print "Switch at instruction count:%d" % \
|
|
|
|
(testsys.switch_cpus[0].max_insts_any_thread)
|
|
|
|
|
|
|
|
#warmup instruction count may have already been set
|
|
|
|
if options.warmup_insts:
|
2008-02-22 23:48:10 +01:00
|
|
|
exit_event = m5.simulate()
|
2008-02-27 06:35:09 +01:00
|
|
|
else:
|
2012-08-15 16:38:07 +02:00
|
|
|
exit_event = m5.simulate(options.standard_switch)
|
2010-11-18 05:16:19 +01:00
|
|
|
print "Switching CPUS @ tick %s" % (m5.curTick())
|
2008-02-27 06:35:09 +01:00
|
|
|
print "Simulation ends instruction count:%d" % \
|
|
|
|
(testsys.switch_cpus_1[0].max_insts_any_thread)
|
2013-02-15 23:40:08 +01:00
|
|
|
m5.switchCpus(testsys, switch_cpu_list1)
|
2006-10-27 22:32:26 +02:00
|
|
|
|
2010-07-06 06:39:38 +02:00
|
|
|
# If we're taking and restoring checkpoints, use checkpoint_dir
|
|
|
|
# option only for finding the checkpoints to restore from. This
|
|
|
|
# lets us test checkpointing by restoring from one set of
|
|
|
|
# checkpoints, generating a second set, and then comparing them.
|
|
|
|
if options.take_checkpoints and options.checkpoint_restore:
|
|
|
|
if m5.options.outdir:
|
|
|
|
cptdir = m5.options.outdir
|
|
|
|
else:
|
|
|
|
cptdir = getcwd()
|
|
|
|
|
2008-02-29 02:39:01 +01:00
|
|
|
if options.take_checkpoints != None :
|
2012-08-07 01:14:32 +02:00
|
|
|
# Checkpoints being taken via the command line at <when> and at
|
|
|
|
# subsequent periods of <period>. Checkpoint instructions
|
|
|
|
# received from the benchmark running are ignored and skipped in
|
|
|
|
# favor of command line checkpoint instructions.
|
2013-03-22 23:31:24 +01:00
|
|
|
exit_event = scriptCheckpoints(options, maxtick, cptdir)
|
2012-08-07 01:14:32 +02:00
|
|
|
else:
|
2012-08-15 16:38:07 +02:00
|
|
|
if options.fast_forward:
|
|
|
|
m5.stats.reset()
|
|
|
|
print "**** REAL SIMULATION ****"
|
|
|
|
|
2012-08-07 01:14:32 +02:00
|
|
|
# If checkpoints are being taken, then the checkpoint instruction
|
|
|
|
# will occur in the benchmark code it self.
|
2012-08-15 16:38:07 +02:00
|
|
|
if options.repeat_switch and maxtick > options.repeat_switch:
|
2013-01-08 23:12:22 +01:00
|
|
|
exit_event = repeatSwitch(testsys, repeat_switch_cpu_list,
|
2012-08-15 16:38:07 +02:00
|
|
|
maxtick, options.repeat_switch)
|
|
|
|
else:
|
2013-01-08 23:12:22 +01:00
|
|
|
exit_event = benchCheckpoints(options, maxtick, cptdir)
|
2006-10-27 22:32:26 +02:00
|
|
|
|
2013-01-08 23:12:22 +01:00
|
|
|
print 'Exiting @ tick %i because %s' % (m5.curTick(), exit_event.getCause())
|
2009-11-18 22:55:58 +01:00
|
|
|
if options.checkpoint_at_end:
|
2010-08-17 14:06:22 +02:00
|
|
|
m5.checkpoint(joinpath(cptdir, "cpt.%d"))
|
2013-01-08 14:54:12 +01:00
|
|
|
|
2013-02-10 13:23:54 +01:00
|
|
|
if not m5.options.interactive:
|
|
|
|
sys.exit(exit_event.getCode())
|