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gem5/tests/long/70.twolf/ref/alpha/tru64/o3-timing/simout

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StoreSet: Update stats for store-set clearing
2011-08-19 22:08:08 +02:00
Redirecting stdout to build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/o3-timing/simout
Redirecting stderr to build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/o3-timing/simerr
alpha:o3:simple: update simout/err files A few prior changesets have changed the gem5 output in a way that wont cause errors but may be confusing for someone trying to debug the regressions. Ones that I caught were: - no more "warn: <hash address" - typo in the ALPHA Prefetch unimplemented warning Additionaly, the last updated stats changes rearrange the ordering of the stats output even though they are still correct stats (gem5 is smart enough to detect this). All the regressions pass w/the same stats even though it looks like they are being changed.
2011-06-21 00:57:14 +02:00
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
tests: update config.ini and stdout for the various tests. These files were a bit too out of date and resulted in a bit of confusion.
2008-07-22 23:00:18 +02:00
O3: Update stats for new ordering fix.
2011-09-13 18:58:09 +02:00
gem5 compiled Aug 20 2011 16:10:02
gem5 started Aug 20 2011 16:10:09
gem5 executing on zizzer
O3: Update stats for fetch and bp changes.
2011-07-10 19:56:09 +02:00
command line: build/ALPHA_SE/gem5.opt -d build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/o3-timing
O3: Update stats for new ordering fix.
2011-09-13 18:58:09 +02:00
Couldn't unlink build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/o3-timing/smred.sav
Couldn't unlink build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/o3-timing/smred.sv2
tests: update config.ini and stdout for the various tests. These files were a bit too out of date and resulted in a bit of confusion.
2008-07-22 23:00:18 +02:00
Global frequency set at 1000000000000 ticks per second
Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache.
2008-11-06 17:11:42 +01:00
info: Entering event queue @ 0. Starting simulation...
Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway.
2009-02-16 18:09:45 +01:00
info: Increasing stack size by one page.
config file updates --HG-- extra : convert_revision : b873e0b436d71d86b87b8d9df7115bcc7ceb2b50
2006-10-12 21:04:14 +02:00
Update SPEC CPU2000 tests with actual benchmark output. tests/long/00.gzip/ref/alpha/linux/o3-timing/config.ini: tests/long/00.gzip/ref/alpha/linux/o3-timing/config.out: tests/long/00.gzip/ref/alpha/linux/o3-timing/m5stats.txt: tests/long/00.gzip/ref/alpha/linux/o3-timing/stderr: tests/long/00.gzip/ref/alpha/linux/o3-timing/stdout: tests/long/00.gzip/ref/alpha/linux/simple-atomic/config.ini: tests/long/00.gzip/ref/alpha/linux/simple-atomic/config.out: tests/long/00.gzip/ref/alpha/linux/simple-atomic/m5stats.txt: tests/long/00.gzip/ref/alpha/linux/simple-atomic/stderr: tests/long/00.gzip/ref/alpha/linux/simple-atomic/stdout: tests/long/00.gzip/ref/alpha/linux/simple-timing/config.ini: tests/long/00.gzip/ref/alpha/linux/simple-timing/config.out: tests/long/00.gzip/ref/alpha/linux/simple-timing/m5stats.txt: tests/long/00.gzip/ref/alpha/linux/simple-timing/stderr: tests/long/00.gzip/ref/alpha/linux/simple-timing/stdout: tests/long/30.eon/ref/alpha/linux/simple-atomic/config.ini: tests/long/30.eon/ref/alpha/linux/simple-atomic/config.out: tests/long/30.eon/ref/alpha/linux/simple-atomic/m5stats.txt: tests/long/30.eon/ref/alpha/linux/simple-atomic/stderr: tests/long/30.eon/ref/alpha/linux/simple-atomic/stdout: tests/long/30.eon/ref/alpha/linux/simple-timing/config.ini: tests/long/30.eon/ref/alpha/linux/simple-timing/config.out: tests/long/30.eon/ref/alpha/linux/simple-timing/m5stats.txt: tests/long/30.eon/ref/alpha/linux/simple-timing/stderr: tests/long/30.eon/ref/alpha/linux/simple-timing/stdout: tests/long/40.perlbmk/ref/alpha/linux/simple-atomic/config.ini: tests/long/40.perlbmk/ref/alpha/linux/simple-atomic/config.out: tests/long/40.perlbmk/ref/alpha/linux/simple-atomic/m5stats.txt: tests/long/40.perlbmk/ref/alpha/linux/simple-atomic/stderr: tests/long/40.perlbmk/ref/alpha/linux/simple-atomic/stdout: tests/long/40.perlbmk/ref/alpha/linux/simple-timing/config.ini: tests/long/40.perlbmk/ref/alpha/linux/simple-timing/config.out: tests/long/40.perlbmk/ref/alpha/linux/simple-timing/m5stats.txt: tests/long/40.perlbmk/ref/alpha/linux/simple-timing/stderr: tests/long/40.perlbmk/ref/alpha/linux/simple-timing/stdout: tests/long/50.vortex/ref/alpha/linux/o3-timing/config.ini: tests/long/50.vortex/ref/alpha/linux/o3-timing/config.out: tests/long/50.vortex/ref/alpha/linux/o3-timing/m5stats.txt: tests/long/50.vortex/ref/alpha/linux/o3-timing/stderr: tests/long/50.vortex/ref/alpha/linux/o3-timing/stdout: tests/long/50.vortex/ref/alpha/linux/simple-atomic/config.ini: tests/long/50.vortex/ref/alpha/linux/simple-atomic/config.out: tests/long/50.vortex/ref/alpha/linux/simple-atomic/m5stats.txt: tests/long/50.vortex/ref/alpha/linux/simple-atomic/stderr: tests/long/50.vortex/ref/alpha/linux/simple-atomic/stdout: tests/long/50.vortex/ref/alpha/linux/simple-timing/config.ini: tests/long/50.vortex/ref/alpha/linux/simple-timing/config.out: tests/long/50.vortex/ref/alpha/linux/simple-timing/m5stats.txt: tests/long/50.vortex/ref/alpha/linux/simple-timing/stderr: tests/long/50.vortex/ref/alpha/linux/simple-timing/stdout: tests/long/60.bzip2/ref/alpha/linux/o3-timing/config.ini: tests/long/60.bzip2/ref/alpha/linux/o3-timing/config.out: tests/long/60.bzip2/ref/alpha/linux/o3-timing/m5stats.txt: tests/long/60.bzip2/ref/alpha/linux/o3-timing/stderr: tests/long/60.bzip2/ref/alpha/linux/o3-timing/stdout: tests/long/60.bzip2/ref/alpha/linux/simple-atomic/config.ini: tests/long/60.bzip2/ref/alpha/linux/simple-atomic/config.out: tests/long/60.bzip2/ref/alpha/linux/simple-atomic/m5stats.txt: tests/long/60.bzip2/ref/alpha/linux/simple-atomic/stderr: tests/long/60.bzip2/ref/alpha/linux/simple-atomic/stdout: tests/long/60.bzip2/ref/alpha/linux/simple-timing/config.ini: tests/long/60.bzip2/ref/alpha/linux/simple-timing/config.out: tests/long/60.bzip2/ref/alpha/linux/simple-timing/m5stats.txt: tests/long/60.bzip2/ref/alpha/linux/simple-timing/stderr: tests/long/60.bzip2/ref/alpha/linux/simple-timing/stdout: tests/long/70.twolf/ref/alpha/linux/o3-timing/config.ini: tests/long/70.twolf/ref/alpha/linux/o3-timing/config.out: tests/long/70.twolf/ref/alpha/linux/o3-timing/m5stats.txt: tests/long/70.twolf/ref/alpha/linux/o3-timing/stderr: tests/long/70.twolf/ref/alpha/linux/o3-timing/stdout: tests/long/70.twolf/ref/alpha/linux/simple-atomic/config.ini: tests/long/70.twolf/ref/alpha/linux/simple-atomic/config.out: tests/long/70.twolf/ref/alpha/linux/simple-atomic/m5stats.txt: tests/long/70.twolf/ref/alpha/linux/simple-atomic/stderr: tests/long/70.twolf/ref/alpha/linux/simple-atomic/stdout: tests/long/70.twolf/ref/alpha/linux/simple-timing/config.ini: tests/long/70.twolf/ref/alpha/linux/simple-timing/config.out: tests/long/70.twolf/ref/alpha/linux/simple-timing/m5stats.txt: tests/long/70.twolf/ref/alpha/linux/simple-timing/stderr: tests/long/70.twolf/ref/alpha/linux/simple-timing/stdout: Update with actual benchmark output. --HG-- extra : convert_revision : 12e8de58172dd717d9cc8c5c27dd926a7257153c
2006-12-05 01:07:00 +01:00
TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
Standard Cell Placement and Global Routing Program
Authors: Carl Sechen, Bill Swartz
Yale University
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O3: Update stats for new ordering fix.
2011-09-13 18:58:09 +02:00
122 123 124 Exiting @ tick 29167093500 because target called exit()
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