gem5/tests/long/50.vortex/ref/sparc/linux/simple-timing/simout

M5 Simulator System

Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved


M5 compiled Apr  8 2009 12:30:02
M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff
M5 started Apr  8 2009 12:30:34
M5 executing on maize
command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/50.vortex/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/fast/long/50.vortex/sparc/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0.  Starting simulation...
info: Increasing stack size by one page.
Exiting @ tick 203376692000 because target called exit()
Added SPARC_SE simple timing vortex regression. --HG-- extra : convert_revision : 12a2fc0b43cfa72747c1ef24d124979e43b166c7 2007-03-29 19:51:12 +02:00			`M5 Simulator System`

Bus: Update the stats for the recent bus fix. --HG-- extra : convert_revision : dc29f7b5e6fa30a50305193cb0e5aed942f7e407 2008-02-26 08:20:40 +01:00			`Copyright (c) 2001-2008`
Added SPARC_SE simple timing vortex regression. --HG-- extra : convert_revision : 12a2fc0b43cfa72747c1ef24d124979e43b166c7 2007-03-29 19:51:12 +02:00			`The Regents of The University of Michigan`
			`All Rights Reserved`


tests: update tests for TLB unification 2009-04-09 07:21:30 +02:00			`M5 compiled Apr 8 2009 12:30:02`
			`M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff`
			`M5 started Apr 8 2009 12:30:34`
			`M5 executing on maize`
Very minor regression stats updates due top previous changeset. Setting dirty bit on swaps added a handful of writebacks in a few of the longer-running SPARC_SE benchmarks. 2009-03-16 16:01:23 +01:00			`command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/50.vortex/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/fast/long/50.vortex/sparc/linux/simple-timing`
Added SPARC_SE simple timing vortex regression. --HG-- extra : convert_revision : 12a2fc0b43cfa72747c1ef24d124979e43b166c7 2007-03-29 19:51:12 +02:00			`Global frequency set at 1000000000000 ticks per second`
Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache. 2008-11-06 17:11:42 +01:00			`info: Entering event queue @ 0. Starting simulation...`
Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway. 2009-02-16 18:09:45 +01:00			`info: Increasing stack size by one page.`
CPU: Update stats now that there's no fetch in the middle of macroops. 2009-02-25 19:18:45 +01:00			`Exiting @ tick 203376692000 because target called exit()`