gem5/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout

gem5 Simulator System.  http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.

gem5 compiled Jan 23 2012 04:48:33
gem5 started Jan 23 2012 05:42:49
gem5 executing on zizzer
command line: build/ALPHA_SE/gem5.opt -d build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/simple-timing -re tests/run.py build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0.  Starting simulation...
info: Increasing stack size by one page.
Exiting @ tick 134276988000 because target called exit()
alpha:o3:simple: update simout/err files A few prior changesets have changed the gem5 output in a way that wont cause errors but may be confusing for someone trying to debug the regressions. Ones that I caught were: - no more "warn: <hash address" - typo in the ALPHA Prefetch unimplemented warning Additionaly, the last updated stats changes rearrange the ordering of the stats output even though they are still correct stats (gem5 is smart enough to detect this). All the regressions pass w/the same stats even though it looks like they are being changed. 2011-06-21 00:57:14 +02:00			`gem5 Simulator System. http://gem5.org`
			`gem5 is copyrighted software; use the --copyright option for details.`
tests: update config.ini and stdout for the various tests. These files were a bit too out of date and resulted in a bit of confusion. 2008-07-22 23:00:18 +02:00
stats: Update stats for final tick and memory bandwidth patches 2012-01-25 18:19:50 +01:00			`gem5 compiled Jan 23 2012 04:48:33`
			`gem5 started Jan 23 2012 05:42:49`
			`gem5 executing on zizzer`
			`command line: build/ALPHA_SE/gem5.opt -d build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/simple-timing -re tests/run.py build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/simple-timing`
tests: update config.ini and stdout for the various tests. These files were a bit too out of date and resulted in a bit of confusion. 2008-07-22 23:00:18 +02:00			`Global frequency set at 1000000000000 ticks per second`
Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache. 2008-11-06 17:11:42 +01:00			`info: Entering event queue @ 0. Starting simulation...`
Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway. 2009-02-16 18:09:45 +01:00			`info: Increasing stack size by one page.`
stats: update stats for previous cset Coherence protocol change basically got rid of UpgradeReqs in L2 caches, other minor related cache stat changes. 2010-09-22 08:07:35 +02:00			`Exiting @ tick 134276988000 because target called exit()`