2010-01-30 05:29:40 +01:00
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================ Begin RubySystem Configuration Print ================
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RubySystem config:
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random_seed: 1234
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randomization: 0
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cycle_period: 1
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block_size_bytes: 64
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block_size_bits: 6
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memory_size_bytes: 134217728
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memory_size_bits: 27
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Network Configuration
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---------------------
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network: SIMPLE_NETWORK
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topology:
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2010-03-22 05:22:22 +01:00
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virtual_net_0: active, ordered
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virtual_net_1: active, ordered
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2010-01-30 05:29:40 +01:00
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virtual_net_2: active, unordered
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virtual_net_3: active, unordered
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2010-03-22 05:22:22 +01:00
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virtual_net_4: active, unordered
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virtual_net_5: active, unordered
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2010-01-30 05:29:40 +01:00
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virtual_net_6: inactive
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virtual_net_7: inactive
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virtual_net_8: inactive
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virtual_net_9: inactive
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Profiler Configuration
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----------------------
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periodic_stats_period: 1000000
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================ End RubySystem Configuration Print ================
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2011-02-24 01:41:59 +01:00
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Real time: Feb/23/2011 14:32:39
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2010-01-30 05:29:40 +01:00
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Profiler Stats
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--------------
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2011-02-24 01:41:59 +01:00
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Elapsed_time_in_seconds: 343
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Elapsed_time_in_minutes: 5.71667
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Elapsed_time_in_hours: 0.0952778
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Elapsed_time_in_days: 0.00396991
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2010-01-30 05:29:40 +01:00
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2011-02-24 01:41:59 +01:00
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Virtual_time_in_seconds: 266.4
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Virtual_time_in_minutes: 4.44
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Virtual_time_in_hours: 0.074
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Virtual_time_in_days: 0.00308333
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2010-01-30 05:29:40 +01:00
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2011-02-24 01:41:59 +01:00
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Ruby_current_time: 38170519
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2010-01-30 05:29:40 +01:00
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Ruby_start_time: 0
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2011-02-24 01:41:59 +01:00
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Ruby_cycles: 38170519
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2010-01-30 05:29:40 +01:00
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2011-02-24 01:41:59 +01:00
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mbytes_resident: 35.4453
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mbytes_total: 337.395
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resident_ratio: 0.105079
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2010-01-30 05:29:40 +01:00
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2011-02-24 01:41:59 +01:00
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ruby_cycles_executed: [ 38170520 38170520 38170520 38170520 38170520 38170520 38170520 38170520 ]
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2010-01-30 05:29:40 +01:00
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Busy Controller Counts:
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L1Cache-0:0 L1Cache-1:0 L1Cache-2:0 L1Cache-3:0 L1Cache-4:0 L1Cache-5:0 L1Cache-6:0 L1Cache-7:0
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Directory-0:0
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Busy Bank Count:0
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2011-02-24 01:41:59 +01:00
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sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1226929 average: 15.9992 | standard deviation: 0.0899179 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 1226809 ]
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2010-01-30 05:29:40 +01:00
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All Non-Zero Cycle Demand Cache Accesses
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----------------------------------------
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2011-02-24 01:41:59 +01:00
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miss_latency: [binsize: 128 max: 18760 count: 1226801 average: 3982.22 | standard deviation: 4659.25 | 3857 14031 25014 33436 32207 38273 43380 45728 39617 35029 37193 35477 29590 26540 24040 22928 19533 18233 17902 14584 14336 13986 14031 12497 11325 12147 12254 11473 11198 10727 11326 11058 10999 11915 10494 11075 11370 11784 11276 10567 11816 12292 11774 11721 11630 12489 12259 12302 13318 12079 12746 12753 13531 12716 11712 12833 13007 12160 12002 11217 12159 11020 10857 10875 9426 9624 9202 9189 8309 7177 7401 7078 6422 5965 5345 5380 4861 4547 4332 3678 3393 3226 3025 2680 2204 2322 2073 1808 1614 1447 1374 1186 1063 972 783 698 643 597 480 405 424 372 307 277 223 256 184 151 154 101 91 94 93 65 40 45 48 29 31 28 25 17 17 19 12 15 7 12 6 2 6 2 2 2 0 3 7 1 2 1 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_LD: [binsize: 128 max: 17810 count: 797536 average: 3980.95 | standard deviation: 6200.93 | 2555 9212 16203 21665 20857 24905 28300 29653 25820 22725 24072 23068 19267 17228 15764 14979 12732 11881 11613 9501 9328 9174 9157 8095 7353 7976 7903 7522 7321 6902 7328 7105 7175 7664 6828 7167 7405 7657 7290 6867 7674 8007 7673 7574 7603 8135 7933 8022 8579 7832 8321 8372 8798 8274 7621 8306 8484 7958 7844 7220 7912 7144 7041 7057 6162 6266 6030 5971 5395 4663 4764 4576 4149 3843 3453 3510 3170 2924 2778 2371 2208 2066 1961 1735 1463 1549 1394 1155 1045 933 890 802 653 615 496 468 430 386 298 279 269 255 216 177 145 171 107 104 103 67 52 63 64 42 26 23 29 21 21 21 18 9 11 13 9 12 5 10 3 0 3 2 2 2 0 1 4 1 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST: [binsize: 128 max: 18760 count: 429265 average: 3984.58 | standard deviation: 3074.98 | 1302 4819 8811 11771 11350 13368 15080 16075 13797 12304 13121 12409 10323 9312 8276 7949 6801 6352 6289 5083 5008 4812 4874 4402 3972 4171 4351 3951 3877 3825 3998 3953 3824 4251 3666 3908 3965 4127 3986 3700 4142 4285 4101 4147 4027 4354 4326 4280 4739 4247 4425 4381 4733 4442 4091 4527 4523 4202 4158 3997 4247 3876 3816 3818 3264 3358 3172 3218 2914 2514 2637 2502 2273 2122 1892 1870 1691 1623 1554 1307 1185 1160 1064 945 741 773 679 653 569 514 484 384 410 357 287 230 213 211 182 126 155 117 91 100 78 85 77 47 51 34 39 31 29 23 14 22 19 8 10 7 7 8 6 6 3 3 2 2 3 2 3 0 0 0 0 2 3 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_L1Cache: [binsize: 1 max: 2 count: 197 average: 2 | standard deviation: 0 | 0 0 197 ]
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miss_latency_L2Cache: [binsize: 32 max: 5882 count: 685 average: 655.285 | standard deviation: 873.88 | 256 17 6 10 10 8 11 10 4 11 8 14 3 10 10 9 13 14 5 8 4 13 5 9 7 10 8 4 7 7 7 8 6 3 6 2 5 4 1 3 3 6 4 2 5 4 5 5 1 5 4 3 2 3 2 4 2 3 3 2 2 1 0 4 1 1 3 0 0 0 2 2 2 3 1 1 0 4 1 2 2 0 0 1 0 0 1 2 0 1 2 2 1 0 1 0 0 1 1 0 1 3 1 0 0 3 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
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miss_latency_Directory: [binsize: 128 max: 18760 count: 1185962 average: 4002.01 | standard deviation: 4749.4 | 0 12492 23633 31845 30504 37024 42223 44530 38671 34214 36453 34693 28981 26059 23527 22393 19047 17808 17470 14153 13975 13601 13659 12167 10948 11770 11896 11127 10861 10376 10968 10688 10669 11592 10134 10695 10984 11401 10904 10150 11409 11861 11383 11365 11194 12045 11872 11862 12911 11623 12339 12347 13069 12327 11279 12451 12620 11805 11686 10902 11807 10690 10550 10577 9133 9373 8964 8961 8142 6989 7228 6887 6266 5814 5207 5283 4745 4455 4238 3593 3323 3154 2950 2620 2158 2285 2022 1780 1587 1413 1338 1158 1042 955 764 689 629 583 470 395 418 366 301 267 217 253 180 147 152 97 91 91 91 65 38 44 48 29 29 28 25 17 17 19 11 13 7 12 6 2 6 2 2 2 0 3 7 1 2 1 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_L1Cache_wCC: [binsize: 128 max: 16103 count: 39957 average: 3471.64 | standard deviation: 3069.09 | 3371 1500 1344 1559 1663 1218 1128 1169 929 802 725 765 596 470 503 528 481 421 425 424 358 382 367 328 375 372 355 345 336 351 358 369 330 323 358 379 385 383 372 417 407 431 391 356 436 443 387 440 407 456 407 406 462 389 433 382 387 355 316 315 352 330 307 298 293 251 238 228 167 188 173 191 156 151 138 97 116 92 94 85 70 72 75 60 46 37 51 28 27 34 36 28 21 17 19 9 14 14 10 10 6 6 6 10 6 3 4 4 2 4 0 3 2 0 2 1 0 0 2 0 0 0 0 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_wCC_issue_to_initial_request: [binsize: 128 max: 16071 count: 39893 average: 3291.44 | standard deviation: 3052.05 | 4928 1613 1497 1885 1459 1189 1048 1085 810 573 583 555 491 434 429 455 398 386 387 365 339 360 366 343 342 355 358 327 347 331 379 331 359 336 354 395 363 458 391 352 441 391 413 400 400 442 389 415 478 394 414 423 428 412 399 377 392 357 320 299 316 297 306 285 234 203 240 201 177 147 163 159 151 125 109 90 109 79 106 61 53 71 55 43 41 40 28 20 36 26 23 14 16 17 13 10 12 10 8 7 8 9 4 8 4 2 2 1 1 1 1 2 2 0 2 1 1 1 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_wCC_initial_forward_request: [binsize: 32 max: 3617 count: 39893 average: 155.846 | standard deviation: 327.436 | 28541 650 516 584 443 412 434 403 525 358 378 383 368 506 404 389 361 321 322 212 217 179 155 227 161 160 160 134 216 161 148 120 112 137 60 70 61 56 70 53 38 58 48 75 51 40 31 31 33 17 20 14 22 15 22 11 17 13 22 13 14 10 5 10 8 10 5 9 8 8 5 4 3 4 2 2 1 1 3 2 0 0 3 1 3 1 0 1 0 2 3 0 2 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 24 count: 39893 average: 24 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 39893 ]
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miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 2 count: 39893 average: 0.00777079 | standard deviation: 0.108081 | 39662 152 79 ]
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imcomplete_wCC_Times: 64
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miss_latency_dir_issue_to_initial_request: [binsize: 128 max: 17351 count: 1185962 average: 3280.4 | standard deviation: 4727.86 | 142979 49014 46679 55471 43248 36546 32197 31416 23136 17744 17702 17007 14376 13116 12204 12656 11621 11233 11900 10557 10825 10639 11320 10580 9843 10482 11190 10486 10512 10204 11112 10702 10921 11555 10378 10903 11382 11976 11563 10814 12110 12320 12187 12195 11888 12975 12469 12566 13050 11873 12130 12294 12671 11826 10518 11441 11324 10394 9971 9254 9568 8533 8356 8287 6904 6825 6363 6222 5565 4642 4743 4687 4070 3808 3339 3279 2844 2553 2463 2021 1915 1716 1579 1395 1140 1144 1066 940 852 671 624 511 480 436 322 323 289 278 225 163 172 130 135 107 83 71 77 52 55 46 42 33 24 18 16 13 20 17 11 7 6 7 4 3 1 2 5 0 1 4 4 3 3 2 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_dir_initial_forward_request: [binsize: 32 max: 3233 count: 1185962 average: 11.1411 | standard deviation: 54.2136 | 1179645 194 286 245 265 271 311 189 181 185 165 192 133 131 115 166 248 213 213 184 216 228 130 135 104 94 96 76 81 78 72 98 83 73 68 75 79 42 41 28 39 46 31 19 26 21 32 25 25 23 29 28 11 18 16 9 9 13 11 12 8 7 11 3 8 8 4 3 2 1 2 2 4 3 1 1 2 1 3 1 1 3 1 2 1 2 0 1 0 1 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_dir_forward_to_first_response: [binsize: 1 max: 24 count: 1185962 average: 24 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1185962 ]
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miss_latency_dir_first_response_to_completion: [binsize: 32 max: 4716 count: 1185962 average: 686.466 | standard deviation: 462.521 | 0 0 0 29012 38194 34031 37606 39851 55650 42192 40492 39884 39896 53432 38147 35924 33236 30549 37978 27947 26958 26536 26555 34515 26181 26080 26037 25324 31900 21797 18637 16257 14315 16991 12030 11054 10521 9852 12640 9128 8970 8722 8423 10708 7174 6306 5621 5053 6072 4147 3757 3748 3509 4190 3086 2819 2751 2734 3331 2282 2011 1742 1588 1917 1311 1261 1196 1076 1369 969 893 772 772 943 685 567 523 437 513 417 390 367 276 340 268 238 171 227 253 166 169 125 109 148 101 86 90 64 74 45 53 61 47 58 44 26 25 27 29 18 18 18 14 21 10 10 5 9 8 9 11 4 4 4 4 3 3 2 1 2 1 3 2 1 1 2 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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2010-08-21 02:44:26 +02:00
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imcomplete_dir_Times: 0
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2011-02-24 01:41:59 +01:00
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miss_latency_LD_L1Cache: [binsize: 1 max: 2 count: 126 average: 2 | standard deviation: 0 | 0 0 126 ]
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miss_latency_LD_L2Cache: [binsize: 32 max: 4632 count: 463 average: 650.307 | standard deviation: 862.617 | 183 11 1 7 6 5 7 8 2 4 6 8 2 7 5 5 9 10 4 7 2 8 2 7 2 8 5 2 3 6 6 5 5 2 4 2 4 3 0 2 1 6 2 2 4 3 3 3 0 2 2 2 2 3 1 2 1 2 3 2 1 1 0 4 1 1 2 0 0 0 1 1 1 2 1 0 0 2 1 0 1 0 0 0 0 0 1 2 0 1 2 2 0 0 1 0 0 1 1 0 1 2 1 0 0 3 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_LD_Directory: [binsize: 128 max: 17810 count: 770912 average: 4000.92 | standard deviation: 6362.17 | 0 8232 15295 20629 19723 24105 27531 28861 25198 22207 23587 22571 18856 16930 15417 14642 12416 11613 11318 9225 9097 8924 8906 7885 7105 7731 7672 7289 7094 6673 7094 6868 6971 7451 6599 6942 7142 7415 7058 6591 7417 7744 7411 7356 7318 7831 7678 7738 8317 7533 8059 8126 8500 7999 7325 8062 8236 7724 7620 7010 7689 6935 6843 6858 5967 6106 5869 5822 5283 4542 4661 4451 4042 3743 3355 3460 3092 2873 2712 2320 2167 2022 1911 1696 1432 1524 1363 1137 1027 909 867 784 641 602 482 461 422 374 294 273 263 249 212 169 141 170 105 102 101 63 52 61 62 42 24 23 29 21 19 21 18 9 11 13 8 10 5 10 3 0 3 2 2 2 0 1 4 1 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_LD_L1Cache_wCC: [binsize: 128 max: 16103 count: 26035 average: 3468.12 | standard deviation: 3075.89 | 2227 954 888 1017 1104 781 752 772 609 509 474 484 405 290 339 331 312 266 291 273 230 247 246 209 246 241 228 233 226 229 234 236 204 213 228 225 262 242 232 276 257 263 262 218 285 304 255 284 262 299 262 246 298 275 296 244 248 234 224 210 223 209 198 199 195 160 161 149 112 121 103 125 107 100 98 50 78 51 66 51 41 44 50 39 31 25 31 18 18 24 23 18 12 13 14 7 8 12 4 6 6 6 4 8 4 1 2 2 2 4 0 2 2 0 2 0 0 0 2 0 0 0 0 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST_L1Cache: [binsize: 1 max: 2 count: 71 average: 2 | standard deviation: 0 | 0 0 71 ]
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miss_latency_ST_L2Cache: [binsize: 32 max: 5882 count: 222 average: 665.667 | standard deviation: 898.803 | 73 6 5 3 4 3 4 2 2 7 2 6 1 3 5 4 4 4 1 1 2 5 3 2 5 2 3 2 4 1 1 3 1 1 2 0 1 1 1 1 2 0 2 0 1 1 2 2 1 3 2 1 0 0 1 2 1 1 0 0 1 0 0 0 0 0 1 0 0 0 1 1 1 1 0 1 0 2 0 2 1 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
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miss_latency_ST_Directory: [binsize: 128 max: 18760 count: 415050 average: 4004.02 | standard deviation: 3073.76 | 0 4260 8338 11216 10781 12919 14692 15669 13473 12007 12866 12122 10125 9129 8110 7751 6631 6195 6152 4928 4878 4677 4753 4282 3843 4039 4224 3838 3767 3703 3874 3820 3698 4141 3535 3753 3842 3986 3846 3559 3992 4117 3972 4009 3876 4214 4194 4124 4594 4090 4280 4221 4569 4328 3954 4389 4384 4081 4066 3892 4118 3755 3707 3719 3166 3267 3095 3139 2859 2447 2567 2436 2224 2071 1852 1823 1653 1582 1526 1273 1156 1132 1039 924 726 761 659 643 560 504 471 374 401 353 282 228 207 209 176 122 155 117 89 98 76 83 75 45 51 34 39 30 29 23 14 21 19 8 10 7 7 8 6 6 3 3 2 2 3 2 3 0 0 0 0 2 3 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST_L1Cache_wCC: [binsize: 128 max: 14723 count: 13922 average: 3478.22 | standard deviation: 3056.42 | 1144 546 456 542 559 437 376 397 320 293 251 281 191 180 164 197 169 155 134 151 128 135 121 119 129 131 127 112 110 122 124 133 126 110 130 154 123 141 140 141 150 168 129 138 151 139 132 156 145 157 145 160 164 114 137 138 139 121 92 105 129 121 109 99 98 91 77 79 55 67 70 66 49 51 40 47 38 41 28 34 29 28 25 21 15 12 20 10 9 10 13 10 9 4 5 2 6 2 6 4 0 0 2 2 2 2 2 2 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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2010-01-30 05:29:40 +01:00
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All Non-Zero Cycle SW Prefetch Requests
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------------------------------------
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prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Request vs. RubySystem State Profile
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--------------------------------
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filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Message Delayed Cycles
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----------------------
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Total_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Resource Usage
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--------------
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page_size: 4096
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2011-02-24 01:41:59 +01:00
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user_time: 265
|
2010-01-30 05:29:40 +01:00
|
|
|
system_time: 0
|
2011-02-24 01:41:59 +01:00
|
|
|
page_reclaims: 10328
|
2010-03-22 05:22:22 +01:00
|
|
|
page_faults: 0
|
2010-01-30 05:29:40 +01:00
|
|
|
swaps: 0
|
2011-02-24 01:41:59 +01:00
|
|
|
block_inputs: 568
|
2010-08-21 02:44:26 +02:00
|
|
|
block_outputs: 0
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
Network Stats
|
|
|
|
-------------
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
total_msg_count_Request_Control: 3678021 29424168
|
|
|
|
total_msg_count_Response_Data: 3677733 264796776
|
|
|
|
total_msg_count_Response_Control: 25623762 204990096
|
|
|
|
total_msg_count_Writeback_Data: 1271985 91582920
|
|
|
|
total_msg_count_Writeback_Control: 9125706 73005648
|
|
|
|
total_msg_count_Broadcast_Control: 18388185 147105480
|
|
|
|
total_msg_count_Unblock_Control: 3677820 29422560
|
|
|
|
total_msgs: 65443212 total_bytes: 840327648
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2010-01-30 05:29:40 +01:00
|
|
|
switch_0_inlinks: 2
|
|
|
|
switch_0_outlinks: 2
|
2011-02-24 01:41:59 +01:00
|
|
|
links_utilized_percent_switch_0: 0.199597
|
|
|
|
links_utilized_percent_switch_0_link_0: 0.119899 bw: 640000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_0_link_1: 0.279295 bw: 160000 base_latency: 1
|
|
|
|
|
|
|
|
outgoing_messages_switch_0_link_0_Request_Control: 3 24 [ 0 0 0 3 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_0_link_0_Response_Data: 153069 11020968 [ 0 0 0 0 153069 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_0_link_0_Response_Control: 1066512 8532096 [ 0 0 0 0 1066512 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_0_link_0_Writeback_Control: 144342 1154736 [ 0 0 0 144342 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_0_link_0_Broadcast_Control: 1072814 8582512 [ 0 0 0 1072814 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_0_link_1_Request_Control: 153073 1224584 [ 0 0 153073 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_0_link_1_Response_Data: 5026 361872 [ 0 0 0 0 5026 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_0_link_1_Response_Control: 1067789 8542312 [ 0 0 0 0 1067789 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_0_link_1_Writeback_Data: 53040 3818880 [ 0 0 0 0 0 53040 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_0_link_1_Writeback_Control: 235643 1885144 [ 0 0 144342 0 0 91301 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_0_link_1_Unblock_Control: 153071 1224568 [ 0 0 0 0 0 153071 0 0 0 0 ] base_latency: 1
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
switch_1_inlinks: 2
|
|
|
|
switch_1_outlinks: 2
|
2011-02-24 01:41:59 +01:00
|
|
|
links_utilized_percent_switch_1: 0.199873
|
|
|
|
links_utilized_percent_switch_1_link_0: 0.120172 bw: 640000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_1_link_1: 0.279574 bw: 160000 base_latency: 1
|
|
|
|
|
|
|
|
outgoing_messages_switch_1_link_0_Request_Control: 6 48 [ 0 0 0 6 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_1_link_0_Response_Data: 153594 11058768 [ 0 0 0 0 153594 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_1_link_0_Response_Control: 1070129 8561032 [ 0 0 0 0 1070129 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_1_link_0_Writeback_Control: 144857 1158856 [ 0 0 0 144857 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_1_link_0_Broadcast_Control: 1072286 8578288 [ 0 0 0 1072286 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_1_link_1_Request_Control: 153599 1228792 [ 0 0 153599 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_1_link_1_Response_Data: 4918 354096 [ 0 0 0 0 4918 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_1_link_1_Response_Control: 1067372 8538976 [ 0 0 0 0 1067372 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_1_link_1_Writeback_Data: 53219 3831768 [ 0 0 0 0 0 53219 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_1_link_1_Writeback_Control: 236493 1891944 [ 0 0 144857 0 0 91636 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_1_link_1_Unblock_Control: 153597 1228776 [ 0 0 0 0 0 153597 0 0 0 0 ] base_latency: 1
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
switch_2_inlinks: 2
|
|
|
|
switch_2_outlinks: 2
|
2011-02-24 01:41:59 +01:00
|
|
|
links_utilized_percent_switch_2: 0.199821
|
|
|
|
links_utilized_percent_switch_2_link_0: 0.120068 bw: 640000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_2_link_1: 0.279575 bw: 160000 base_latency: 1
|
|
|
|
|
|
|
|
outgoing_messages_switch_2_link_0_Request_Control: 13 104 [ 0 0 0 13 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_2_link_0_Response_Data: 153394 11044368 [ 0 0 0 0 153394 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_2_link_0_Response_Control: 1068731 8549848 [ 0 0 0 0 1068731 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_2_link_0_Writeback_Control: 144660 1157280 [ 0 0 0 144660 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_2_link_0_Broadcast_Control: 1072489 8579912 [ 0 0 0 1072489 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_2_link_1_Request_Control: 153396 1227168 [ 0 0 153396 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_2_link_1_Response_Data: 4933 355176 [ 0 0 0 0 4933 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_2_link_1_Response_Control: 1067567 8540536 [ 0 0 0 0 1067567 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_2_link_1_Writeback_Data: 53279 3836088 [ 0 0 0 0 0 53279 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_2_link_1_Writeback_Control: 236039 1888312 [ 0 0 144660 0 0 91379 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_2_link_1_Unblock_Control: 153396 1227168 [ 0 0 0 0 0 153396 0 0 0 0 ] base_latency: 1
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
switch_3_inlinks: 2
|
|
|
|
switch_3_outlinks: 2
|
2011-02-24 01:41:59 +01:00
|
|
|
links_utilized_percent_switch_3: 0.199559
|
|
|
|
links_utilized_percent_switch_3_link_0: 0.119877 bw: 640000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_3_link_1: 0.279242 bw: 160000 base_latency: 1
|
2011-02-09 03:07:54 +01:00
|
|
|
|
|
|
|
outgoing_messages_switch_3_link_0_Request_Control: 8 64 [ 0 0 0 8 0 0 0 0 0 0 ] base_latency: 1
|
2011-02-24 01:41:59 +01:00
|
|
|
outgoing_messages_switch_3_link_0_Response_Data: 153021 11017512 [ 0 0 0 0 153021 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_3_link_0_Response_Control: 1066231 8529848 [ 0 0 0 0 1066231 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_3_link_0_Writeback_Control: 144311 1154488 [ 0 0 0 144311 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_3_link_0_Broadcast_Control: 1072862 8582896 [ 0 0 0 1072862 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_3_link_1_Request_Control: 153026 1224208 [ 0 0 153026 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_3_link_1_Response_Data: 5013 360936 [ 0 0 0 0 5013 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_3_link_1_Response_Control: 1067855 8542840 [ 0 0 0 0 1067855 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_3_link_1_Writeback_Data: 53015 3817080 [ 0 0 0 0 0 53015 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_3_link_1_Writeback_Control: 235603 1884824 [ 0 0 144311 0 0 91292 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_3_link_1_Unblock_Control: 153026 1224208 [ 0 0 0 0 0 153026 0 0 0 0 ] base_latency: 1
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
switch_4_inlinks: 2
|
|
|
|
switch_4_outlinks: 2
|
2011-02-24 01:41:59 +01:00
|
|
|
links_utilized_percent_switch_4: 0.19939
|
|
|
|
links_utilized_percent_switch_4_link_0: 0.119897 bw: 640000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_4_link_1: 0.278882 bw: 160000 base_latency: 1
|
|
|
|
|
|
|
|
outgoing_messages_switch_4_link_0_Request_Control: 8 64 [ 0 0 0 8 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_4_link_0_Response_Data: 153071 11021112 [ 0 0 0 0 153071 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_4_link_0_Response_Control: 1066617 8532936 [ 0 0 0 0 1066617 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_4_link_0_Writeback_Control: 144148 1153184 [ 0 0 0 144148 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_4_link_0_Broadcast_Control: 1072811 8582488 [ 0 0 0 1072811 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_4_link_1_Request_Control: 153077 1224616 [ 0 0 153077 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_4_link_1_Response_Data: 5014 361008 [ 0 0 0 0 5014 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_4_link_1_Response_Control: 1067803 8542424 [ 0 0 0 0 1067803 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_4_link_1_Writeback_Data: 52705 3794760 [ 0 0 0 0 0 52705 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_4_link_1_Writeback_Control: 235587 1884696 [ 0 0 144148 0 0 91439 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_4_link_1_Unblock_Control: 153078 1224624 [ 0 0 0 0 0 153078 0 0 0 0 ] base_latency: 1
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
switch_5_inlinks: 2
|
|
|
|
switch_5_outlinks: 2
|
2011-02-24 01:41:59 +01:00
|
|
|
links_utilized_percent_switch_5: 0.199346
|
|
|
|
links_utilized_percent_switch_5_link_0: 0.119838 bw: 640000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_5_link_1: 0.278855 bw: 160000 base_latency: 1
|
|
|
|
|
|
|
|
outgoing_messages_switch_5_link_0_Request_Control: 5 40 [ 0 0 0 5 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_5_link_0_Response_Data: 152987 11015064 [ 0 0 0 0 152987 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_5_link_0_Response_Control: 1065730 8525840 [ 0 0 0 0 1065730 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_5_link_0_Writeback_Control: 143915 1151320 [ 0 0 0 143915 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_5_link_0_Broadcast_Control: 1072896 8583168 [ 0 0 0 1072896 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_5_link_1_Request_Control: 152992 1223936 [ 0 0 152992 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_5_link_1_Response_Data: 5044 363168 [ 0 0 0 0 5044 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_5_link_1_Response_Control: 1067857 8542856 [ 0 0 0 0 1067857 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_5_link_1_Writeback_Data: 52718 3795696 [ 0 0 0 0 0 52718 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_5_link_1_Writeback_Control: 235108 1880864 [ 0 0 143915 0 0 91193 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_5_link_1_Unblock_Control: 152990 1223920 [ 0 0 0 0 0 152990 0 0 0 0 ] base_latency: 1
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
switch_6_inlinks: 2
|
|
|
|
switch_6_outlinks: 2
|
2011-02-24 01:41:59 +01:00
|
|
|
links_utilized_percent_switch_6: 0.199841
|
|
|
|
links_utilized_percent_switch_6_link_0: 0.120185 bw: 640000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_6_link_1: 0.279496 bw: 160000 base_latency: 1
|
|
|
|
|
|
|
|
outgoing_messages_switch_6_link_0_Request_Control: 8 64 [ 0 0 0 8 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_6_link_0_Response_Data: 153636 11061792 [ 0 0 0 0 153636 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_6_link_0_Response_Control: 1070383 8563064 [ 0 0 0 0 1070383 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_6_link_0_Writeback_Control: 144662 1157296 [ 0 0 0 144662 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_6_link_0_Broadcast_Control: 1072253 8578024 [ 0 0 0 1072253 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_6_link_1_Request_Control: 153638 1229104 [ 0 0 153638 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_6_link_1_Response_Data: 5053 363816 [ 0 0 0 0 5053 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_6_link_1_Response_Control: 1067206 8537648 [ 0 0 0 0 1067206 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_6_link_1_Writeback_Data: 53053 3819816 [ 0 0 0 0 0 53053 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_6_link_1_Writeback_Control: 236269 1890152 [ 0 0 144662 0 0 91607 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_6_link_1_Unblock_Control: 153638 1229104 [ 0 0 0 0 0 153638 0 0 0 0 ] base_latency: 1
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
switch_7_inlinks: 2
|
|
|
|
switch_7_outlinks: 2
|
2011-02-24 01:41:59 +01:00
|
|
|
links_utilized_percent_switch_7: 0.199549
|
|
|
|
links_utilized_percent_switch_7_link_0: 0.119933 bw: 640000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_7_link_1: 0.279164 bw: 160000 base_latency: 1
|
|
|
|
|
|
|
|
outgoing_messages_switch_7_link_0_Request_Control: 13 104 [ 0 0 0 13 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_7_link_0_Response_Data: 153139 11026008 [ 0 0 0 0 153139 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_7_link_0_Response_Control: 1066921 8535368 [ 0 0 0 0 1066921 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_7_link_0_Writeback_Control: 144412 1155296 [ 0 0 0 144412 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_7_link_0_Broadcast_Control: 1072742 8581936 [ 0 0 0 1072742 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_7_link_1_Request_Control: 153142 1225136 [ 0 0 153142 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_7_link_1_Response_Data: 4948 356256 [ 0 0 0 0 4948 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_7_link_1_Response_Control: 1067805 8542440 [ 0 0 0 0 1067805 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_7_link_1_Writeback_Data: 52966 3813552 [ 0 0 0 0 0 52966 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_7_link_1_Writeback_Control: 235853 1886824 [ 0 0 144412 0 0 91441 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_7_link_1_Unblock_Control: 153144 1225152 [ 0 0 0 0 0 153144 0 0 0 0 ] base_latency: 1
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
switch_8_inlinks: 2
|
|
|
|
switch_8_outlinks: 2
|
2011-02-24 01:41:59 +01:00
|
|
|
links_utilized_percent_switch_8: 0.988558
|
|
|
|
links_utilized_percent_switch_8_link_0: 0.26704 bw: 640000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_8_link_1: 1.71008 bw: 160000 base_latency: 1
|
|
|
|
|
|
|
|
outgoing_messages_switch_8_link_0_Request_Control: 1225943 9807544 [ 0 0 1225943 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_8_link_0_Writeback_Data: 423995 30527640 [ 0 0 0 0 0 423995 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_8_link_0_Writeback_Control: 1886595 15092760 [ 0 0 1155307 0 0 731288 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_8_link_0_Unblock_Control: 1225940 9807520 [ 0 0 0 0 0 1225940 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_8_link_1_Request_Control: 64 512 [ 0 0 0 64 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_8_link_1_Response_Data: 1185962 85389264 [ 0 0 0 0 1185962 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_8_link_1_Writeback_Control: 1155307 9242456 [ 0 0 0 1155307 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_8_link_1_Broadcast_Control: 1225879 9807032 [ 0 0 0 1225879 0 0 0 0 0 0 ] base_latency: 1
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
switch_9_inlinks: 9
|
|
|
|
switch_9_outlinks: 9
|
2011-02-24 01:41:59 +01:00
|
|
|
links_utilized_percent_switch_9: 0.545293
|
|
|
|
links_utilized_percent_switch_9_link_0: 0.479597 bw: 160000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_9_link_1: 0.480688 bw: 160000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_9_link_2: 0.480271 bw: 160000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_9_link_3: 0.479506 bw: 160000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_9_link_4: 0.479588 bw: 160000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_9_link_5: 0.479353 bw: 160000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_9_link_6: 0.480741 bw: 160000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_9_link_7: 0.479734 bw: 160000 base_latency: 1
|
|
|
|
links_utilized_percent_switch_9_link_8: 1.06816 bw: 160000 base_latency: 1
|
|
|
|
|
|
|
|
outgoing_messages_switch_9_link_0_Request_Control: 3 24 [ 0 0 0 3 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_0_Response_Data: 153069 11020968 [ 0 0 0 0 153069 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_0_Response_Control: 1066512 8532096 [ 0 0 0 0 1066512 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_0_Writeback_Control: 144342 1154736 [ 0 0 0 144342 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_0_Broadcast_Control: 1072814 8582512 [ 0 0 0 1072814 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_1_Request_Control: 6 48 [ 0 0 0 6 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_1_Response_Data: 153594 11058768 [ 0 0 0 0 153594 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_1_Response_Control: 1070129 8561032 [ 0 0 0 0 1070129 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_1_Writeback_Control: 144857 1158856 [ 0 0 0 144857 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_1_Broadcast_Control: 1072286 8578288 [ 0 0 0 1072286 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_2_Request_Control: 13 104 [ 0 0 0 13 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_2_Response_Data: 153394 11044368 [ 0 0 0 0 153394 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_2_Response_Control: 1068731 8549848 [ 0 0 0 0 1068731 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_2_Writeback_Control: 144660 1157280 [ 0 0 0 144660 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_2_Broadcast_Control: 1072489 8579912 [ 0 0 0 1072489 0 0 0 0 0 0 ] base_latency: 1
|
2011-02-09 03:07:54 +01:00
|
|
|
outgoing_messages_switch_9_link_3_Request_Control: 8 64 [ 0 0 0 8 0 0 0 0 0 0 ] base_latency: 1
|
2011-02-24 01:41:59 +01:00
|
|
|
outgoing_messages_switch_9_link_3_Response_Data: 153021 11017512 [ 0 0 0 0 153021 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_3_Response_Control: 1066231 8529848 [ 0 0 0 0 1066231 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_3_Writeback_Control: 144311 1154488 [ 0 0 0 144311 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_3_Broadcast_Control: 1072862 8582896 [ 0 0 0 1072862 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_4_Request_Control: 8 64 [ 0 0 0 8 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_4_Response_Data: 153071 11021112 [ 0 0 0 0 153071 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_4_Response_Control: 1066617 8532936 [ 0 0 0 0 1066617 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_4_Writeback_Control: 144148 1153184 [ 0 0 0 144148 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_4_Broadcast_Control: 1072811 8582488 [ 0 0 0 1072811 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_5_Request_Control: 5 40 [ 0 0 0 5 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_5_Response_Data: 152987 11015064 [ 0 0 0 0 152987 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_5_Response_Control: 1065730 8525840 [ 0 0 0 0 1065730 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_5_Writeback_Control: 143915 1151320 [ 0 0 0 143915 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_5_Broadcast_Control: 1072896 8583168 [ 0 0 0 1072896 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_6_Request_Control: 8 64 [ 0 0 0 8 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_6_Response_Data: 153636 11061792 [ 0 0 0 0 153636 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_6_Response_Control: 1070383 8563064 [ 0 0 0 0 1070383 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_6_Writeback_Control: 144662 1157296 [ 0 0 0 144662 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_6_Broadcast_Control: 1072253 8578024 [ 0 0 0 1072253 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_7_Request_Control: 13 104 [ 0 0 0 13 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_7_Response_Data: 153139 11026008 [ 0 0 0 0 153139 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_7_Response_Control: 1066921 8535368 [ 0 0 0 0 1066921 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_7_Writeback_Control: 144412 1155296 [ 0 0 0 144412 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_7_Broadcast_Control: 1072742 8581936 [ 0 0 0 1072742 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_8_Request_Control: 1225943 9807544 [ 0 0 1225943 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_8_Writeback_Data: 423995 30527640 [ 0 0 0 0 0 423995 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_8_Writeback_Control: 1886595 15092760 [ 0 0 1155307 0 0 731288 0 0 0 0 ] base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_8_Unblock_Control: 1225940 9807520 [ 0 0 0 0 0 1225940 0 0 0 0 ] base_latency: 1
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl0.L1IcacheMemory
|
|
|
|
system.l1_cntrl0.L1IcacheMemory_total_misses: 0
|
|
|
|
system.l1_cntrl0.L1IcacheMemory_total_demand_misses: 0
|
|
|
|
system.l1_cntrl0.L1IcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl0.L1IcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl0.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl0.L1DcacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl0.L1DcacheMemory_total_misses: 153213
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 153213
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl0.L1DcacheMemory_request_type_LD: 64.988%
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_request_type_ST: 35.012%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl0.L1DcacheMemory_access_mode_type_SupervisorMode: 153213 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl0.L2cacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl0.L2cacheMemory_total_misses: 153213
|
|
|
|
system.l1_cntrl0.L2cacheMemory_total_demand_misses: 153213
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl0.L2cacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl0.L2cacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl0.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl0.L2cacheMemory_request_type_LD: 64.988%
|
|
|
|
system.l1_cntrl0.L2cacheMemory_request_type_ST: 35.012%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl0.L2cacheMemory_access_mode_type_SupervisorMode: 153213 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
--- L1Cache ---
|
2010-01-30 05:29:40 +01:00
|
|
|
- Event Counts -
|
2011-02-24 01:41:59 +01:00
|
|
|
Load [99913 99727 100093 99753 99626 99929 99694 99485 ] 798220
|
2010-08-21 02:44:26 +02:00
|
|
|
Ifetch [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
Store [53408 53512 53798 53606 53666 53913 53987 53777 ] 429667
|
|
|
|
L2_Replacement [153062 152979 153624 153129 153059 153587 153382 153011 ] 1225833
|
|
|
|
L1_to_L2 [1703641 1704544 1707097 1698377 1700701 1704894 1708215 1704790 ] 13632259
|
|
|
|
Trigger_L2_to_L1D [160 162 175 137 140 164 192 151 ] 1281
|
2010-08-21 02:44:26 +02:00
|
|
|
Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
Complete_L2_to_L1 [160 162 175 137 140 164 192 151 ] 1281
|
|
|
|
Other_GETX [375657 375556 375282 375450 375391 375150 375099 375303 ] 3002888
|
|
|
|
Other_GETS [697154 697340 696971 697292 697423 697136 697390 697559 ] 5578265
|
|
|
|
Merged_GETS [8 5 8 13 3 6 13 8 ] 64
|
2010-08-21 02:44:26 +02:00
|
|
|
Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
Invalidate [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
Ack [1066502 1065611 1070273 1066825 1066414 1070011 1068622 1066110 ] 8540368
|
|
|
|
Shared_Ack [115 119 110 96 98 118 109 121 ] 886
|
|
|
|
Data [5959 5967 5973 5842 5910 5904 5761 5814 ] 47130
|
|
|
|
Shared_Data [2080 2145 2106 2083 2029 2073 2131 2053 ] 16700
|
|
|
|
Exclusive_Data [145032 144875 145557 145214 145130 145617 145502 145154 ] 1162081
|
|
|
|
Writeback_Ack [144148 143915 144662 144412 144342 144857 144660 144311 ] 1155307
|
2010-08-21 02:44:26 +02:00
|
|
|
Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
All_acks [2183 2248 2197 2165 2115 2175 2229 2160 ] 17472
|
|
|
|
All_acks_no_sharers [150891 150740 151440 150974 150955 151420 151165 150862 ] 1208447
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
- Transitions -
|
2011-02-24 01:41:59 +01:00
|
|
|
I Load [99750 99564 99937 99608 99480 99765 99511 99345 ] 796960
|
2010-08-21 02:44:26 +02:00
|
|
|
I Ifetch [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
I Store [53323 53426 53700 53533 53590 53833 53884 53678 ] 428967
|
|
|
|
I L2_Replacement [2957 3080 3008 2899 2918 2935 2918 2980 ] 23695
|
|
|
|
I L1_to_L2 [647 666 647 640 647 644 647 637 ] 5175
|
|
|
|
I Trigger_L2_to_L1D [4 3 5 2 2 2 7 2 ] 27
|
2010-08-21 02:44:26 +02:00
|
|
|
I Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
I Other_GETX [373818 373710 373456 373671 373590 373358 373338 373473 ] 2988414
|
|
|
|
I Other_GETS [693803 693943 693553 693953 693978 693842 694042 694198 ] 5551312
|
2010-08-21 02:44:26 +02:00
|
|
|
I Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
I NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
I Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
S Load [8 4 4 4 3 2 3 3 ] 31
|
2010-08-21 02:44:26 +02:00
|
|
|
S Ifetch [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
S Store [1 1 2 1 2 0 1 2 ] 10
|
|
|
|
S L2_Replacement [5957 5984 5952 5818 5799 5795 5804 5720 ] 46829
|
|
|
|
S L1_to_L2 [6000 6041 6011 5871 5868 5847 5853 5775 ] 47266
|
|
|
|
S Trigger_L2_to_L1D [7 5 6 5 6 4 5 2 ] 40
|
2010-08-21 02:44:26 +02:00
|
|
|
S Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
S Other_GETX [54 71 66 61 77 59 58 68 ] 514
|
|
|
|
S Other_GETS [112 114 109 105 125 103 116 102 ] 886
|
2010-08-21 02:44:26 +02:00
|
|
|
S Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
S NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
S Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
O Load [0 0 1 0 1 2 2 0 ] 6
|
2010-08-21 02:44:26 +02:00
|
|
|
O Ifetch [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
O Store [3 1 1 0 1 1 0 1 ] 8
|
|
|
|
O L2_Replacement [2055 1985 2060 2062 2148 1994 2029 2060 ] 16393
|
|
|
|
O L1_to_L2 [471 446 457 433 437 434 458 445 ] 3581
|
|
|
|
O Trigger_L2_to_L1D [7 1 4 0 2 3 4 2 ] 23
|
2010-08-21 02:44:26 +02:00
|
|
|
O Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
O Other_GETX [16 14 15 11 14 15 8 13 ] 106
|
|
|
|
O Other_GETS [28 19 23 24 12 19 22 16 ] 163
|
|
|
|
O Merged_GETS [3 4 3 5 2 4 7 1 ] 29
|
2010-08-21 02:44:26 +02:00
|
|
|
O Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
O NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
O Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
M Load [47 50 34 38 49 45 60 45 ] 368
|
2010-08-21 02:44:26 +02:00
|
|
|
M Ifetch [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
M Store [26 20 33 19 19 17 26 26 ] 186
|
|
|
|
M L2_Replacement [90487 90399 90710 90546 90328 90787 90498 90384 ] 724139
|
|
|
|
M L1_to_L2 [93082 92904 93304 93110 93004 93296 93063 92951 ] 744714
|
|
|
|
M Trigger_L2_to_L1D [99 104 101 80 90 92 120 109 ] 795
|
2010-08-21 02:44:26 +02:00
|
|
|
M Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
M Other_GETX [1146 1084 1093 1087 1087 1092 1084 1067 ] 8740
|
|
|
|
M Other_GETS [2069 2000 2071 2065 2163 2008 2031 2067 ] 16474
|
|
|
|
M Merged_GETS [2 0 3 5 0 1 4 4 ] 19
|
2010-08-21 02:44:26 +02:00
|
|
|
M Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
M NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
M Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
MM Load [27 16 26 24 17 31 22 21 ] 184
|
2010-08-21 02:44:26 +02:00
|
|
|
MM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
MM Store [9 18 13 12 11 18 15 11 ] 107
|
|
|
|
MM L2_Replacement [51606 51531 51894 51804 51866 52076 52133 51867 ] 414777
|
|
|
|
MM L1_to_L2 [53029 53090 53386 53218 53249 53536 53559 53361 ] 426428
|
|
|
|
MM Trigger_L2_to_L1D [43 49 59 50 40 63 56 36 ] 396
|
2010-08-21 02:44:26 +02:00
|
|
|
MM Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
MM Other_GETX [617 668 645 605 614 619 604 674 ] 5046
|
|
|
|
MM Other_GETS [1124 1244 1192 1137 1127 1151 1167 1160 ] 9302
|
|
|
|
MM Merged_GETS [3 0 2 3 1 1 2 3 ] 15
|
2010-08-21 02:44:26 +02:00
|
|
|
MM Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
MM NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
MM Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
|
|
|
|
IM Load [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IM Store [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IM L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
IM L1_to_L2 [537833 545714 540792 536611 542269 543523 549010 543128 ] 4338880
|
|
|
|
IM Other_GETX [1 4 1 4 3 3 3 2 ] 21
|
|
|
|
IM Other_GETS [3 6 4 0 3 1 3 3 ] 23
|
2010-08-21 02:44:26 +02:00
|
|
|
IM Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
IM NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
IM Invalidate [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
IM Ack [366480 366723 369003 367797 368111 369500 370499 368866 ] 2946979
|
|
|
|
IM Data [2025 2055 2056 2044 2059 2123 2028 2074 ] 16464
|
|
|
|
IM Exclusive_Data [51296 51369 51643 51488 51528 51709 51856 51601 ] 412490
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
SM Load [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SM Store [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SM L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
SM L1_to_L2 [5 3 3 0 3 0 0 3 ] 17
|
2011-02-09 03:07:54 +01:00
|
|
|
SM Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
SM Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SM Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
SM NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
SM Invalidate [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
SM Ack [7 7 14 7 12 0 7 14 ] 68
|
|
|
|
SM Data [1 1 2 1 2 0 1 2 ] 10
|
2011-02-09 03:07:54 +01:00
|
|
|
SM Exclusive_Data [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
OM Load [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OM Store [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OM L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
OM L1_to_L2 [0 0 13 0 0 0 0 10 ] 23
|
2011-02-09 03:07:54 +01:00
|
|
|
OM Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
OM Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OM Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OM Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
OM NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
OM Invalidate [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
OM Ack [21 7 7 0 7 7 0 7 ] 56
|
2010-08-21 02:44:26 +02:00
|
|
|
OM All_acks [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
OM All_acks_no_sharers [3 1 1 0 1 1 0 1 ] 8
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
ISM Load [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
ISM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
ISM Store [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
ISM L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
ISM L1_to_L2 [17 6 0 0 0 0 0 0 ] 23
|
|
|
|
ISM Ack [66 76 43 31 35 38 34 51 ] 374
|
|
|
|
ISM All_acks_no_sharers [2026 2056 2058 2045 2061 2123 2029 2076 ] 16474
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
M_W Load [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
M_W Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
M_W Store [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
M_W L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
M_W L1_to_L2 [38 69 88 42 90 112 70 83 ] 592
|
|
|
|
M_W Ack [3352 3658 3551 3465 3460 3459 3415 3426 ] 27786
|
|
|
|
M_W All_acks_no_sharers [93736 93506 93914 93726 93602 93908 93646 93553 ] 749591
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
MM_W Load [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MM_W Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MM_W Store [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MM_W L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
MM_W L1_to_L2 [72 120 137 81 70 152 83 104 ] 819
|
|
|
|
MM_W Ack [5046 5371 5115 5121 5255 5486 4940 5149 ] 41483
|
|
|
|
MM_W All_acks_no_sharers [51296 51369 51643 51488 51528 51709 51856 51601 ] 412490
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
IS Load [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IS Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IS Store [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IS L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
IS L1_to_L2 [1011844 1004759 1011592 1007827 1004476 1006671 1004653 1007634 ] 8059456
|
|
|
|
IS Other_GETX [1 3 4 6 5 2 2 2 ] 25
|
|
|
|
IS Other_GETS [13 6 15 7 10 6 7 9 ] 73
|
2010-08-21 02:44:26 +02:00
|
|
|
IS Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
IS NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
IS Invalidate [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
IS Ack [685197 683360 686266 683975 683583 685323 683273 682541 ] 5473518
|
|
|
|
IS Shared_Ack [107 110 101 89 94 113 104 114 ] 832
|
|
|
|
IS Data [3933 3911 3915 3797 3849 3781 3732 3738 ] 30656
|
|
|
|
IS Shared_Data [2080 2145 2106 2083 2029 2073 2131 2053 ] 16700
|
|
|
|
IS Exclusive_Data [93736 93506 93914 93726 93602 93908 93646 93553 ] 749591
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
SS Load [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SS Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SS Store [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SS L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
SS L1_to_L2 [85 168 135 117 120 81 154 151 ] 1011
|
|
|
|
SS Ack [6333 6409 6274 6429 5951 6198 6454 6056 ] 50104
|
|
|
|
SS Shared_Ack [8 9 9 7 4 5 5 7 ] 54
|
|
|
|
SS All_acks [2183 2248 2197 2165 2115 2175 2229 2160 ] 17472
|
|
|
|
SS All_acks_no_sharers [3830 3808 3824 3715 3763 3679 3634 3631 ] 29884
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
OI Load [1 0 1 0 0 0 1 0 ] 3
|
2010-08-21 02:44:26 +02:00
|
|
|
OI Ifetch [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
OI Store [0 1 0 0 0 0 1 0 ] 2
|
2010-08-21 02:44:26 +02:00
|
|
|
OI L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OI L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OI Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OI Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
OI Merged_GETS [0 1 0 0 0 0 0 0 ] 1
|
2010-08-21 02:44:26 +02:00
|
|
|
OI Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
OI NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
OI Invalidate [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
OI Writeback_Ack [2057 1993 2064 2063 2153 2000 2031 2064 ] 16425
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
MI Load [16 24 21 18 21 11 18 16 ] 145
|
2010-08-21 02:44:26 +02:00
|
|
|
MI Ifetch [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
MI Store [9 8 8 12 13 13 10 15 ] 88
|
2010-08-21 02:44:26 +02:00
|
|
|
MI L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MI L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
MI Other_GETX [4 2 2 5 1 2 2 4 ] 22
|
|
|
|
MI Other_GETS [2 8 4 1 5 6 2 4 ] 32
|
2010-08-21 02:44:26 +02:00
|
|
|
MI Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MI Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
MI NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
MI Invalidate [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
MI Writeback_Ack [142087 141920 142596 142344 142188 142855 142627 142243 ] 1138860
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
II Load [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
II Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
II Store [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
II L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
II L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
II Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
II Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
II Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
II NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
II Invalidate [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
II Writeback_Ack [4 2 2 5 1 2 2 4 ] 22
|
2010-08-21 02:44:26 +02:00
|
|
|
II Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
IT Load [4 3 0 1 0 1 4 1 ] 14
|
2010-08-21 02:44:26 +02:00
|
|
|
IT Ifetch [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
IT Store [0 0 2 0 1 0 1 1 ] 5
|
2010-08-21 02:44:26 +02:00
|
|
|
IT L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
IT L1_to_L2 [22 19 3 0 1 9 19 3 ] 76
|
|
|
|
IT Complete_L2_to_L1 [4 3 5 2 2 2 7 2 ] 27
|
2010-08-21 02:44:26 +02:00
|
|
|
IT Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IT Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IT Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IT Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
IT NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
IT Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
ST Load [0 1 3 3 1 3 2 0 ] 13
|
2010-08-21 02:44:26 +02:00
|
|
|
ST Ifetch [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
ST Store [0 2 0 0 3 0 1 1 ] 7
|
2010-08-21 02:44:26 +02:00
|
|
|
ST L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
ST L1_to_L2 [0 11 2 35 20 37 19 0 ] 124
|
|
|
|
ST Complete_L2_to_L1 [7 5 6 5 6 4 5 2 ] 40
|
2010-08-21 02:44:26 +02:00
|
|
|
ST Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
ST Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
ST Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
ST Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
ST NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
ST Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
OT Load [3 0 2 0 0 1 0 1 ] 7
|
2010-08-21 02:44:26 +02:00
|
|
|
OT Ifetch [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
OT Store [2 0 1 0 0 1 2 1 ] 7
|
2010-08-21 02:44:26 +02:00
|
|
|
OT L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
OT L1_to_L2 [18 0 36 0 0 0 9 16 ] 79
|
|
|
|
OT Complete_L2_to_L1 [7 1 4 0 2 3 4 2 ] 23
|
2010-08-21 02:44:26 +02:00
|
|
|
OT Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OT Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OT Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OT Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
OT NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
OT Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
MT Load [42 47 46 36 41 44 49 36 ] 341
|
2010-08-21 02:44:26 +02:00
|
|
|
MT Ifetch [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
MT Store [23 22 22 17 16 16 26 35 ] 177
|
2010-08-21 02:44:26 +02:00
|
|
|
MT L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
MT L1_to_L2 [360 349 336 258 281 343 350 393 ] 2670
|
|
|
|
MT Complete_L2_to_L1 [99 104 101 80 90 92 120 109 ] 795
|
2010-08-21 02:44:26 +02:00
|
|
|
MT Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MT Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MT Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MT Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
MT NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
MT Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
MMT Load [15 18 18 21 13 24 22 17 ] 148
|
2010-08-21 02:44:26 +02:00
|
|
|
MMT Ifetch [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
MMT Store [12 13 16 12 10 14 20 6 ] 103
|
2010-08-21 02:44:26 +02:00
|
|
|
MMT L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
MMT L1_to_L2 [118 179 155 134 166 209 268 96 ] 1325
|
|
|
|
MMT Complete_L2_to_L1 [43 49 59 50 40 63 56 36 ] 396
|
2010-08-21 02:44:26 +02:00
|
|
|
MMT Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MMT Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MMT Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MMT Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
MMT NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
MMT Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl1.L1IcacheMemory
|
|
|
|
system.l1_cntrl1.L1IcacheMemory_total_misses: 0
|
|
|
|
system.l1_cntrl1.L1IcacheMemory_total_demand_misses: 0
|
|
|
|
system.l1_cntrl1.L1IcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl1.L1IcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl1.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl1.L1DcacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl1.L1DcacheMemory_total_misses: 153763
|
|
|
|
system.l1_cntrl1.L1DcacheMemory_total_demand_misses: 153763
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl1.L1DcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl1.L1DcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl1.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl1.L1DcacheMemory_request_type_LD: 64.9565%
|
|
|
|
system.l1_cntrl1.L1DcacheMemory_request_type_ST: 35.0435%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl1.L1DcacheMemory_access_mode_type_SupervisorMode: 153763 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl1.L2cacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl1.L2cacheMemory_total_misses: 153763
|
|
|
|
system.l1_cntrl1.L2cacheMemory_total_demand_misses: 153763
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl1.L2cacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl1.L2cacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl1.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl1.L2cacheMemory_request_type_LD: 64.9565%
|
|
|
|
system.l1_cntrl1.L2cacheMemory_request_type_ST: 35.0435%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl1.L2cacheMemory_access_mode_type_SupervisorMode: 153763 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl2.L1IcacheMemory
|
|
|
|
system.l1_cntrl2.L1IcacheMemory_total_misses: 0
|
|
|
|
system.l1_cntrl2.L1IcacheMemory_total_demand_misses: 0
|
|
|
|
system.l1_cntrl2.L1IcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl2.L1IcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl2.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl2.L1DcacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl2.L1DcacheMemory_total_misses: 153588
|
|
|
|
system.l1_cntrl2.L1DcacheMemory_total_demand_misses: 153588
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl2.L1DcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl2.L1DcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl2.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl2.L1DcacheMemory_request_type_LD: 64.8703%
|
|
|
|
system.l1_cntrl2.L1DcacheMemory_request_type_ST: 35.1297%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl2.L1DcacheMemory_access_mode_type_SupervisorMode: 153588 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl2.L2cacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl2.L2cacheMemory_total_misses: 153588
|
|
|
|
system.l1_cntrl2.L2cacheMemory_total_demand_misses: 153588
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl2.L2cacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl2.L2cacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl2.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl2.L2cacheMemory_request_type_LD: 64.8703%
|
|
|
|
system.l1_cntrl2.L2cacheMemory_request_type_ST: 35.1297%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl2.L2cacheMemory_access_mode_type_SupervisorMode: 153588 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl3.L1IcacheMemory
|
|
|
|
system.l1_cntrl3.L1IcacheMemory_total_misses: 0
|
|
|
|
system.l1_cntrl3.L1IcacheMemory_total_demand_misses: 0
|
|
|
|
system.l1_cntrl3.L1IcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl3.L1IcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl3.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl3.L1DcacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl3.L1DcacheMemory_total_misses: 153177
|
|
|
|
system.l1_cntrl3.L1DcacheMemory_total_demand_misses: 153177
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl3.L1DcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl3.L1DcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl3.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl3.L1DcacheMemory_request_type_LD: 64.9158%
|
|
|
|
system.l1_cntrl3.L1DcacheMemory_request_type_ST: 35.0842%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl3.L1DcacheMemory_access_mode_type_SupervisorMode: 153177 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl3.L2cacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl3.L2cacheMemory_total_misses: 153177
|
|
|
|
system.l1_cntrl3.L2cacheMemory_total_demand_misses: 153177
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl3.L2cacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl3.L2cacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl3.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl3.L2cacheMemory_request_type_LD: 64.9158%
|
|
|
|
system.l1_cntrl3.L2cacheMemory_request_type_ST: 35.0842%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl3.L2cacheMemory_access_mode_type_SupervisorMode: 153177 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl4.L1IcacheMemory
|
|
|
|
system.l1_cntrl4.L1IcacheMemory_total_misses: 0
|
|
|
|
system.l1_cntrl4.L1IcacheMemory_total_demand_misses: 0
|
|
|
|
system.l1_cntrl4.L1IcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl4.L1IcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl4.L1IcacheMemory_total_hw_prefetches: 0
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
|
2010-08-21 02:44:26 +02:00
|
|
|
Cache Stats: system.l1_cntrl4.L1DcacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl4.L1DcacheMemory_total_misses: 153237
|
|
|
|
system.l1_cntrl4.L1DcacheMemory_total_demand_misses: 153237
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl4.L1DcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl4.L1DcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl4.L1DcacheMemory_total_hw_prefetches: 0
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl4.L1DcacheMemory_request_type_LD: 65.1631%
|
|
|
|
system.l1_cntrl4.L1DcacheMemory_request_type_ST: 34.8369%
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl4.L1DcacheMemory_access_mode_type_SupervisorMode: 153237 100%
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2010-08-21 02:44:26 +02:00
|
|
|
Cache Stats: system.l1_cntrl4.L2cacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl4.L2cacheMemory_total_misses: 153237
|
|
|
|
system.l1_cntrl4.L2cacheMemory_total_demand_misses: 153237
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl4.L2cacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl4.L2cacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl4.L2cacheMemory_total_hw_prefetches: 0
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl4.L2cacheMemory_request_type_LD: 65.1631%
|
|
|
|
system.l1_cntrl4.L2cacheMemory_request_type_ST: 34.8369%
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl4.L2cacheMemory_access_mode_type_SupervisorMode: 153237 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl5.L1IcacheMemory
|
|
|
|
system.l1_cntrl5.L1IcacheMemory_total_misses: 0
|
|
|
|
system.l1_cntrl5.L1IcacheMemory_total_demand_misses: 0
|
|
|
|
system.l1_cntrl5.L1IcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl5.L1IcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl5.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl5.L1DcacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl5.L1DcacheMemory_total_misses: 153154
|
|
|
|
system.l1_cntrl5.L1DcacheMemory_total_demand_misses: 153154
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl5.L1DcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl5.L1DcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl5.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl5.L1DcacheMemory_request_type_LD: 65.0802%
|
|
|
|
system.l1_cntrl5.L1DcacheMemory_request_type_ST: 34.9198%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl5.L1DcacheMemory_access_mode_type_SupervisorMode: 153154 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl5.L2cacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl5.L2cacheMemory_total_misses: 153154
|
|
|
|
system.l1_cntrl5.L2cacheMemory_total_demand_misses: 153154
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl5.L2cacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl5.L2cacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl5.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl5.L2cacheMemory_request_type_LD: 65.0802%
|
|
|
|
system.l1_cntrl5.L2cacheMemory_request_type_ST: 34.9198%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl5.L2cacheMemory_access_mode_type_SupervisorMode: 153154 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl6.L1IcacheMemory
|
|
|
|
system.l1_cntrl6.L1IcacheMemory_total_misses: 0
|
|
|
|
system.l1_cntrl6.L1IcacheMemory_total_demand_misses: 0
|
|
|
|
system.l1_cntrl6.L1IcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl6.L1IcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl6.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl6.L1DcacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl6.L1DcacheMemory_total_misses: 153815
|
|
|
|
system.l1_cntrl6.L1DcacheMemory_total_demand_misses: 153815
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl6.L1DcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl6.L1DcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl6.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl6.L1DcacheMemory_request_type_LD: 65.0437%
|
|
|
|
system.l1_cntrl6.L1DcacheMemory_request_type_ST: 34.9563%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl6.L1DcacheMemory_access_mode_type_SupervisorMode: 153815 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl6.L2cacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl6.L2cacheMemory_total_misses: 153815
|
|
|
|
system.l1_cntrl6.L2cacheMemory_total_demand_misses: 153815
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl6.L2cacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl6.L2cacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl6.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl6.L2cacheMemory_request_type_LD: 65.0437%
|
|
|
|
system.l1_cntrl6.L2cacheMemory_request_type_ST: 34.9563%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl6.L2cacheMemory_access_mode_type_SupervisorMode: 153815 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl7.L1IcacheMemory
|
|
|
|
system.l1_cntrl7.L1IcacheMemory_total_misses: 0
|
|
|
|
system.l1_cntrl7.L1IcacheMemory_total_demand_misses: 0
|
|
|
|
system.l1_cntrl7.L1IcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl7.L1IcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl7.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl7.L1DcacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl7.L1DcacheMemory_total_misses: 153279
|
|
|
|
system.l1_cntrl7.L1DcacheMemory_total_demand_misses: 153279
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl7.L1DcacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl7.L1DcacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl7.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl7.L1DcacheMemory_request_type_LD: 65.0441%
|
|
|
|
system.l1_cntrl7.L1DcacheMemory_request_type_ST: 34.9559%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl7.L1DcacheMemory_access_mode_type_SupervisorMode: 153279 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl7.L2cacheMemory
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl7.L2cacheMemory_total_misses: 153279
|
|
|
|
system.l1_cntrl7.L2cacheMemory_total_demand_misses: 153279
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl7.L2cacheMemory_total_prefetches: 0
|
|
|
|
system.l1_cntrl7.L2cacheMemory_total_sw_prefetches: 0
|
|
|
|
system.l1_cntrl7.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl7.L2cacheMemory_request_type_LD: 65.0441%
|
|
|
|
system.l1_cntrl7.L2cacheMemory_request_type_ST: 34.9559%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
system.l1_cntrl7.L2cacheMemory_access_mode_type_SupervisorMode: 153279 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
Cache Stats: system.dir_cntrl0.probeFilter
|
|
|
|
system.dir_cntrl0.probeFilter_total_misses: 0
|
|
|
|
system.dir_cntrl0.probeFilter_total_demand_misses: 0
|
|
|
|
system.dir_cntrl0.probeFilter_total_prefetches: 0
|
|
|
|
system.dir_cntrl0.probeFilter_total_sw_prefetches: 0
|
|
|
|
system.dir_cntrl0.probeFilter_total_hw_prefetches: 0
|
|
|
|
|
|
|
|
|
|
|
|
Memory controller: system.dir_cntrl0.memBuffer:
|
2011-02-24 01:41:59 +01:00
|
|
|
memory_total_requests: 1609981
|
|
|
|
memory_reads: 1185963
|
|
|
|
memory_writes: 423985
|
|
|
|
memory_refreshes: 79522
|
|
|
|
memory_total_request_delays: 102736888
|
|
|
|
memory_delays_per_request: 63.8125
|
|
|
|
memory_delays_in_input_queue: 1305009
|
|
|
|
memory_delays_behind_head_of_bank_queue: 41957892
|
|
|
|
memory_delays_stalled_at_head_of_bank_queue: 59473987
|
|
|
|
memory_stalls_for_bank_busy: 8959268
|
2010-01-30 05:29:40 +01:00
|
|
|
memory_stalls_for_random_busy: 0
|
2011-02-24 01:41:59 +01:00
|
|
|
memory_stalls_for_anti_starvation: 15134582
|
|
|
|
memory_stalls_for_arbitration: 12165653
|
|
|
|
memory_stalls_for_bus: 16470146
|
2010-01-30 05:29:40 +01:00
|
|
|
memory_stalls_for_tfaw: 0
|
2011-02-24 01:41:59 +01:00
|
|
|
memory_stalls_for_read_write_turnaround: 4050803
|
|
|
|
memory_stalls_for_read_read_turnaround: 2693535
|
|
|
|
accesses_per_bank: 50661 50565 50395 50504 50627 50792 50764 50106 50714 50435 50690 50451 50295 50426 50276 49984 50416 50127 50598 50184 50082 50041 50053 50105 50266 49862 50022 49817 50220 49980 50480 50043
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2010-08-21 02:44:26 +02:00
|
|
|
--- Directory ---
|
2010-01-30 05:29:40 +01:00
|
|
|
- Event Counts -
|
2011-02-24 01:41:59 +01:00
|
|
|
GETX [435302 ] 435302
|
|
|
|
GETS [808781 ] 808781
|
|
|
|
PUT [1155773 ] 1155773
|
|
|
|
Unblock [22 ] 22
|
|
|
|
UnblockS [47356 ] 47356
|
|
|
|
UnblockM [1178562 ] 1178562
|
|
|
|
Writeback_Clean [16247 ] 16247
|
|
|
|
Writeback_Dirty [178 ] 178
|
|
|
|
Writeback_Exclusive_Clean [715041 ] 715041
|
|
|
|
Writeback_Exclusive_Dirty [423817 ] 423817
|
2010-08-21 02:44:26 +02:00
|
|
|
Pf_Replacement [0 ] 0
|
|
|
|
DMA_READ [0 ] 0
|
|
|
|
DMA_WRITE [0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
Memory_Data [1185962 ] 1185962
|
|
|
|
Memory_Ack [423981 ] 423981
|
2010-08-21 02:44:26 +02:00
|
|
|
Ack [0 ] 0
|
|
|
|
Shared_Ack [0 ] 0
|
|
|
|
Shared_Data [0 ] 0
|
|
|
|
Data [0 ] 0
|
|
|
|
Exclusive_Data [0 ] 0
|
|
|
|
All_acks_and_shared_data [0 ] 0
|
|
|
|
All_acks_and_owner_data [0 ] 0
|
|
|
|
All_acks_and_data_no_sharers [0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
All_Unblocks [64 ] 64
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
- Transitions -
|
2011-02-24 01:41:59 +01:00
|
|
|
NX GETX [114 ] 114
|
|
|
|
NX GETS [164 ] 164
|
|
|
|
NX PUT [16446 ] 16446
|
2010-08-21 02:44:26 +02:00
|
|
|
NX Pf_Replacement [0 ] 0
|
|
|
|
NX DMA_READ [0 ] 0
|
|
|
|
NX DMA_WRITE [0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
NO GETX [13808 ] 13808
|
|
|
|
NO GETS [25807 ] 25807
|
|
|
|
NO PUT [1138861 ] 1138861
|
2010-08-21 02:44:26 +02:00
|
|
|
NO Pf_Replacement [0 ] 0
|
|
|
|
NO DMA_READ [0 ] 0
|
|
|
|
NO DMA_WRITE [0 ] 0
|
|
|
|
|
|
|
|
S GETX [0 ] 0
|
|
|
|
S GETS [0 ] 0
|
|
|
|
S PUT [0 ] 0
|
|
|
|
S Pf_Replacement [0 ] 0
|
|
|
|
S DMA_READ [0 ] 0
|
|
|
|
S DMA_WRITE [0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
O GETX [16346 ] 16346
|
|
|
|
O GETS [30623 ] 30623
|
2010-08-21 02:44:26 +02:00
|
|
|
O PUT [0 ] 0
|
|
|
|
O Pf_Replacement [0 ] 0
|
|
|
|
O DMA_READ [0 ] 0
|
|
|
|
O DMA_WRITE [0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
E GETX [398716 ] 398716
|
|
|
|
E GETS [740301 ] 740301
|
2010-08-21 02:44:26 +02:00
|
|
|
E PUT [0 ] 0
|
|
|
|
E DMA_READ [0 ] 0
|
|
|
|
E DMA_WRITE [0 ] 0
|
|
|
|
|
|
|
|
O_R GETX [0 ] 0
|
|
|
|
O_R GETS [0 ] 0
|
|
|
|
O_R PUT [0 ] 0
|
|
|
|
O_R Pf_Replacement [0 ] 0
|
|
|
|
O_R DMA_READ [0 ] 0
|
|
|
|
O_R DMA_WRITE [0 ] 0
|
|
|
|
O_R Ack [0 ] 0
|
|
|
|
O_R All_acks_and_data_no_sharers [0 ] 0
|
|
|
|
|
|
|
|
S_R GETX [0 ] 0
|
|
|
|
S_R GETS [0 ] 0
|
|
|
|
S_R PUT [0 ] 0
|
|
|
|
S_R Pf_Replacement [0 ] 0
|
|
|
|
S_R DMA_READ [0 ] 0
|
|
|
|
S_R DMA_WRITE [0 ] 0
|
|
|
|
S_R Ack [0 ] 0
|
|
|
|
S_R Data [0 ] 0
|
|
|
|
S_R All_acks_and_data_no_sharers [0 ] 0
|
|
|
|
|
|
|
|
NO_R GETX [0 ] 0
|
|
|
|
NO_R GETS [0 ] 0
|
|
|
|
NO_R PUT [0 ] 0
|
|
|
|
NO_R Pf_Replacement [0 ] 0
|
|
|
|
NO_R DMA_READ [0 ] 0
|
|
|
|
NO_R DMA_WRITE [0 ] 0
|
|
|
|
NO_R Ack [0 ] 0
|
|
|
|
NO_R Data [0 ] 0
|
|
|
|
NO_R Exclusive_Data [0 ] 0
|
|
|
|
NO_R All_acks_and_data_no_sharers [0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
NO_B GETX [31 ] 31
|
|
|
|
NO_B GETS [64 ] 64
|
|
|
|
NO_B PUT [465 ] 465
|
|
|
|
NO_B UnblockS [16634 ] 16634
|
|
|
|
NO_B UnblockM [1178502 ] 1178502
|
2010-08-21 02:44:26 +02:00
|
|
|
NO_B Pf_Replacement [0 ] 0
|
|
|
|
NO_B DMA_READ [0 ] 0
|
|
|
|
NO_B DMA_WRITE [0 ] 0
|
|
|
|
|
2011-02-09 03:07:54 +01:00
|
|
|
NO_B_X GETX [0 ] 0
|
|
|
|
NO_B_X GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
NO_B_X PUT [0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
NO_B_X UnblockS [5 ] 5
|
|
|
|
NO_B_X UnblockM [26 ] 26
|
2010-08-21 02:44:26 +02:00
|
|
|
NO_B_X Pf_Replacement [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
NO_B_X DMA_READ [0 ] 0
|
|
|
|
NO_B_X DMA_WRITE [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-09 03:07:54 +01:00
|
|
|
NO_B_S GETX [0 ] 0
|
|
|
|
NO_B_S GETS [0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
NO_B_S PUT [1 ] 1
|
|
|
|
NO_B_S UnblockS [30 ] 30
|
2011-02-09 03:07:54 +01:00
|
|
|
NO_B_S UnblockM [34 ] 34
|
2010-08-21 02:44:26 +02:00
|
|
|
NO_B_S Pf_Replacement [0 ] 0
|
|
|
|
NO_B_S DMA_READ [0 ] 0
|
|
|
|
NO_B_S DMA_WRITE [0 ] 0
|
|
|
|
|
2011-02-09 03:07:54 +01:00
|
|
|
NO_B_S_W GETX [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
NO_B_S_W GETS [0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
NO_B_S_W PUT [0 ] 0
|
|
|
|
NO_B_S_W UnblockS [64 ] 64
|
2010-08-21 02:44:26 +02:00
|
|
|
NO_B_S_W Pf_Replacement [0 ] 0
|
|
|
|
NO_B_S_W DMA_READ [0 ] 0
|
|
|
|
NO_B_S_W DMA_WRITE [0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
NO_B_S_W All_Unblocks [64 ] 64
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
O_B GETX [0 ] 0
|
|
|
|
O_B GETS [0 ] 0
|
|
|
|
O_B PUT [0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
O_B UnblockS [30623 ] 30623
|
2011-02-09 03:07:54 +01:00
|
|
|
O_B UnblockM [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
O_B Pf_Replacement [0 ] 0
|
|
|
|
O_B DMA_READ [0 ] 0
|
|
|
|
O_B DMA_WRITE [0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
NO_B_W GETX [3987 ] 3987
|
|
|
|
NO_B_W GETS [7416 ] 7416
|
2010-08-21 02:44:26 +02:00
|
|
|
NO_B_W PUT [0 ] 0
|
|
|
|
NO_B_W UnblockS [0 ] 0
|
|
|
|
NO_B_W UnblockM [0 ] 0
|
|
|
|
NO_B_W Pf_Replacement [0 ] 0
|
|
|
|
NO_B_W DMA_READ [0 ] 0
|
|
|
|
NO_B_W DMA_WRITE [0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
NO_B_W Memory_Data [1155339 ] 1155339
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
O_B_W GETX [95 ] 95
|
|
|
|
O_B_W GETS [209 ] 209
|
2010-08-21 02:44:26 +02:00
|
|
|
O_B_W PUT [0 ] 0
|
|
|
|
O_B_W UnblockS [0 ] 0
|
|
|
|
O_B_W Pf_Replacement [0 ] 0
|
|
|
|
O_B_W DMA_READ [0 ] 0
|
|
|
|
O_B_W DMA_WRITE [0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
O_B_W Memory_Data [30623 ] 30623
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
NO_W GETX [0 ] 0
|
|
|
|
NO_W GETS [0 ] 0
|
|
|
|
NO_W PUT [0 ] 0
|
|
|
|
NO_W Pf_Replacement [0 ] 0
|
|
|
|
NO_W DMA_READ [0 ] 0
|
|
|
|
NO_W DMA_WRITE [0 ] 0
|
|
|
|
NO_W Memory_Data [0 ] 0
|
|
|
|
|
|
|
|
O_W GETX [0 ] 0
|
|
|
|
O_W GETS [0 ] 0
|
|
|
|
O_W PUT [0 ] 0
|
|
|
|
O_W Pf_Replacement [0 ] 0
|
|
|
|
O_W DMA_READ [0 ] 0
|
|
|
|
O_W DMA_WRITE [0 ] 0
|
|
|
|
O_W Memory_Data [0 ] 0
|
|
|
|
|
|
|
|
NO_DW_B_W GETX [0 ] 0
|
|
|
|
NO_DW_B_W GETS [0 ] 0
|
|
|
|
NO_DW_B_W PUT [0 ] 0
|
|
|
|
NO_DW_B_W Pf_Replacement [0 ] 0
|
|
|
|
NO_DW_B_W DMA_READ [0 ] 0
|
|
|
|
NO_DW_B_W DMA_WRITE [0 ] 0
|
|
|
|
NO_DW_B_W Ack [0 ] 0
|
|
|
|
NO_DW_B_W Data [0 ] 0
|
|
|
|
NO_DW_B_W Exclusive_Data [0 ] 0
|
|
|
|
NO_DW_B_W All_acks_and_data_no_sharers [0 ] 0
|
|
|
|
|
|
|
|
NO_DR_B_W GETX [0 ] 0
|
|
|
|
NO_DR_B_W GETS [0 ] 0
|
|
|
|
NO_DR_B_W PUT [0 ] 0
|
|
|
|
NO_DR_B_W Pf_Replacement [0 ] 0
|
|
|
|
NO_DR_B_W DMA_READ [0 ] 0
|
|
|
|
NO_DR_B_W DMA_WRITE [0 ] 0
|
|
|
|
NO_DR_B_W Memory_Data [0 ] 0
|
|
|
|
NO_DR_B_W Ack [0 ] 0
|
|
|
|
NO_DR_B_W Shared_Ack [0 ] 0
|
|
|
|
NO_DR_B_W Shared_Data [0 ] 0
|
|
|
|
NO_DR_B_W Data [0 ] 0
|
|
|
|
NO_DR_B_W Exclusive_Data [0 ] 0
|
|
|
|
|
|
|
|
NO_DR_B_D GETX [0 ] 0
|
|
|
|
NO_DR_B_D GETS [0 ] 0
|
|
|
|
NO_DR_B_D PUT [0 ] 0
|
|
|
|
NO_DR_B_D Pf_Replacement [0 ] 0
|
|
|
|
NO_DR_B_D DMA_READ [0 ] 0
|
|
|
|
NO_DR_B_D DMA_WRITE [0 ] 0
|
|
|
|
NO_DR_B_D Ack [0 ] 0
|
|
|
|
NO_DR_B_D Shared_Ack [0 ] 0
|
|
|
|
NO_DR_B_D Shared_Data [0 ] 0
|
|
|
|
NO_DR_B_D Data [0 ] 0
|
|
|
|
NO_DR_B_D Exclusive_Data [0 ] 0
|
|
|
|
NO_DR_B_D All_acks_and_shared_data [0 ] 0
|
|
|
|
NO_DR_B_D All_acks_and_owner_data [0 ] 0
|
|
|
|
NO_DR_B_D All_acks_and_data_no_sharers [0 ] 0
|
|
|
|
|
|
|
|
NO_DR_B GETX [0 ] 0
|
|
|
|
NO_DR_B GETS [0 ] 0
|
|
|
|
NO_DR_B PUT [0 ] 0
|
|
|
|
NO_DR_B Pf_Replacement [0 ] 0
|
|
|
|
NO_DR_B DMA_READ [0 ] 0
|
|
|
|
NO_DR_B DMA_WRITE [0 ] 0
|
|
|
|
NO_DR_B Ack [0 ] 0
|
|
|
|
NO_DR_B Shared_Ack [0 ] 0
|
|
|
|
NO_DR_B Shared_Data [0 ] 0
|
|
|
|
NO_DR_B Data [0 ] 0
|
|
|
|
NO_DR_B Exclusive_Data [0 ] 0
|
|
|
|
NO_DR_B All_acks_and_shared_data [0 ] 0
|
|
|
|
NO_DR_B All_acks_and_owner_data [0 ] 0
|
|
|
|
NO_DR_B All_acks_and_data_no_sharers [0 ] 0
|
|
|
|
|
|
|
|
NO_DW_W GETX [0 ] 0
|
|
|
|
NO_DW_W GETS [0 ] 0
|
|
|
|
NO_DW_W PUT [0 ] 0
|
|
|
|
NO_DW_W Pf_Replacement [0 ] 0
|
|
|
|
NO_DW_W DMA_READ [0 ] 0
|
|
|
|
NO_DW_W DMA_WRITE [0 ] 0
|
|
|
|
NO_DW_W Memory_Ack [0 ] 0
|
|
|
|
|
|
|
|
O_DR_B_W GETX [0 ] 0
|
|
|
|
O_DR_B_W GETS [0 ] 0
|
|
|
|
O_DR_B_W PUT [0 ] 0
|
|
|
|
O_DR_B_W Pf_Replacement [0 ] 0
|
|
|
|
O_DR_B_W DMA_READ [0 ] 0
|
|
|
|
O_DR_B_W DMA_WRITE [0 ] 0
|
|
|
|
O_DR_B_W Memory_Data [0 ] 0
|
|
|
|
O_DR_B_W Ack [0 ] 0
|
|
|
|
O_DR_B_W Shared_Ack [0 ] 0
|
|
|
|
|
|
|
|
O_DR_B GETX [0 ] 0
|
|
|
|
O_DR_B GETS [0 ] 0
|
|
|
|
O_DR_B PUT [0 ] 0
|
|
|
|
O_DR_B Pf_Replacement [0 ] 0
|
|
|
|
O_DR_B DMA_READ [0 ] 0
|
|
|
|
O_DR_B DMA_WRITE [0 ] 0
|
|
|
|
O_DR_B Ack [0 ] 0
|
|
|
|
O_DR_B Shared_Ack [0 ] 0
|
|
|
|
O_DR_B All_acks_and_owner_data [0 ] 0
|
|
|
|
O_DR_B All_acks_and_data_no_sharers [0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
WB GETX [160 ] 160
|
|
|
|
WB GETS [342 ] 342
|
2010-08-21 02:44:26 +02:00
|
|
|
WB PUT [0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
WB Unblock [22 ] 22
|
|
|
|
WB Writeback_Clean [16247 ] 16247
|
|
|
|
WB Writeback_Dirty [178 ] 178
|
|
|
|
WB Writeback_Exclusive_Clean [715041 ] 715041
|
|
|
|
WB Writeback_Exclusive_Dirty [423817 ] 423817
|
2010-08-21 02:44:26 +02:00
|
|
|
WB Pf_Replacement [0 ] 0
|
|
|
|
WB DMA_READ [0 ] 0
|
|
|
|
WB DMA_WRITE [0 ] 0
|
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
WB_O_W GETX [2 ] 2
|
|
|
|
WB_O_W GETS [2 ] 2
|
2010-08-21 02:44:26 +02:00
|
|
|
WB_O_W PUT [0 ] 0
|
|
|
|
WB_O_W Pf_Replacement [0 ] 0
|
|
|
|
WB_O_W DMA_READ [0 ] 0
|
|
|
|
WB_O_W DMA_WRITE [0 ] 0
|
2011-02-24 01:41:59 +01:00
|
|
|
WB_O_W Memory_Ack [178 ] 178
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-24 01:41:59 +01:00
|
|
|
WB_E_W GETX [2043 ] 2043
|
|
|
|
WB_E_W GETS [3853 ] 3853
|
2010-08-21 02:44:26 +02:00
|
|
|
WB_E_W PUT [0 ] 0
|
|
|
|
WB_E_W Pf_Replacement [0 ] 0
|
|
|
|
WB_E_W DMA_READ [0 ] 0
|
|
|
|
WB_E_W DMA_WRITE [0 ] 0
|
|
|
|
WB_E_W Memory_Ack
|