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gem5/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simout

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stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
Add reference outputs for SPARC on the atomic timing cpu model --HG-- extra : convert_revision : b64ff7c05504da6112631baaae8f0d927469e16f
2006-10-23 13:57:16 +02:00
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
gem5 compiled May 8 2012 15:05:42
gem5 started May 8 2012 15:36:55
gem5 executing on piton
command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing -re tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing
Update refs for CPU clock changes and O3 CPI/IPC calculation updates. tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini: tests/quick/00.hello/ref/mips/linux/simple-atomic/config.out: tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt: tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout: tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini: tests/quick/00.hello/ref/mips/linux/simple-timing/config.out: tests/quick/00.hello/ref/mips/linux/simple-timing/m5stats.txt: tests/quick/00.hello/ref/mips/linux/simple-timing/stdout: tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini: tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.out: tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt: tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout: tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini: tests/quick/00.hello/ref/sparc/linux/simple-timing/config.out: tests/quick/00.hello/ref/sparc/linux/simple-timing/m5stats.txt: tests/quick/00.hello/ref/sparc/linux/simple-timing/stdout: tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini: tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.out: tests/quick/02.insttest/ref/sparc/linux/o3-timing/m5stats.txt: tests/quick/02.insttest/ref/sparc/linux/o3-timing/stderr: tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout: tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini: tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.out: tests/quick/02.insttest/ref/sparc/linux/simple-atomic/m5stats.txt: tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stderr: tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout: tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini: tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.out: tests/quick/02.insttest/ref/sparc/linux/simple-timing/m5stats.txt: tests/quick/02.insttest/ref/sparc/linux/simple-timing/stderr: tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout: Update refs. --HG-- extra : convert_revision : 34a0d18f213386700e2acdd1eb9ebc5fa6daa7f5
2007-04-23 18:13:19 +02:00
Global frequency set at 1000000000000 ticks per second
Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache.
2008-11-06 17:11:42 +01:00
info: Entering event queue @ 0. Starting simulation...
stats: update stats for preceding coherence changes Because the handling of the E state for multilevel caches has changed, stats are affected for any non-ruby config with caches, even uniprocessor simple CPU.
2010-09-09 20:40:19 +02:00
Hello World!Exiting @ tick 28206000 because target called exit()
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