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gem5/cpu
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Kevin Lim f3358e5f7b O3 CPU now handles being used with the sampler. 
cpu/o3/2bit_local_pred.cc:
cpu/o3/2bit_local_pred.hh:
cpu/o3/bpred_unit.hh:
cpu/o3/bpred_unit_impl.hh:
cpu/o3/btb.cc:
cpu/o3/btb.hh:
cpu/o3/commit.hh:
cpu/o3/commit_impl.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
cpu/o3/decode.hh:
cpu/o3/decode_impl.hh:
cpu/o3/fetch.hh:
cpu/o3/fetch_impl.hh:
cpu/o3/fu_pool.cc:
cpu/o3/fu_pool.hh:
cpu/o3/iew.hh:
cpu/o3/iew_impl.hh:
cpu/o3/inst_queue.hh:
cpu/o3/inst_queue_impl.hh:
cpu/o3/lsq.hh:
cpu/o3/lsq_impl.hh:
cpu/o3/lsq_unit.hh:
cpu/o3/lsq_unit_impl.hh:
cpu/o3/mem_dep_unit.hh:
cpu/o3/mem_dep_unit_impl.hh:
cpu/o3/ras.cc:
cpu/o3/ras.hh:
cpu/o3/rename.hh:
cpu/o3/rename_impl.hh:
cpu/o3/rob.hh:
cpu/o3/rob_impl.hh:
cpu/o3/sat_counter.cc:
cpu/o3/sat_counter.hh:
cpu/o3/thread_state.hh:
    Handle switching out and taking over.  Needs to be able to reset all state.
cpu/o3/alpha_cpu_impl.hh:
    Handle taking over from another XC.

--HG--
extra : convert_revision : b936e826f0f8a18319bfa940ff35097b4192b449
2006-05-04 11:36:20 -04:00
..
memtest Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode. 2006-03-04 15:18:40 -05:00
o3 O3 CPU now handles being used with the sampler. 2006-05-04 11:36:20 -04:00
ozone Quiesce stuff. 2006-04-24 17:40:00 -04:00
simple Fixes for the sampler. 2006-05-03 15:54:36 -04:00
trace Made Addr a global type 2006-02-21 03:38:21 -05:00
base.cc Fixes to allow the ExecContext to be used for profiling. 2006-03-07 22:21:39 -05:00
base.hh Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode. 2006-03-04 15:18:40 -05:00
base_dyn_inst.cc Updates for O3 model. 2006-04-22 18:26:48 -04:00
base_dyn_inst.hh Updates for O3 model. 2006-04-22 18:26:48 -04:00
cpu_exec_context.cc XC needs to get memory from the process. 2006-05-03 15:51:53 -04:00
cpu_exec_context.hh Move quiesce event to its own class. 2006-04-22 18:11:54 -04:00
cpu_models.py Updates for OzoneCPU. 2006-04-22 18:45:01 -04:00
exec_context.hh Remove unnecessary functions. 2006-04-22 18:49:52 -04:00
exetrace.cc Allow the switching on and off of PC symbols for tracing. 2006-04-24 16:56:24 -04:00
exetrace.hh Allow the switching on and off of PC symbols for tracing. 2006-04-24 16:56:24 -04:00
inst_seq.hh Include option for disabling PC symbols. 2006-04-24 17:11:31 -04:00
intr_control.cc Updates for the quiesceEvent that was added to the XC. 2006-03-07 19:59:12 -05:00
intr_control.hh Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode. 2006-03-04 15:18:40 -05:00
pc_event.cc Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode. 2006-03-04 15:18:40 -05:00
pc_event.hh Made Addr a global type 2006-02-21 03:38:21 -05:00
profile.cc Updates for the quiesceEvent that was added to the XC. 2006-03-07 19:59:12 -05:00
profile.hh Updates for the quiesceEvent that was added to the XC. 2006-03-07 19:59:12 -05:00
quiesce_event.cc Move quiesce event to its own class. 2006-04-22 18:11:54 -04:00
quiesce_event.hh Move quiesce event to its own class. 2006-04-22 18:11:54 -04:00
SConscript Include new OzoneCPU files 2006-04-22 19:17:05 -04:00
smt.hh Many files: 2005-06-05 05:16:00 -04:00
static_inst.cc Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths. 2006-02-19 02:34:37 -05:00
static_inst.hh Updates for OzoneCPU. 2006-04-22 19:10:39 -04:00
thread_state.hh Updates for O3 model. 2006-04-22 18:26:48 -04:00