..
cache
MEM: Remove the functional ports from the memory system
2012-01-17 12:55:09 -06:00
config
Fixes to get prefetching working again.
2009-02-16 08:56:40 -08:00
protocol
O3, Ruby: Forward invalidations from Ruby to O3 CPU
2012-01-23 11:07:14 -06:00
ruby
O3, Ruby: Forward invalidations from Ruby to O3 CPU
2012-01-23 11:07:14 -06:00
slicc
Ruby: Add infrastructure for recording cache contents
2012-01-11 13:29:15 -06:00
bridge.cc
MEM: Make the bus bridge unidirectional and fixed address range
2012-01-17 12:55:09 -06:00
bridge.hh
MEM: Make the bus bridge unidirectional and fixed address range
2012-01-17 12:55:09 -06:00
Bridge.py
MEM: Make the bus bridge unidirectional and fixed address range
2012-01-17 12:55:09 -06:00
bus.cc
MEM: Make the bus default port yet another port
2012-01-17 12:55:09 -06:00
bus.hh
MEM: Make the bus default port yet another port
2012-01-17 12:55:09 -06:00
Bus.py
bus: clean up default responder code.
2010-08-17 05:06:21 -07:00
dram.cc
Replace curTick global variable with accessor functions.
2011-01-07 21:50:29 -08:00
dram.hh
stats: Fix all stats usages to deal with template fixes
2009-03-05 19:09:53 -08:00
fs_translating_port_proxy.cc
Fix memory corruption issue with CopyStringOut()
2012-01-12 15:27:20 -06:00
fs_translating_port_proxy.hh
MEM: Add port proxies instead of non-structural ports
2012-01-17 12:55:08 -06:00
mem_object.cc
MEM: Remove Port removeConn and MemObject deletePortRefs
2012-01-17 12:55:09 -06:00
mem_object.hh
MEM: Remove Port removeConn and MemObject deletePortRefs
2012-01-17 12:55:09 -06:00
MemObject.py
Major changes to how SimObjects are created and initialized. Almost all
2007-07-23 21:51:38 -07:00
mport.cc
Replace curTick global variable with accessor functions.
2011-01-07 21:50:29 -08:00
mport.hh
Create a message port for sending messages as apposed to reading/writing a memory range.
2008-10-12 12:08:51 -07:00
packet.cc
MemCmd: Add a command for invalidation requests to LSQ
2012-01-23 11:07:11 -06:00
packet.hh
MemCmd: Add a command for invalidation requests to LSQ
2012-01-23 11:07:11 -06:00
packet_access.hh
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00
page_table.cc
gcc: fix unused variable warnings from GCC 4.6.1
2011-12-13 11:49:27 -08:00
page_table.hh
SE: move page allocation from PageTable to Process
2011-10-22 22:30:08 -07:00
physical.cc
Mem: Add simple bandwidth stats to PhysicalMemory
2012-01-25 17:18:25 +00:00
physical.hh
Mem: Add simple bandwidth stats to PhysicalMemory
2012-01-25 17:18:25 +00:00
PhysicalMemory.py
Make default PhysicalMemory latency slightly more realistic.
2008-08-03 18:13:29 -04:00
port.cc
MEM: Remove Port removeConn and MemObject deletePortRefs
2012-01-17 12:55:09 -06:00
port.hh
MEM: Separate queries for snooping and address ranges
2012-01-17 12:55:09 -06:00
port_proxy.hh
MEM: Add port proxies instead of non-structural ports
2012-01-17 12:55:08 -06:00
request.hh
Mem: Allow ASID to be set after request is created.
2011-09-13 12:06:13 -05:00
SConscript
MEM: Add port proxies instead of non-structural ports
2012-01-17 12:55:08 -06:00
se_translating_port_proxy.cc
MEM: Add port proxies instead of non-structural ports
2012-01-17 12:55:08 -06:00
se_translating_port_proxy.hh
MEM: Add port proxies instead of non-structural ports
2012-01-17 12:55:08 -06:00
tport.cc
MEM: Simplify ports by removing EventManager
2012-01-17 12:55:09 -06:00
tport.hh
MEM: Separate queries for snooping and address ranges
2012-01-17 12:55:09 -06:00