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gem5/src/cpu/minor
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Fernando Endo 6c72c35519 cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClass 
Modify the opClass assigned to AArch64 FP instructions from SimdFloat* to
Float*. Also create the FloatMemRead and FloatMemWrite opClasses, which
distinguishes writes to the INT and FP register banks.
Change the latency of (Simd)FloatMultAcc to 5, based on the Cortex-A72,
where the "latency" of FMADD is 3 if the next instruction is a FMADD and
has only the augend to destination dependency, otherwise it's 7 cycles.

Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2016-10-15 14:58:45 -05:00
..
activity.cc cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
activity.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
buffers.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
cpu.cc cpu: Add SMT support to MinorCPU 2016-07-21 17:19:16 +01:00
cpu.hh cpu: Add SMT support to MinorCPU 2016-07-21 17:19:16 +01:00
decode.cc cpu: Fix Minor SMT WFI/drain interaction issues 2016-07-21 17:19:16 +01:00
decode.hh cpu: Add SMT support to MinorCPU 2016-07-21 17:19:16 +01:00
dyn_inst.cc cpu: Add SMT support to MinorCPU 2016-07-21 17:19:16 +01:00
dyn_inst.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
exec_context.hh cpu: Add missing override in Minor's exec context 2016-08-15 12:00:37 +01:00
execute.cc cpu: Fix Minor SMT WFI/drain interaction issues 2016-07-21 17:19:16 +01:00
execute.hh cpu: Add SMT support to MinorCPU 2016-07-21 17:19:16 +01:00
fetch1.cc cpu: Fix Minor SMT WFI/drain interaction issues 2016-07-21 17:19:16 +01:00
fetch1.hh cpu: Add SMT support to MinorCPU 2016-07-21 17:19:16 +01:00
fetch2.cc cpu: Fix Minor SMT WFI/drain interaction issues 2016-07-21 17:19:16 +01:00
fetch2.hh cpu: Add SMT support to MinorCPU 2016-07-21 17:19:16 +01:00
func_unit.cc misc: Add explicit overrides and fix other clang >= 3.5 issues 2015-10-12 04:08:01 -04:00
func_unit.hh arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
lsq.cc cpu, arch: fix the type used for the request flags 2016-08-15 12:00:35 +01:00
lsq.hh cpu, arch: fix the type used for the request flags 2016-08-15 12:00:35 +01:00
MinorCPU.py cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClass 2016-10-15 14:58:45 -05:00
pipe_data.cc cpu: Add SMT support to MinorCPU 2016-07-21 17:19:16 +01:00
pipe_data.hh cpu: Add SMT support to MinorCPU 2016-07-21 17:19:16 +01:00
pipeline.cc cpu: Add SMT support to MinorCPU 2016-07-21 17:19:16 +01:00
pipeline.hh cpu: Add SMT support to MinorCPU 2016-07-21 17:19:16 +01:00
SConscript cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
SConsopts arch, cpu: Factor out the ExecContext into a proper base class 2014-09-03 07:42:22 -04:00
scoreboard.cc revert 5af8f40d8f2c 2015-07-28 01:58:04 -05:00
scoreboard.hh revert 5af8f40d8f2c 2015-07-28 01:58:04 -05:00
stats.cc cpu: Add instruction opclass histogram to minor 2016-04-05 08:08:12 -05:00
stats.hh cpu: Add instruction opclass histogram to minor 2016-04-05 08:08:12 -05:00
trace.hh cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00