..
resources
Style: Replace some tabs with spaces.
2010-12-20 16:24:40 -05:00
comm.hh
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
2010-10-31 00:07:20 -07:00
cpu.cc
inorder: replace schedEvent() code with reschedule().
2011-01-07 21:50:29 -08:00
cpu.hh
inorder: replace schedEvent() code with reschedule().
2011-01-07 21:50:29 -08:00
first_stage.cc
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
2010-10-31 00:07:20 -07:00
first_stage.hh
Move sched_list.hh and timebuf.hh from src/base to src/cpu.
2011-01-03 14:35:47 -08:00
inorder_cpu_builder.cc
inorder-alpha-fs: edit inorder model to compile FS mode
2009-09-15 01:44:48 -04:00
inorder_dyn_inst.cc
O3: Make all instructions that write a misc. register not perform the write until commit.
2010-12-07 16:19:57 -08:00
inorder_dyn_inst.hh
Style: Replace some tabs with spaces.
2010-12-20 16:24:40 -05:00
inorder_trace.cc
Make commenting on close namespace brackets consistent.
2011-01-03 14:35:43 -08:00
inorder_trace.hh
Make commenting on close namespace brackets consistent.
2011-01-03 14:35:43 -08:00
InOrderCPU.py
configs/inorder: add options for switch-on-miss to inorder cpu
2010-01-31 18:25:13 -05:00
InOrderTrace.py
InOrder: Import new inorder CPU model from MIPS.
2009-02-10 15:49:29 -08:00
params.hh
Remove unused functions/comments cluttering up the code.
2009-03-04 13:17:08 -05:00
pipeline_stage.cc
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
2010-10-31 00:07:20 -07:00
pipeline_stage.hh
Move sched_list.hh and timebuf.hh from src/base to src/cpu.
2011-01-03 14:35:47 -08:00
pipeline_traits.5stage.cc
InOrder: Import new inorder CPU model from MIPS.
2009-02-10 15:49:29 -08:00
pipeline_traits.5stage.hh
InOrder: Import new inorder CPU model from MIPS.
2009-02-10 15:49:29 -08:00
pipeline_traits.9stage.cc
InOrder: Import new inorder CPU model from MIPS.
2009-02-10 15:49:29 -08:00
pipeline_traits.9stage.hh
InOrder: Import new inorder CPU model from MIPS.
2009-02-10 15:49:29 -08:00
pipeline_traits.9stage.smt2.cc
InOrder: Import new inorder CPU model from MIPS.
2009-02-10 15:49:29 -08:00
pipeline_traits.9stage.smt2.hh
InOrder: Import new inorder CPU model from MIPS.
2009-02-10 15:49:29 -08:00
pipeline_traits.cc
inorder: resource scheduling backend
2010-06-25 17:42:34 -04:00
pipeline_traits.hh
inorder: resource scheduling backend
2010-06-25 17:42:34 -04:00
reg_dep_map.cc
inorder: enforce 78-character rule
2010-06-24 15:34:12 -04:00
reg_dep_map.hh
inorder: enforce 78-character rule
2010-06-24 15:34:12 -04:00
resource.cc
inorder: replace schedEvent() code with reschedule().
2011-01-07 21:50:29 -08:00
resource.hh
inorder: get rid of references to mainEventQueue.
2011-01-07 21:50:29 -08:00
resource_pool.9stage.cc
types: add a type for thread IDs and try to use it everywhere
2009-05-26 09:23:13 -07:00
resource_pool.cc
inorder: replace schedEvent() code with reschedule().
2011-01-07 21:50:29 -08:00
resource_pool.hh
inorder: cleanup virtual functions
2010-06-24 15:34:19 -04:00
resource_sked.cc
inorder: resource scheduling backend
2010-06-25 17:42:34 -04:00
resource_sked.hh
inorder: resource scheduling backend
2010-06-25 17:42:34 -04:00
SConscript
Style: Replace some tabs with spaces.
2010-12-20 16:24:40 -05:00
SConsopts
cpu_models: get rid of cpu_models.py and move the stuff into SCons
2010-02-26 18:14:48 -08:00
thread_context.cc
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
2010-10-31 00:07:20 -07:00
thread_context.hh
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
2010-10-31 00:07:20 -07:00
thread_state.cc
inorder-alpha-fs: edit inorder model to compile FS mode
2009-09-15 01:44:48 -04:00
thread_state.hh
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
2010-10-31 00:07:20 -07:00