Ali Saidi 56cc760f6f Merge zizzer:/bk/multiarch ... into zeep.eecs.umich.edu:/z/saidi/work/m5.ma2 arch/alpha/isa_traits.hh: arch/alpha/linux/process.cc: arch/sparc/isa_traits.hh: arch/sparc/linux/process.cc: sim/process.cc: merge --HG-- rename : cpu/exec_context.hh => cpu/cpu_exec_context.hh extra : convert_revision : fea0155c8e23abbd0d5d5251abbd0f4d223fe935		2006-03-09 15:56:42 -05:00
..
memtest	Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.	2006-03-04 15:18:40 -05:00
o3	Merge ktlim@zizzer:/bk/m5	2006-03-08 13:26:30 -05:00
ozone	Cleaned up some of the Fault system.	2006-03-01 05:26:08 -05:00
simple	Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5	2006-03-09 15:15:55 -05:00
trace	Made Addr a global type	2006-02-21 03:38:21 -05:00
base.cc	Fixes to allow the ExecContext to be used for profiling.	2006-03-07 22:21:39 -05:00
base.hh	Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.	2006-03-04 15:18:40 -05:00
base_dyn_inst.cc	Merge ktlim@zizzer:/bk/m5	2006-03-05 00:34:54 -05:00
base_dyn_inst.hh	Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.	2006-03-04 15:18:40 -05:00
cpu_exec_context.cc	Include ability to copy all misc regs.	2006-03-08 15:10:47 -05:00
cpu_exec_context.hh	Merge zizzer:/bk/multiarch	2006-03-09 15:56:42 -05:00
cpu_models.py	Enable building only selected CPU models via new scons	2006-02-23 17:00:29 -05:00
exec_context.hh	no more common syscall emulation, now common for everyone	2006-03-09 15:42:09 -05:00
exetrace.cc	Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.	2006-03-04 15:18:40 -05:00
exetrace.hh	Made Addr a global type	2006-02-21 03:38:21 -05:00
inst_seq.hh	fix problems on darwin/*BSD for syscall emulation mode	2006-02-10 14:21:32 -05:00
intr_control.cc	Updates for the quiesceEvent that was added to the XC.	2006-03-07 19:59:12 -05:00
intr_control.hh	Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.	2006-03-04 15:18:40 -05:00
pc_event.cc	Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.	2006-03-04 15:18:40 -05:00
pc_event.hh	Made Addr a global type	2006-02-21 03:38:21 -05:00
profile.cc	Updates for the quiesceEvent that was added to the XC.	2006-03-07 19:59:12 -05:00
profile.hh	Updates for the quiesceEvent that was added to the XC.	2006-03-07 19:59:12 -05:00
SConscript	Make sure cpu/static_inst_exec_sigs.hh get rebuilt when	2006-02-25 22:57:46 -05:00
smt.hh	Many files:	2005-06-05 05:16:00 -04:00
static_inst.cc	Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths.	2006-02-19 02:34:37 -05:00
static_inst.hh	Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included.	2006-03-03 15:28:25 -05:00