gem5/cpu
Ali Saidi caf16a99cc during a cache miss in the simple cpu we were finalizing the trace
data too early (before the cache miss completed) and therefore
writing freeded memory after the cache miss completed.

Also removed some spurious setAddr() and setData() calls.

--HG--
extra : convert_revision : 3da82540c69c4c417aba3ed155e167d09431a1b2
2005-03-15 17:31:18 -05:00
..
full_cpu Add a new operation class for IPR accesses, and have IPR-accessing 2005-03-01 00:39:57 -05:00
memtest Clean up CPU stuff and make it use params structs 2005-02-19 11:46:41 -05:00
simple_cpu during a cache miss in the simple cpu we were finalizing the trace 2005-03-15 17:31:18 -05:00
trace Clean up CPU stuff and make it use params structs 2005-02-19 11:46:41 -05:00
base_cpu.cc small cleanup to sampling cpu code. 2005-03-15 12:17:22 -05:00
base_cpu.hh Merge zizzer:/z/m5/Bitkeeper/m5 2005-02-21 16:50:38 -05:00
exec_context.cc - Clean up and factor out all of the binning code into a 2004-08-20 11:35:31 -04:00
exec_context.hh Changed all syscalls to use syscall return object. 2005-03-09 15:52:10 -05:00
exetrace.cc Fix timing modeling of faults: functionally the very next instruction after 2005-02-25 12:41:08 -05:00
exetrace.hh Updated Copyright with information in bitkeeper changelogs 2004-06-08 13:37:27 -04:00
inst_seq.hh Updated Copyright with information in bitkeeper changelogs 2004-06-08 13:37:27 -04:00
intr_control.cc Updated Copyright with information in bitkeeper changelogs 2004-06-08 13:37:27 -04:00
intr_control.hh Updated Copyright with information in bitkeeper changelogs 2004-06-08 13:37:27 -04:00
pc_event.cc Some more useful debugging info for kernel panic and die events 2005-02-09 10:27:00 -05:00
pc_event.hh pc event now clears lower 2 bits 2004-09-16 15:11:38 -04:00
static_inst.cc Make all StaticInst methods const. StaticInst objects represent a 2005-02-25 21:44:33 -05:00
static_inst.hh Make all StaticInst methods const. StaticInst objects represent a 2005-02-25 21:44:33 -05:00