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gem5/cpu
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Kevin Lim 9fef4d4630 Stats reset, profiling stuff. 
cpu/base.cc:
    Be sure to deschedule the profile event so it doesn't take profiles while the CPU is switched out.

    Also include the option to reset stats at a specific instruction.
cpu/base.hh:
    Include the option to reset stats at a specific instruction.
cpu/checker/cpu_builder.cc:
    Handle stats reset inst.
cpu/o3/alpha_cpu_builder.cc:
    Handle stats reset inst, allow for profiling.
cpu/ozone/cpu_builder.cc:
    Handle profiling, stats reset event, slightly different parameters.
python/m5/objects/BaseCPU.py:
    Add in stats reset.

--HG--
extra : convert_revision : e27a78f7fb8fd19c53d9f2c1e6edce4a98cbafdb
2006-08-24 16:06:45 -04:00
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checker Stats reset, profiling stuff. 2006-08-24 16:06:45 -04:00
memtest Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode. 2006-03-04 15:18:40 -05:00
o3 Stats reset, profiling stuff. 2006-08-24 16:06:45 -04:00
ozone Stats reset, profiling stuff. 2006-08-24 16:06:45 -04:00
simple Code update for CPU models. 2006-08-11 17:42:59 -04:00
trace Made Addr a global type 2006-02-21 03:38:21 -05:00
activity.cc Comments and code cleanup. 2006-05-31 11:45:02 -04:00
activity.hh Comments and code cleanup. 2006-05-31 11:45:02 -04:00
base.cc Stats reset, profiling stuff. 2006-08-24 16:06:45 -04:00
base.hh Stats reset, profiling stuff. 2006-08-24 16:06:45 -04:00
base_dyn_inst.cc Updates to bring CPU portion of m5 up-to-date with newmem. 2006-08-02 12:05:34 -04:00
base_dyn_inst.hh Code update for CPU models. 2006-08-11 17:42:59 -04:00
cpu_exec_context.cc Code update for CPU models. 2006-08-11 17:42:59 -04:00
cpu_exec_context.hh Code update for CPU models. 2006-08-11 17:42:59 -04:00
cpu_models.py Add in checker. Supports dynamically verifying the execution of instructions, as well as limited amount of control path verification. It will verify anything within the program, but anything external (traps, interrupts, XC) it assumes is redirected properly by the CPU. Similarly it assumes the results of store conditionals, uncached loads, and instructions marked as "unverifiable" are correct from the CPU. 2006-05-16 13:59:29 -04:00
exec_context.hh Move kernel stats out of CPU and into XC. 2006-05-23 16:51:16 -04:00
exetrace.cc Allow the switching on and off of PC symbols for tracing. 2006-04-24 16:56:24 -04:00
exetrace.hh Allow the switching on and off of PC symbols for tracing. 2006-04-24 16:56:24 -04:00
inst_seq.hh Include option for disabling PC symbols. 2006-04-24 17:11:31 -04:00
intr_control.cc Updates for the quiesceEvent that was added to the XC. 2006-03-07 19:59:12 -05:00
intr_control.hh Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode. 2006-03-04 15:18:40 -05:00
pc_event.cc Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode. 2006-03-04 15:18:40 -05:00
pc_event.hh Made Addr a global type 2006-02-21 03:38:21 -05:00
profile.cc Updates for the quiesceEvent that was added to the XC. 2006-03-07 19:59:12 -05:00
profile.hh Updates for the quiesceEvent that was added to the XC. 2006-03-07 19:59:12 -05:00
quiesce_event.cc Move quiesce event to its own class. 2006-04-22 18:11:54 -04:00
quiesce_event.hh Move quiesce event to its own class. 2006-04-22 18:11:54 -04:00
SConscript Remove sat_counter.cc and put its code into sat_counter.hh. 2006-05-19 15:47:55 -04:00
smt.hh Many files: 2005-06-05 05:16:00 -04:00
static_inst.cc Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths. 2006-02-19 02:34:37 -05:00
static_inst.hh Add extra flags to help new CPU handle various instructions. 2006-05-23 14:38:16 -04:00
thread_state.hh Updates to bring CPU portion of m5 up-to-date with newmem. 2006-08-02 12:05:34 -04:00