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gem5/src/mem
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Nathan Binkert 25d9328689 license: Fix license on network model code 
This mostly was a matter of changing the license owner to Princeton
which is as it should have been.  The code was originally licensed
under the GPL but was relicensed as BSD by Li-Shiuan Peh on July 27,
2009.  This relicensing was in an explicit e-mail to Nathan Binkert,
Brad Beckmann, Mark Hill, David Wood, and Steve Reinhardt.
2009-10-28 11:56:56 -07:00
..
cache Minor cleanup: Use the blockAlign() method where it applies in the cache. 2009-09-26 10:50:50 -07:00
config Fixes to get prefetching working again. 2009-02-16 08:56:40 -08:00
gems_common slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers 2009-08-04 12:52:52 -05:00
protocol slicc: Pure python implementation of slicc. 2009-09-22 18:12:39 -07:00
ruby license: Fix license on network model code 2009-10-28 11:56:56 -07:00
slicc fixed error message generation bug in SLICC ast files 2009-10-26 17:06:32 -07:00
bridge.cc eventq: convert all usage of events to use the new API. 2008-10-09 04:58:24 -07:00
bridge.hh includes: use base/types.hh not inttypes.h or stdint.h 2009-05-17 14:34:51 -07:00
Bridge.py DMA: Add IOCache and fix bus bridge to optionally only send requests one 2007-08-10 16:14:01 -04:00
bus.cc bus: add assertion to catch illegal retry 2009-10-03 18:07:39 -07:00
bus.hh types: clean up types, especially signed vs unsigned 2009-06-04 23:21:12 -07:00
Bus.py python: Move more code into m5.util allow SCons to use that code. 2009-09-22 15:24:16 -07:00
dram.cc style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
dram.hh stats: Fix all stats usages to deal with template fixes 2009-03-05 19:09:53 -08:00
mem_object.cc params: Get rid of the remnants of the old style parameter configuration stuff. 2008-08-11 12:22:17 -07:00
mem_object.hh params: Get rid of the remnants of the old style parameter configuration stuff. 2008-08-11 12:22:17 -07:00
MemObject.py Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
mport.cc X86: Add a function which gets called when an interrupt message has been delivered. 2009-04-19 03:54:11 -07:00
mport.hh Create a message port for sending messages as apposed to reading/writing a memory range. 2008-10-12 12:08:51 -07:00
packet.cc Memory: Rename LOCKED for load locked store conditional to LLSC. 2009-04-19 04:25:01 -07:00
packet.hh types: clean up types, especially signed vs unsigned 2009-06-04 23:21:12 -07:00
packet_access.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
page_table.cc arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
page_table.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
physical.cc arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
physical.hh types: clean up types, especially signed vs unsigned 2009-06-04 23:21:12 -07:00
PhysicalMemory.py Make default PhysicalMemory latency slightly more realistic. 2008-08-03 18:13:29 -04:00
port.cc types: clean up types, especially signed vs unsigned 2009-06-04 23:21:12 -07:00
port.hh types: clean up types, especially signed vs unsigned 2009-06-04 23:21:12 -07:00
port_impl.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
request.hh Clean up some inconsistencies with Request flags. 2009-08-01 22:50:13 -07:00
rubymem.cc arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
rubymem.hh ruby: Fix RubyMemory to work with the newer ruby. 2009-07-06 15:49:47 -07:00
RubyMemory.py ruby: Fix RubyMemory to work with the newer ruby. 2009-07-06 15:49:47 -07:00
SConscript ruby: add RUBY sticky option that must be set to add ruby to the build 2009-05-11 10:38:46 -07:00
tport.cc Clean up the SimpleTimingPort class a little bit. 2008-11-10 11:51:18 -08:00
tport.hh Clean up the SimpleTimingPort class a little bit. 2008-11-10 11:51:18 -08:00
translating_port.cc arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
translating_port.hh fix the translating ports so it can add a page on a fault 2007-05-09 15:37:46 -04:00
vport.cc arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
vport.hh implement vtophys and 32bit gdb support 2007-02-18 19:57:46 -05:00