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gem5/src/cpu/inorder
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Geoffrey Blake 98cf57fb89 CheckerCPU: Add function stubs to non-ARM ISA source to compile with CheckerCPU 
Making the CheckerCPU a runtime time option requires the code to be compatible
with ISAs other than ARM.  This patch adds the appropriate function
stubs to allow compilation.
2012-03-09 09:59:28 -05:00
..
resources CPU: Round-two unifying instr/data CPU ports across models 2012-02-24 11:42:00 -05:00
comm.hh Faults: Turn off arch/faults.hh 2012-02-07 04:43:21 -08:00
cpu.cc CPU: Check that the interrupt controller is created when needed 2012-03-02 09:21:48 -05:00
cpu.hh CPU: Round-two unifying instr/data CPU ports across models 2012-02-24 11:42:00 -05:00
first_stage.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
first_stage.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
inorder_cpu_builder.cc SE/FS: Get rid of FULL_SYSTEM in the CPU directory. 2011-11-18 01:33:28 -08:00
inorder_dyn_inst.cc DynInst: get rid of dead MyHash code. 2012-03-02 09:17:42 -08:00
inorder_dyn_inst.hh cpu: add separate stats for insts/ops both globally and per cpu model 2012-02-12 16:07:39 -06:00
inorder_trace.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
inorder_trace.hh Make commenting on close namespace brackets consistent. 2011-01-03 14:35:43 -08:00
InOrderCPU.py CPU: Round-two unifying instr/data CPU ports across models 2012-02-24 11:42:00 -05:00
InOrderTrace.py InOrder: Import new inorder CPU model from MIPS. 2009-02-10 15:49:29 -08:00
params.hh SE/FS: Get rid of FULL_SYSTEM in the CPU directory. 2011-11-18 01:33:28 -08:00
pipeline_stage.cc inorder: handle serializing instructions 2011-06-19 21:43:41 -04:00
pipeline_stage.hh inorder: implement trap handling 2011-06-19 21:43:36 -04:00
pipeline_traits.5stage.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
pipeline_traits.5stage.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
pipeline_traits.9stage.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
pipeline_traits.9stage.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
pipeline_traits.9stage.smt2.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
pipeline_traits.9stage.smt2.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
pipeline_traits.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
reg_dep_map.cc inorder: clear reg. dep entry after removing from list 2011-06-19 21:43:42 -04:00
reg_dep_map.hh imported patch squash_from_next_stage 2011-06-19 21:43:36 -04:00
resource.cc clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
resource.hh CPU: Round-two unifying instr/data CPU ports across models 2012-02-24 11:42:00 -05:00
resource_pool.9stage.cc CPU: Round-two unifying instr/data CPU ports across models 2012-02-24 11:42:00 -05:00
resource_pool.cc CPU: Round-two unifying instr/data CPU ports across models 2012-02-24 11:42:00 -05:00
resource_pool.hh CPU: Round-two unifying instr/data CPU ports across models 2012-02-24 11:42:00 -05:00
resource_sked.cc inorder: addtl functionaly for inst. skeds 2011-06-19 21:43:35 -04:00
resource_sked.hh inorder: addtl functionaly for inst. skeds 2011-06-19 21:43:35 -04:00
SConscript inorder: stall stores on store conditionals & compare/swaps 2011-06-19 21:43:39 -04:00
SConsopts cpu_models: get rid of cpu_models.py and move the stuff into SCons 2010-02-26 18:14:48 -08:00
thread_context.cc MEM: Make port proxies use references rather than pointers 2012-02-24 11:45:30 -05:00
thread_context.hh CheckerCPU: Add function stubs to non-ARM ISA source to compile with CheckerCPU 2012-03-09 09:59:28 -05:00
thread_state.cc SE/FS: Make the functions available from the TC consistent between SE and FS. 2011-10-31 02:58:22 -07:00
thread_state.hh Faults: Turn off arch/faults.hh 2012-02-07 04:43:21 -08:00