gem5/src/arch/x86/isa
Gabe Black 70d6044527 Make symbols for regular registers.
--HG--
extra : convert_revision : 28a6df1efe4298877dc2b20179caeb25dfdc4622
2007-06-21 20:35:27 +00:00
..
decoder Fix a typo in one of the operand type tags. 2007-06-20 19:04:41 +00:00
formats Implement rip relative addressing and put in some missing loads and stores. 2007-06-20 19:08:04 +00:00
insts Make symbols for regular registers. 2007-06-21 20:35:27 +00:00
microops Add in code that lays the ground work for setting flags. 2007-06-21 13:48:44 +00:00
base.isa Add a function to print out segment names. 2007-06-19 14:14:17 +00:00
bitfields.isa Add a stack size bitfield and expose the mode component of the ExtMachInst. 2007-06-19 14:15:21 +00:00
includes.isa Get rid of an unnecessary include file. 2007-06-21 20:35:26 +00:00
macroop.isa Make memory instructions work better, add more macroop implementations, add an lea microop, move EmulEnv into it's own .cc and .hh. 2007-06-20 15:02:50 +00:00
main.isa Fix up a comment that wasn't changed over to x86. 2007-06-12 16:30:48 +00:00
microasm.isa Make symbols for regular registers. 2007-06-21 20:35:27 +00:00
operands.isa Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops. 2007-06-19 14:18:25 +00:00
specialize.isa Implement rip relative addressing and put in some missing loads and stores. 2007-06-20 19:08:04 +00:00