Gabe Black 872bbdfc33 Hand merge. Stuff probably doesn't compile. ... --HG-- rename : arch/alpha/isa_desc => arch/alpha/isa/main.isa rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux/process.cc rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux/process.hh rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64/process.cc rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64/process.hh rename : cpu/exec_context.cc => cpu/cpu_exec_context.cc rename : cpu/exec_context.hh => cpu/cpu_exec_context.hh extra : convert_revision : 7d1efcedd708815d985a951f6f010fbd83dc27e8		2006-03-09 18:35:28 -05:00
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alpha	Hand merge. Stuff probably doesn't compile.	2006-03-09 18:35:28 -05:00
mips	last changes before big merge	2006-03-09 03:27:51 -05:00
sparc	fix merging issues	2006-03-09 16:17:10 -05:00
isa_parser.py	Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included.	2006-03-03 15:28:25 -05:00
isa_specific.hh	Auto-generate arch/foo.hh "switch headers" in scons.	2006-02-22 22:22:06 -05:00
SConscript	Pushed ev5.hh out of the non-alpha code.	2006-03-07 14:08:01 -05:00