Chander Sudanthi 7c479d7349 CP15 c15: enable execution with accesses to c15 registers ... Previously, coprocessor accesses to CP15 c15 would fault. This patch enables accesses but prints out a warning, as the registers are not implemented.		2011-09-13 12:06:13 -05:00
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alpha	StaticInst: Merge StaticInst and StaticInstBase.	2011-09-09 02:40:11 -07:00
arm	CP15 c15: enable execution with accesses to c15 registers	2011-09-13 12:06:13 -05:00
generic	ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.	2011-07-02 22:35:04 -07:00
mips	MIPS: Implement gem5/src/arch/mips/remote_gdb.cc.	2011-09-10 03:45:25 -07:00
noisa	SCons: Support building without an ISA	2010-11-19 18:00:39 -06:00
power	StaticInst: Merge StaticInst and StaticInstBase.	2011-09-09 02:40:11 -07:00
sparc	StaticInst: Merge StaticInst and StaticInstBase.	2011-09-09 02:40:11 -07:00
x86	StaticInst: Merge StaticInst and StaticInstBase.	2011-09-09 02:40:11 -07:00
isa_parser.py	ISA parser: Don't look for operands in strings.	2011-09-08 03:21:14 -07:00
micro_asm.py	scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access	2009-09-22 15:24:16 -07:00
micro_asm_test.py	Add a second section to make sure the ROM is extended properly.	2007-05-31 22:21:21 +00:00
SConscript	scons: rename TraceFlags to DebugFlags	2011-06-02 17:36:21 -07:00