Mitch Hayenga bd0c2d5b0b isa,arm: Add missing AArch32 FP instructions ... This commit adds missing non-predicated, scalar floating point instructions. Specifically VRINT* floating point integer rounding instructions and VSEL* floating point conditional selects. Change-Id: I23cbd1389f151389ac8beb28a7d18d5f93d000e7 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nathanael Premillieu <nathanael.premillieu@arm.com>		2016-10-13 19:22:10 +01:00
..
alpha	isa: Modify get/check interrupt routines	2016-07-21 17:19:15 +01:00
arm	isa,arm: Add missing AArch32 FP instructions	2016-10-13 19:22:10 +01:00
generic	cpu, arch: fix the type used for the request flags	2016-08-15 12:00:35 +01:00
hsail	hsail: Fix disassembly of load instruction with 3 destination operands	2016-09-16 12:36:20 -04:00
mips	isa: Modify get/check interrupt routines	2016-07-21 17:19:15 +01:00
null	cpu,isa,mem: Add per-thread wakeup logic	2015-09-30 11:14:19 -05:00
power	isa: Modify get/check interrupt routines	2016-07-21 17:19:15 +01:00
sparc	isa: Modify get/check interrupt routines	2016-07-21 17:19:15 +01:00
x86	kvm: Adding details to kvm page fault in x86	2016-10-04 13:06:05 -04:00
isa_parser.py	arch, x86: add support for arrays as memory operands	2016-02-06 17:21:20 -08:00
micro_asm.py	scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access	2009-09-22 15:24:16 -07:00
micro_asm_test.py	Add a second section to make sure the ROM is extended properly.	2007-05-31 22:21:21 +00:00
SConscript	gpu-compute: AMD's baseline GPU model	2016-01-19 14:28:22 -05:00